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JPS5837483B2 - phase detection circuit - Google Patents
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JPS5837483B2 - phase detection circuit - Google Patents

phase detection circuit

Info

Publication number
JPS5837483B2
JPS5837483B2 JP9555177A JP9555177A JPS5837483B2 JP S5837483 B2 JPS5837483 B2 JP S5837483B2 JP 9555177 A JP9555177 A JP 9555177A JP 9555177 A JP9555177 A JP 9555177A JP S5837483 B2 JPS5837483 B2 JP S5837483B2
Authority
JP
Japan
Prior art keywords
phase
signal
frequency
detection circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9555177A
Other languages
Japanese (ja)
Other versions
JPS5430059A (en
Inventor
捷利 壬生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SONII MAGUNESUKEERU KK
Original Assignee
SONII MAGUNESUKEERU KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SONII MAGUNESUKEERU KK filed Critical SONII MAGUNESUKEERU KK
Priority to JP9555177A priority Critical patent/JPS5837483B2/en
Publication of JPS5430059A publication Critical patent/JPS5430059A/en
Publication of JPS5837483B2 publication Critical patent/JPS5837483B2/en
Expired legal-status Critical Current

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  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
  • Transmission And Conversion Of Sensor Element Output (AREA)
  • Recording Or Reproducing By Magnetic Means (AREA)

Description

【発明の詳細な説明】 本発明は変位を電気信号の位相の変化として検出する測
長システムに好適な位相検出回路の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a phase detection circuit suitable for a length measurement system that detects displacement as a change in the phase of an electrical signal.

第1図に従来の位相検出回路を示す。FIG. 1 shows a conventional phase detection circuit.

同図に耘いて発振器1はキャリア周波数f。Referring to the figure, the oscillator 1 has a carrier frequency f.

のn倍の周波数の基準信号を発生し、該基準信号は逓降
器2及び分割回路15に与えられる。
A reference signal having a frequency n times that of the reference signal is generated, and the reference signal is applied to the downshifter 2 and the dividing circuit 15.

逓降器2は基準信1 号の周波数を一となし、チャンネル1の磁気へ2n ッド7にはーの移相器3及び増幅器4を介して供4 給すると共にチャンネル2の磁気ヘッド8には増幅器5
を介して供給することにより励磁する。
The downshifter 2 makes the frequency of the reference signal 1 the same, and supplies it to the magnetic head 8 of channel 1 through the phase shifter 3 and amplifier 4 to the magnetic head 7 of channel 2. has amplifier 5
It is excited by supplying it through.

磁気スケール6と両ヘッド7、8間の相対変位により得
られる平衡変調信号は前置増幅器9、10を介して加算
器11によって加算され、前記変位に対応した位相変化
を有する位相変調信号に変換された後、帯域フィルタ1
2、増幅器13及び波形整形回路14を介して分割回路
15に与えられる。
A balanced modulation signal obtained by the relative displacement between the magnetic scale 6 and both heads 7 and 8 is added by an adder 11 via preamplifiers 9 and 10, and converted into a phase modulation signal having a phase change corresponding to the displacement. After that, bandpass filter 1
2. The signal is applied to the dividing circuit 15 via the amplifier 13 and the waveform shaping circuit 14.

分割回路15は例えば特公昭5028032号公報に記
載されたような所謂内挿回路であって、前記変位量に応
じて方向弁別された正方向移動パルスP十及び負方向移
動パルスPーを発生する。
The dividing circuit 15 is a so-called interpolation circuit as described, for example, in Japanese Patent Publication No. 5028032, and generates a positive direction movement pulse P0 and a negative direction movement pulse P- whose directions are discriminated according to the amount of displacement. .

しかるに上述した従来の方式によると、高い分解精度を
得ようとした場合、位相変調信号の一波長はスケール記
録波長(ピッチ)に対応しているため、必然的に分割(
内挿)のためのクロックパルスの周波数を上げなければ
ならない。
However, according to the conventional method described above, when trying to obtain high resolution accuracy, one wavelength of the phase modulation signal corresponds to the scale recording wavelength (pitch), so it is necessary to divide (
(interpolation) must increase the frequency of the clock pulses.

渣た位相変調信号の周波数を下げることは応答速度の低
下をもたらす等の制約がある。
There are restrictions such as lowering the frequency of the residual phase modulation signal, such as lowering the response speed.

従って従来の方式では、通常、分解能に応じて10KH
z及び50KHzの位相変調信号を用いている。
Therefore, in the conventional method, it is usually 10KH depending on the resolution.
z and 50 KHz phase modulation signals are used.

このため、磁気ヘッド7、8の出力信号の不要成分を除
去する帯域フィルタ12としては前記位相変調信号の周
波数]OKHz及び50KHzに各々対応したものが必
要となるので、必然的にコイル及びコンデンサを用いた
受動型フィルタを用いなければならず、該フィルタは大
型かつ高価となり、コスト及びスペースの点で極めて不
利であった。
Therefore, as the bandpass filter 12 for removing unnecessary components of the output signals of the magnetic heads 7 and 8, filters corresponding to the frequencies of the phase modulation signal [OKHz] and 50KHz are required, so it is necessary to use coils and capacitors. A passive filter must be used, which is large and expensive, and is extremely disadvantageous in terms of cost and space.

本発明はかかる事由に鑑みて、帯域フィルタの人力周波
数を上げることにより、上述した従来技術の欠点を解決
せんとするもので、以下図面に示す実施例を参照して説
明する。
In view of these circumstances, the present invention aims to solve the above-mentioned drawbacks of the prior art by increasing the manual frequency of the bandpass filter, and will be described below with reference to embodiments shown in the drawings.

第2図に示す本発明の実施例において、第1図と相異す
る点は、帯域フィルタ17と加算器11間に平衡変調器
16が、オた分割回路15と波形整形回路14間に位相
比較器18が夫々挿入され、発振器1からの周波数nf
c の基準信号で励磁されるように構成したことにある
The embodiment of the present invention shown in FIG. 2 differs from FIG. A comparator 18 is inserted respectively, and the frequency nf from the oscillator 1 is
The reason is that it is configured to be excited by the reference signal of c.

但しXは変位量、λはスケールのピッチをあらわす。However, X represents the amount of displacement, and λ represents the pitch of the scale.

次に帯域フィルター7として例えば、上記平衡変調波信
号の下側帯波( n ] ) fc又は上側帯波(
n + 1 ) fc を通過帯域とするものを使用し
、2π 平衡変調波信号e2を通すと、位相変化量−Xλ は保存され、キャリア周波数のみが(n−1’)又は(
n+1)倍された位相変調信号が得られる。
Next, as the bandpass filter 7, for example, the lower sideband (n]) fc or the upper sideband (
n + 1) fc as the passband and pass the 2π balanced modulation wave signal e2, the phase change amount -Xλ is preserved and only the carrier frequency is (n-1') or (
A phase modulated signal multiplied by n+1) is obtained.

この信号は更に増幅器13、波形整形回路14を介して
位相比較器18に与えられる。
This signal is further applied to a phase comparator 18 via an amplifier 13 and a waveform shaping circuit 14.

位相比較器18は、例えば、Dフリップフロップから成
るもので、前記信号e2を加算時のキャリア周波数fo
に等しい周波数の矩形波に変換する。
The phase comparator 18 is composed of, for example, a D flip-flop, and has a carrier frequency fo when adding the signal e2.
Convert to a square wave with a frequency equal to .

この矩形波信号は第1図の波形整形回路14の出力信号
と全く等価であり、分割回路15により、変位量に対応
したパルスが得られる。
This rectangular wave signal is completely equivalent to the output signal of the waveform shaping circuit 14 shown in FIG. 1, and the dividing circuit 15 obtains a pulse corresponding to the amount of displacement.

?くして本発明によれば帯域フィルタの通過周波数帯域
を上げることができるので、従来のような受動型フィル
タに代えて、小型かつ安価なセラツクフィルタ等を用い
ることが可能になる。
? According to the present invention, the pass frequency band of the bandpass filter can be increased, so that a small and inexpensive cellac filter or the like can be used in place of the conventional passive filter.

その結果、平衡変調器及び位相比較器を附加しても、こ
れらは安価なIC回路を使用できるので、コスト及びス
ペースの点で極めて有利である。
As a result, even if a balanced modulator and a phase comparator are added, inexpensive IC circuits can be used for these, which is extremely advantageous in terms of cost and space.

なか、前記実施例ではヘッドの励磁信号の位相を−だけ
ずらすとしたが、同相信号で励磁し、4 方のチャンネルの平衡変調波信号のキャリアの位相をπ
/2ずらした後、両チャンネルの信号を加算することに
より、同様の位相変調信号を得ることができる。
In the above embodiment, the phase of the excitation signal of the head is shifted by -, but the phase of the carrier of the balanced modulation wave signal of the four channels is shifted by π by excitation with the in-phase signal.
A similar phase modulation signal can be obtained by adding the signals of both channels after shifting by /2.

捷た本発明は磁気スケールと磁気ヘッドを用いた測長シ
ステムだけでなく、変位を電気信号の位相変化として検
出するシステムに広く適用できる。
The present invention can be widely applied not only to a length measurement system using a magnetic scale and a magnetic head, but also to a system that detects displacement as a phase change of an electric signal.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の位相検出回路の一例を示すブロック図、
第2図は本発明の一実施例を示すブロック図である。 1:クロツク発振器、6:磁気スケール、7,8:磁気
ヘッド、15:分割回路、16:平衡変調器、17帯域
フィルタ、18:位相比較器。
FIG. 1 is a block diagram showing an example of a conventional phase detection circuit.
FIG. 2 is a block diagram showing one embodiment of the present invention. 1: clock oscillator, 6: magnetic scale, 7, 8: magnetic head, 15: dividing circuit, 16: balanced modulator, 17 bandpass filter, 18: phase comparator.

Claims (1)

【特許請求の範囲】 1 変位量に対応した位相を有する周波数fcの位相変
調信号を発生する回路と、該回路からの位相変調信号と
、スケール記録波長λに対する分割数nに相当する周波
数nfcのクロツク信号が与えられる平衡変調器と、該
平衡変調器からの周波数(n−1)f又は( n +
I ) fcの平衡変調信号C を通過させる帯域フィルタと、該フィルタを通過した信
号と前記クロツク信号が与えられる位相比較器とを備え
たことを特徴とする位相検出回路。
[Claims] 1. A circuit that generates a phase modulation signal with a frequency fc having a phase corresponding to the amount of displacement, a phase modulation signal from the circuit, and a frequency nfc corresponding to the number of divisions n with respect to the scale recording wavelength λ. A balanced modulator to which a clock signal is applied and a frequency (n-1)f or (n +
I) A phase detection circuit comprising: a bandpass filter that passes a balanced modulation signal C of fc; and a phase comparator to which the signal passed through the filter and the clock signal are applied.
JP9555177A 1977-08-11 1977-08-11 phase detection circuit Expired JPS5837483B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9555177A JPS5837483B2 (en) 1977-08-11 1977-08-11 phase detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9555177A JPS5837483B2 (en) 1977-08-11 1977-08-11 phase detection circuit

Publications (2)

Publication Number Publication Date
JPS5430059A JPS5430059A (en) 1979-03-06
JPS5837483B2 true JPS5837483B2 (en) 1983-08-16

Family

ID=14140704

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9555177A Expired JPS5837483B2 (en) 1977-08-11 1977-08-11 phase detection circuit

Country Status (1)

Country Link
JP (1) JPS5837483B2 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5083097U (en) * 1973-12-03 1975-07-16
JPS559970Y2 (en) * 1975-04-04 1980-03-05
JPS5525961Y2 (en) * 1975-10-15 1980-06-23

Also Published As

Publication number Publication date
JPS5430059A (en) 1979-03-06

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