JPS5837582B2 - program protection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic computer capable of writing and erasing programs and performing manual calculations, and more particularly to a program protection device that protects written programs.

Conventionally, it is a stored program electronic computer that memorizes a program and proceeds with the work according to it.
In this specification, an electronic computer that has the function of performing manual calculations (including functional calculations in addition to the four arithmetic calculations) must first perform, for example, P
The calculation is performed after inputting some command such as RINT, and if manual calculation is performed without inputting the command, there is a risk that the previously written program will be erased.

For example, when the following program using BASIC language is written, if you input only line number 10, which has already been written, and press the execute key, all the statements on line number 10 will be deleted. There is a problem with this.

The present invention has been made to solve these conventional problems, and it is possible to prevent already written programs from being erased even if the above-mentioned command is not given during manual calculation. In other words, it is an object of the present invention to provide a program protection device that can perform manual calculations without affecting already written programs.

In order to achieve this object, the present invention provides a selection means for selecting whether a program that has been written or will be written in the future is erasable or non-erasable, and a method for recording the selection contents of the selection means. and a storage device that stores the program, and when the storage device stores that the program should not be erased, the input data is regarded as manual calculation data and the program is controlled to be retained. .

Embodiments of the present invention will be described below with reference to the accompanying drawings.

1 and 2 are a perspective view and a block diagram showing an embodiment of a personal computer according to the present invention.

The personal computer 1 is basically a 16-bit microcomputer, and includes a main storage device 2, a central processing unit 3, a keyboard section 4, and a CRT display section 5.

The main storage device 2 is divided into a system area 8 and a user area 10.

The system area 8 includes a system program storage area 12, a user program start address storage area 14, a system working register group 16, and a system working area 18.

The system program storage area 12 stores fixed programs that control hardware, such as command reference tables, interrupt processing programs, error processing programs, and various calculation programs.

The user's program start address storage area 14 stores the start address of the program written by the user.

The system working register group 16 consists of registers R1 to R12 for temporarily storing variables used by the system.

The system working area 18 stores various information other than the above, and includes information on whether a program written by the user is non-erasable (hereinafter referred to as locked state) or erasable (hereinafter referred to as unlocked state). A protect register a stores the state of the program protection key 20 (see keyboard section 4 in FIGS. 1 and 2) for selecting the
1 is provided.

For example, the protect register a1 is 5 as shown in FIG.
It is a 16-bit register located at address 200 (hexadecimal number), and when the program protection key 20 is in the locked state, the contents are 1010101010 as shown in FIG. 4a.
101010, and when the program protection key 20 is in the released state, the content becomes 0101010 as shown in FIG. 4b.
101010101.

In other words, when the program protection key 20 is in the locked state, the MSD of the protect register a1 is 1, and when the program protection key 20 is in the released state, the MSD of the protect register a1 is O.

In this embodiment, the address of working register R1 is 5101, and the address of working register R2 is 51.
The address is 02.

The user area 10 of the main storage device 2 has a row number table 2
2, source program area 24, and variable table 26
and a user working area 28.

The line number table 22 stores a pair of line numbers of program information consisting of line numbers and statements written by the user and addresses where these statements are stored, and the source program area 24 is It stores the statements written by.

The control unit 30 in the central processing unit 3 includes an instruction register, a read-only memory (ROM), an instruction decoder, and the like.

The ROM stores a microprogram that controls the internal and external logic circuits of the central processing unit 3, and the instruction register stores instructions read from the main memory 2 via the data bus 32. The microprogram stored in the ROM is selectively output.

The illustration decoder decodes the output of the ROM, outputs a control signal to the control bus 34 connected to the multiplexer 44, etc., and outputs a control signal to the control bus 35 connected to the main storage device 2. , outputs the enable signal ME to the enable line 36 connected to the main storage device 2, or input/output (hereinafter abbreviated as I/O) enable line connected to the keyboard section 4 and CRT display section 5. It controls devices inside and outside the central processing unit 3 by outputting a memory disable signal (hereinafter simply abbreviated as a disable signal) ME to 38, and the above two signals ME and ME can be used as an alternative. Output.

The incraft register 40 receives an interrupt request signal (serial signal) from an external input/output device such as the keyboard section 4, and stores the interrupt level in parallel. It also receives interrupt request signals.

The multiplexer 44 receives a signal indicating an interrupt level from the increment register 40, a control signal from the control unit 30, a signal provided from the main storage device 2 via the data bus 32, and a data buffer 50, which will be described later. A data signal is selected and a predetermined register of the register group 48 or an arithmetic logic unit (hereinafter abbreviated as ALU) 46 is selected.
It is given to

Based on the control signal given from the control unit 30, the ALU 46 performs data addition, subtraction, multiplication and division by repeating this process,
It performs shifting, rotation, etc.

The register group 48 includes two primary storage registers TA,
TB, program counter PC, working pointer W
P, and a status register ST are provided.
The program counter PC specifies the address of the system program stored in the main storage device 2.

The working pointer WP stores the start address of the working registers R1 to R12 used by the system program.

The status register ST is a register that holds various states such as program execution and calculation, and has bits for program key status, interrupt mask bits for each level, overflow display bit, carry display bit, etc. .

The data buffer 50 is connected to the main storage device 2 via a data bus 32, and is also connected to the multiplexer 44 and ALU 45 via a bus 60, etc., and is connected to the central processing unit 3.
It is a buffer register that has bidirectionality for the internal parts (multiplexer 44, ALU 46, etc.) and provides only output to the main storage device 2, and is a buffer register that outputs data from the central processing unit 3 to the main storage device 2. Once this data buffer 50
is stored and then output.

The address buffer 52 is connected to the main storage device 2 and input/output devices (keyboard section 4, CRT display section 5) via an address bus 56, and is also connected to the AL via a bus 60 etc.
It is connected to U46, temporarily stores the address signal given from ALU46, and gives it to main storage device 2 or input/output device (keyboard section 4, CRT display section 5) via this address bus 56.

Input/output buffer (hereinafter abbreviated as I/O buffer) 5
4 is connected to the input/output devices (keyboard section 4 and CRT display section 5) via a data path 58, and is also connected to the ALU 46 via a bus 60 etc., so that the input/output devices and the ALU 4
The data and control information sent and received between the computer and the computer 5 are stored at the time.

The keyboard unit 4 includes a keyboard body 62, an encoder 64, and an input/output port (hereinafter abbreviated as I/O port).
It consists of 66.

The keyboard body 62 has the program protection key 20 described above.
In addition to the execution key 68, program specification key 69a,
Alphabet and numeric keys 69b, space key 69c, cursor movement keys, etc. are provided, and the program lights up when the program protection key 20 is in the locked state and turns off when the program protection key 20 is in the released state. A protection indicator lamp TO is provided.

The encoder 64 encodes information generated when keys on the keyboard body 62 are operated and provides the encoded information to the I/O port 66, and also provides an interrupt request signal generated when the keys are operated to the interrupt register 42. It is.

The I/O port 66 includes an output latch circuit 72, an input latch circuit 74, and a decoder 76.

The output latch circuit 72 receives the output data of the encoder 64←
It holds the current time and provides it to the data path 58.

The input latch circuit 74 temporarily holds the data and control information given from the central processing unit 3 via the data path 58 and supplies it to the keyboard body 62 to light and drive the display lamp 70 and also to the output latch circuit 72. It is something to give.

The decoder 76 is connected to the disable line 38 and the address bus 56, and enables the keyboard section 4 when it receives the disable signal ME and receives an address designation from the central processing unit 3.

The CRT display unit 5 can display up to 24 lines of 80 characters, for example, and has an I/O port 78 and
Storage device 80, address control section 82, and drive control section 8
4 and a CRT main body section 86.

The I/O port 78 connects the central processing unit 3 to the data path 5.
an input data latch circuit and a control information latch circuit that temporarily hold the input data and control information provided through the CRT display section 5; and an output data latch circuit that temporarily holds the data output from the CRT display section 5 side. , a decoder for decoding the output of the control information latch circuit, and a disable line 38 and an address no. The decoder is connected to the CRT display section 56 to receive the disable signal ME, and enables the CRT display section 5 when an address is specified from the central processing unit 3.

The CRT storage device 80 is a storage device in which data to be displayed on the CRT main body 86 is stored.

The address control section 82 specifies the address of the CRT storage device 80 based on data given from the central processing unit 3 and controls the position of the cursor.

The drive control unit 84 includes a character generator that outputs characters corresponding to data provided from the CRT storage device 80 in accordance with dots and rasks, a dot counter, a character counter, a raster counter, and a line counter, and receives a horizontal synchronization signal. and a CRT counter that outputs a vertical synchronization signal, a P/S converter that performs parallel-to-serial conversion and outputs a video signal, and a CRT driver that amplifies the video signal and displays the data on the CRT main body 86. It consists of

In addition, in FIG. 1, 102 is a cassette MT having a function as an auxiliary storage device, and this cassette MT 10
Eject button 104a and rewind button 104 that control 2
b is provided on the panel.

Further, in FIG. 2, 106 is a clock signal generator which synchronizes the entire computer 1.

Next, the operation of the embodiment configured as described above will be described with reference to the flowcharts in FIGS. 5, 6a and 6b, and 7a.
7b and the state diagram of FIG. 7b.

When the computer 1 is started, FIGS. 6a and 7a
As shown in the figure, the program counter PC is in the main memory 2.
Specify the address (m) of "working register R" from the system program area 12 corresponding to this address.
A 2-byte command "Load a constant to 1" is read out, and this command is decoded by the control unit 30.

Next, the count value of the program counter PC is (m+
1), and the hexadecimal number 5555 (constant) is loaded into the temporary storage register TA of the register group 48.

When this loading is completed, in order to obtain the address of the working register R1, the address r+1jL, that is, 5101, added to the working pointer WP is set in the address buffer 52, and the storage contents of the temporary storage register TA are addressed by the address buffer 52. Transferred to working register R1.

Therefore, the contents of working register R1 at this time are 2
In base number it becomes "0101010101010101J.

Next, the program counter PC is incremented to specify the address (m+2) of the main memory 2, and a command to ``transfer the contents of the working register R1 to the protect register a1'' is issued from the system program area 12 corresponding to this address. This instruction is read out and decoded by the control unit 30.

Then, the address of the working register R1 is set in the address buffer 52 by the same operation as described above, and the address from the working register R1 to the temporary storage register T, which is addressed by the address buffer 52, is set in the address buffer 52.
The content 0101010101010101 is transferred to A.

Next, the count value of the program counter PC is incremented to (rn+3), and the address of the protect register a1 is set in the temporary storage register TB.

Then, the contents of the temporary storage register TB are set in the address buffer 52, the address of the protect register a1 is specified, and the contents of the temporary storage register TA are transferred to the protect register a1.

Therefore, the contents of protect register a1 are 010101
0101010101 (the state shown in FIG. 4b), the program written by the user in the user storage area of the main storage device 2 can be erased, and the program protection indicator lamp 70 is turned off.

In other words, the program to be written is made erasable at startup, and the program protection key 20 is released because the program used by the user is not written in the main storage device 2 at this time. This is because it is not.

Next, when a key operation is performed, the encoder 64 receives the signal output from the keyboard main body 62 and adds an interrupt request signal to the ink print register 40.

At this time, the status register ST in the register group 48
Assuming that interrupts are not masked, a predetermined command is read from the system program area 12, and the central processing unit 3 determines whether the operated key is the program protection key 20, as shown in FIG. When it is determined that the operated key is the program protection key 20, processing as shown in FIGS. 6b and 7b is performed.

That is, when it is determined that the operated key is the program protection key 20, the count value (n) of the program counter PC is
The address corresponding to “
A command to set the address data of the I/O port 66 in the working register R2 is read out, and this command is decoded by the control unit 30.

Then, the count value of the program counter PC becomes (n+
1), the address data of the I/O port 66 of the keyboard section 4, for example 110 (hexadecimal number), is stored in the register group 4.
6 is set in temporary storage register TA.

Next, the value Wp+ which is the addition of 2 to the working pointer Wp
2 (=5 10 2 ) is set in the address buffer 52, and address 5102 of the main storage device 2 is designated.
The contents 110 of temporary storage register TA are transferred to working register R2.

Next, when the count value of the program counter PC is incremented to (n+2), from the part of the main memory 2 having the address corresponding to this count value,
The command ``Transfer the contents of protect register a1 to working register R1'' is read out.

Then, the count value of the program counter PC becomes (n+
3), the address 5200 of the protect register a1 is given to the primary storage register TB, and the contents of the protect register a1 are transferred to the temporary storage register TA.

Next, the address of working register R1 (Wp+1
) (=5 1 0 1) is the address buffer 52
The contents of the temporary storage register TA are transferred to the working register R1 addressed by the address buffer 52.

Therefore, the contents of working register R1 at this time are "
010101010101010101J.

Next, the count value of the program counter PC is (n+4
), an instruction to ``shift the contents of working register R1 to the left by 1 bit'' is read from address (n+4) of main memory 2 and decoded by control unit 30.

Next, the address of working register R1 (Wp+1) (=5
1 0 1) is set in the address buffer 52,
The contents of working register R1 are stored in temporary storage register TA.
will be forwarded to.

Next, the ALU 46 saves the contents of the temporary storage register TA to 1.
The bits are circularly shifted to the left and the obtained data is returned to the temporary storage register TA.

Then, the count value of the program counter PC is (
n-1-5), the address (Wp+1) of the working register R1, which is r+IJL, in the working pointer Wp, is set in the address buffer 52, and the contents of the temporary storage register TB are transferred to the address by this address buffer 52, as described above. specified working register R
Transferred to 1.

Therefore, the contents of working register R1 at this time are "
1010101010101010".

Next, when the value of the program counter PC reaches (n+6), the command ``Transfer the contents of the working register R1 to the protect register a1'' is read from the part of the main memory 2 having the address (n+6). This instruction is decoded by the control section 30, and the address (Wp+1) of the working register R1 is set in the address buffer 52 by the same operation as described above.

Then, by addressing the address buffer 52, the contents of the working register R1 are transferred to the temporary storage register TA.

Next, the count value of the program counter PC becomes (n+
7), the address of protect register a1 (5
200) is given to the temporary storage register TB, and the contents of the temporary storage register TA are transferred to the protect register a1 addressed by the contents of the temporary storage register TB.

Therefore, the contents of protect register a1 at this time are "
1010101010101010J, and the program written or to be written in the user area of the main storage device 2 cannot be erased.

Then, 1 bit of MSD of protect register a1 (
In other words, "1") is the I/O port 66 of the keyboard section 4.
and is set in the MSD of the input latch circuit 74.

Therefore, the program protection indicator lamp 70 lights up, indicating that the program protection key 20 is in the locked state, that is, the program cannot be erased.

The above explanation relates to the operation when the program protection key 20 is operated, but when it is determined that a key other than the program protection key 20 has been operated, it is determined whether the execution key 68 has been operated or not, as shown in FIG. is judged,
If it is determined that the execution key 68 has not been operated, other input processing is performed.

Further, when it is determined that the execution key 68 has been operated, data is read from the buffer memory as shown in FIG.

Then, it is determined whether the first data is number 1 or not,
If it is not a numerical value, manual calculation input processing is performed.

If the first data is a numeric value, it is determined whether the read data is a numeric value to the end, and if the data is a numeric value to the end, it is determined whether the program protection key 20 is in the locked state (that is, the program is It is determined whether the data cannot be erased or not, and if it is in the locked state, manual calculation input processing is performed.

If it is not in the locked state, it is determined whether the read data is only the line number, and if it is only the line number, the program statement is cleared, and if there is data other than the line number, it is processed. , input processing of program statements is performed.

Furthermore, if the read data is not a numeric value to the end, it is determined whether the next digit is a symbol or not, and if it is a symbol, manual calculation input processing is performed.

If it is not a symbol, it is determined whether it is only a line number. If it is only a line number, the program statement is cleared, and if there is data other than the line number, input processing of the program statement is performed.

8 and 9 show programs such as
Line number table 22 of this program when written to
and the storage state of the source program area 24, respectively.

A program written in this manner will not be erased when the program protection key 20 is in the locked state, in other words, as long as the protect register a1 remembers that the program can be erased.

For example, when the program protection key 20 is in the locked state, even if you operate the key to write line number 10, 20, etc. and then operate the execution key 68, the program will remain in the previously written state. be done.

If you want to erase the previously written program and write another program, press the program protection key 20.
For example, 3 0 PRINT
If program statements C, A, and B are written, the previously written statement at line number 30 is erased, and the currently written statement is stored.

For example, after writing a program like this, if you want to change the statement at line number 50 to
It is sufficient to input the above statement by key operation, and then operate the execution key 68, with the above statement set to the released state.

Furthermore, if the program protection key 20 is locked when it is desired to keep the previously written program as it is, statements input later will be invalidated and the previous program will be protected.

Note that in the above embodiment, the program can be erased,
Although "impossible" is selected using a key provided on the keyboard, the present invention is not limited to this, and any means that can select "erasable" and "impossible" can be used.

In addition, in the above embodiment, 01 is set in the protect register a1.
When the data 01010101010101 is stored, the program can be erased, 101010101
Although it is assumed that data 0101010 cannot be erased when it is stored, these combinations may be reversed or changed as appropriate.In short, it is possible to erase data when one of two different data is stored, and the other is stored. You can set it so that it cannot be deleted when it is deleted.

However, if the data that alternately repeats O and 1 is stored as described above and the selection means is shifted every time the selection is made, the device configuration can be simplified.

Further, in the above embodiment, whether or not the program is erasable is stored in the register, but the present invention is not limited to this, and it goes without saying that the information may be stored in another storage device such as a magnetic tape. Yes, or it may be stored in the input/output port of the keyboard.

As is clear from the above description, the present invention provides a selection means for selecting whether a program that has been written or will be written in the future is made non-erasable (locked state) or erasable (released state), and This device includes a storage device for storing the selection contents of the selection means, and this device
When remembering that the program cannot be erased, even if data such as numbers is input directly without any instructions, this data will be considered for manual calculation and the memory of the previously written program will be retained. Since the computer is controlled in this manner, manual calculations can be performed without giving special commands as in the past, making the computer easier to operate and improving calculation efficiency.

Furthermore, even if a number or the like is entered incorrectly and the execution key is pressed, the previously written program is retained, so there is no need to reassemble the program due to a mistake, thereby improving work efficiency.

In addition, the present invention requires only a storage device to store whether or not a program can be erased, so the device configuration is simple, unlike a protection method that transfers a previously written program to another storage device during manual calculation. , it is also advantageous in terms of cost.

[Brief explanation of drawings]

1 and 2 are perspective views and block diagrams showing one embodiment of a personal computer according to the present invention, FIG. 3 is an explanatory diagram showing the arrangement of a protect register according to the present invention, and FIGS. 4a and 4b are proact diagrams. A bit configuration diagram when the register stores programs that are non-erasable (program protection key locked state) and erasable (program protection key released state), respectively. Figure 5 is an example of the implementation of Figures 1 and 2. 6th flowchart showing the operation of
Fig. 6a is a flowchart showing the operation of the above embodiment at startup, Fig. 6b is a flowchart showing the operation of the above embodiment when storing that the program should be made non-erasable, and Fig. 7a is the flowchart of the above embodiment. A chart showing the operating state of each part at the time of startup, FIG. 7b is a chart showing the operation when the above embodiment memorizes that the program should be made non-erasable, and FIGS. 8 and 9 are respectively written. FIG. 3 is a state diagram showing an example of a storage state in a program line number table and a storage state in a source program area. 1...Personal computer, 2...
・Main storage device, 3...Central processing unit, 4...
...Keyboard section, 5...CRT display section, 1
6...- Working register group, 18...
- Working area, 20...Program protection key, 46...ALU, 48...Register group, 68...Execution key, 70... -Program protection indicator lamp, R1 to R12... Working register, a1... Protect register.

Claims (1)

[Claims] 1. In an electronic computer capable of performing arithmetic processing based on a pre-written program and manual calculation, is there a first storage device that stores the written program, and whether the program stored in this first storage device can be erased? a selection means for selecting whether to make the program non-erasable; a second storage device for storing the selection contents of the selection means; and a second storage device for storing the fact that the program should be made non-erasable. and control means for storing and retaining the program written in the first storage device by regarding the input data as the manual calculation data.