JPS5837596B2 - Conversion circuit with nonlinear characteristics - Google Patents
Conversion circuit with nonlinear characteristicsInfo
- Publication number
- JPS5837596B2 JPS5837596B2 JP13909477A JP13909477A JPS5837596B2 JP S5837596 B2 JPS5837596 B2 JP S5837596B2 JP 13909477 A JP13909477 A JP 13909477A JP 13909477 A JP13909477 A JP 13909477A JP S5837596 B2 JPS5837596 B2 JP S5837596B2
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Description
【発明の詳細な説明】
本発明は入力の非線形関数に近似する出力を得るために
使用される変換回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a conversion circuit used to obtain an output that approximates a nonlinear function of an input.
物理的変量Xの検出器の出力ExはおおむねXに対し非
線的である。The output Ex of the detector of the physical variable X is approximately nonlinear with respect to X.
かかる検出出力ExをXに比例する信号に変換するため
に入力と出力との関係が非線的な変換回路が必要である
。In order to convert such detection output Ex into a signal proportional to X, a conversion circuit with a non-linear relationship between input and output is required.
従来、かかる非線形特性の入出力変換回路の近似特性の
回路として与えられた非線形特性を折線特性で近似せる
所謂折線特性回路を使用されている。Conventionally, as a circuit for approximating the characteristics of an input/output conversion circuit with such nonlinear characteristics, a so-called broken line characteristic circuit has been used, which approximates a given nonlinear characteristic by a broken line characteristic.
かかる折線特性で非線形特性を近似する場合に、与えら
れた非線形特性を多くの区間に分割し分割数の多い折線
特性で非線形特性を近似せる回路を使用すれば近似特性
はよくなるが反面において回路構成が複雑になる欠点が
ある。When approximating a nonlinear characteristic using such a polygonal characteristic, if you divide the given nonlinear characteristic into many sections and use a circuit that approximates the nonlinear characteristic using a polygonal characteristic with a large number of divisions, the approximation characteristics will be better, but on the other hand, the circuit configuration The disadvantage is that it becomes complicated.
本発明は、分割数が比較的に少ない折線特性回路を使用
し、入力の広い変化範囲に亘り高い精度で与えられた非
線形特性に近似する入出力特性をもつ変換回路を実現せ
んとするものである。The present invention uses a polygonal characteristic circuit with a relatively small number of divisions, and aims to realize a conversion circuit that has input/output characteristics that approximate the nonlinear characteristics given with high accuracy over a wide range of input changes. be.
第1図は本発明実施例の原理的な構或を示すブロック接
続図である。FIG. 1 is a block connection diagram showing the principle structure of an embodiment of the present invention.
図において、1は外部から入力exが与えられる入力端
である。In the figure, 1 is an input terminal to which input ex is applied from the outside.
FG1およびFG2はそれぞれ第1,第2の折線特性の
電圧・電流変換回路である。FG1 and FG2 are voltage/current conversion circuits having first and second broken line characteristics, respectively.
入力1に与えられる入力exはそれぞれFG,FG2の
折線特性にしたがって電流Ix’およびIL′に変換さ
れる。Input ex applied to input 1 is converted into currents Ix' and IL' according to the polygonal characteristics of FG and FG2, respectively.
PWMはパルス幅変調回路であり変調回路の入力端2に
FG1の出力電流Ix’、基準電流の入力端3には一定
の基準電流IsにFG2の出力電流IL’を加算せる可
変の基準電流Is’が与えられ、出力4に入力電流Ix
’と基準電流Is’の比に対応するパルス幅変調信号を
発生する回路である。PWM is a pulse width modulation circuit, and the input terminal 2 of the modulation circuit is the output current Ix' of FG1, and the input terminal 3 of the reference current is a variable reference current Is that can add the output current IL' of FG2 to the constant reference current Is. ' is given, and the input current Ix at output 4
This circuit generates a pulse width modulation signal corresponding to the ratio of ' and reference current Is'.
第2図にPWMの一例の構或をより詳細に示す。FIG. 2 shows the structure of an example of PWM in more detail.
図によってIx’の作用を説明すれば、この回路に入力
電流信号Ix’と基準電流Is’が与えられるとき、I
s’は後述の条件にしたがって正負に切換えられIx’
とともに演算増幅器Aの入力5に与えられる。To explain the action of Ix' using the diagram, when input current signal Ix' and reference current Is' are applied to this circuit, I
s' is switched between positive and negative according to the conditions described later, and Ix'
It is also applied to input 5 of operational amplifier A.
図においてOsは一定電流Isを得るための電源、8は
IsにFG2からの電流IL’を加算せる可変の基準電
流Is’から+Is’とーIs’を生ずる電流変換器で
ある。In the figure, Os is a power source for obtaining a constant current Is, and 8 is a current converter that generates +Is' and -Is' from a variable reference current Is' that can add the current IL' from FG2 to Is.
増幅器AはコンデンサCとともに加算積分器を構或し、
積分器の入力5にはIx’と±Is’のほかに、一定の
繰返し周期で反転する駆動電流±Icが与えられ積分器
の出力には入力端2に与えられる入力電流Ix’と±I
s’および±lcの積分により電圧e。Amplifier A constitutes a summing integrator together with capacitor C,
In addition to Ix' and ±Is', the input 5 of the integrator is supplied with a drive current ±Ic that is inverted at a constant repetition period, and the output of the integrator is supplied with input currents Ix' and ±Is supplied to input terminal 2.
Voltage e by integrating s' and ±lc.
が発生し、e0?比較器COによってゼロレベルと比較
される。occurs and e0? It is compared with zero level by comparator CO.
比較器COの出力はe。The output of comparator CO is e.
>Oのとき+Is’が、e < 0のときーIs’が
積分器人力5に帰還されるようにスイッチS1およびS
2を駆動する。Switches S1 and S are set so that +Is' is fed back to the integrator power 5 when e < 0, and -Is' is fed back to the integrator power 5 when e < 0.
Drive 2.
このとき帰還される基準電圧+Is’,−Is’は入力
電流Ix’に応じてパルス幅変調されそれぞれの一周期
にわたる平均値が入力電流Ix’と打消し合って加算積
分器の加算点5でゼロに保たれて平衡する。The reference voltages +Is' and -Is' fed back at this time are pulse width modulated according to the input current Ix', and the average value over one cycle of each cancels out the input current Ix' at the summing point 5 of the summing integrator. Equilibrium is maintained at zero.
なおクロツク電流+Icはその1周期の平均値はゼロで
ある。Note that the average value of the clock current +Ic over one cycle is zero.
いま平衡状態における+Is’が積分器入力に帰還され
ている期間をtl , −Is’が帰還されている期間
をt2、パルス幅変調波の周期をTとすれば周期Tはク
ロツク電流±Icの周期Tできまり、次式が成立する。Now, if the period in which +Is' is fed back to the integrator input in the equilibrium state is tl, the period in which -Is' is fed back is t2, and the period of the pulse width modulated wave is T, the period T is equal to the clock current ±Ic. It is determined by the period T, and the following equation holds true.
(1)式を変形して右辺のIs’の係数をTpと置けば
第3図はPWMによって生ずるパルス変調波の波形図で
ある。If equation (1) is modified and the coefficient of Is' on the right side is set as Tp, FIG. 3 is a waveform diagram of a pulse modulated wave generated by PWM.
ここで基準電流Isに加算されるFG2の出力電流IL
’とIx’の比をKと置けば次の式が成立する。Here, the output current IL of FG2 is added to the reference current Is.
If the ratio of ' and Ix' is set to K, the following equation holds true.
したがって、PWMは入力電流Ix’を出力信号Tpに
変換する非線形特性の変換回路である。Therefore, the PWM is a conversion circuit with nonlinear characteristics that converts the input current Ix' into the output signal Tp.
Tpは期間△Tを計数器で計数することによってもとめ
られる。Tp is determined by counting the period ΔT with a counter.
■は△Tを計数してTpをもとめる回路である。(2) is a circuit that calculates Tp by counting ΔT.
TpをPWMの出力とする。いま、第1図におけるFG
,およびFG2として比較的折点数の少ない適当な折線
特性回路を使用し、これらの回路によってexを変換せ
る出力電流Ix’およびIL’をPWMに与えれば、入
力exに対するPWMの出力Tpとの関係が所望の非線
形特性によく近似する特性の入出力変換回路が構或でき
る。Let Tp be the output of PWM. Now, FG in Figure 1
, and FG2 with a relatively small number of break points, and if output currents Ix' and IL' for converting ex by these circuits are given to the PWM, the relationship between the PWM output Tp and the input ex can be expressed as follows: It is possible to construct an input/output conversion circuit whose characteristics closely approximate the desired nonlinear characteristics.
以下、具体的な実施例によって本発明の作用を説明する
。Hereinafter, the effects of the present invention will be explained with reference to specific examples.
第4図は本発明実施例の具体的な構成を示す。FIG. 4 shows a specific configuration of an embodiment of the present invention.
本実施例においては第1図のFG1に対応する第1折線
特性回路とFG2に対応する第2折線特性回路とを含む
部分を鎖線I内に示す。In this embodiment, a portion including a first broken line characteristic circuit corresponding to FG1 and a second broken line characteristic circuit corresponding to FG2 in FIG. 1 is shown within a chain line I.
パルス幅変調回路PWMとPWMの出力Tpを計測する
回路部分■は第2図と同様である。The pulse width modulation circuit PWM and the circuit section (2) for measuring the output Tp of the PWM are the same as those shown in FIG.
第4図の回路の特徴は第1折線特性回路の入出力特性に
おける折点と第2折線特性回路における折点とが合致す
るものが使用され回路Iの構或が簡素化されていること
である。The circuit shown in Fig. 4 is characterized by the fact that the break point in the input/output characteristic of the first broken line characteristic circuit matches the break point in the second broken line characteristic circuit, and the structure of circuit I is simplified. be.
第5図に折線特性回路部分■に含まれている第1折線特
性回路だけを抽出して示す。In FIG. 5, only the first broken line characteristic circuit included in the broken line characteristic circuit portion (2) is extracted and shown.
第5図において、第1折線特性回路Iは演算増幅器A1
を中心とする第1理想化ダイオードと演算増幅器A2を
中心とする第2理想化ダイオードとの2つの折点を含む
第3折線特性の回路である。In FIG. 5, the first broken line characteristic circuit I is an operational amplifier A1.
This is a circuit with a third broken line characteristic including two breaking points: a first idealized diode centered on A2 and a second idealized diode centered on operational amplifier A2.
いま、説明の便宜上第1理想化ダイオードに含まれる抵
抗R1,R4 およびRs1を等しい値に選べばバイア
ス電圧El31以下の範囲ではA1は非動作であり、e
x>EB1の範囲でのみ第1ダイオードの出力11にe
xと反対極性の出力電FEe1を発生する。Now, for convenience of explanation, if the resistors R1, R4 and Rs1 included in the first idealization diode are chosen to have equal values, A1 is inactive in the range below the bias voltage El31, and e
e to the output 11 of the first diode only in the range x>EB1
An output voltage FEe1 having a polarity opposite to x is generated.
またe)(> EB2の範囲ではA2が非動作であり
eX< EB2の範囲でのみ第2ダイオードの出力1
2にeXと反対極性の出力電圧e2が発生する。Also, e) (A2 is inactive in the range of > EB2, and the output of the second diode is 1 only in the range of eX < EB2.
2, an output voltage e2 of opposite polarity to eX is generated.
したがって、入力exに対する出力電流Ix’の特性は
第6図に示す如<EBIと一EB2とを折点とする折線
特性となる。Therefore, the characteristic of the output current Ix' with respect to the input ex becomes a broken line characteristic whose breaking points are <EBI and -EB2, as shown in FIG.
第5図の折線特性回路部分における抵抗Rxy△Rx1
+△Rx2 をそれぞれ他の抵抗RL ,△RLI
+△RL2に変えれば折点E B 1 p E B2
が第1折線特性回路の折点と一致し折線の傾斜のみが異
なる折線特性の第2折線特性回路が実現できる。Resistance Rxy△Rx1 in the broken line characteristic circuit portion of Fig. 5
+△Rx2 to other resistors RL and △RLI
If you change it to +△RL2, the break point E B 1 p E B2
It is possible to realize a second broken line characteristic circuit whose broken line characteristic coincides with the bending point of the first broken line characteristic circuit and differs only in the slope of the broken line.
第4図に示す折線特性回路部分Iは第l折線特性回路に
含まれている第1,第2の理想化ダイオードを第2折線
特性回路に共用したものである。The broken line characteristic circuit portion I shown in FIG. 4 is such that the first and second idealization diodes included in the lth broken line characteristic circuit are shared by the second broken line characteristic circuit.
第4図に示す実施例の入力exと出力Tpとの関係を第
7図の特性図に示しこれによってTp/ex特性を説明
する。The relationship between the input ex and the output Tp of the embodiment shown in FIG. 4 is shown in the characteristic diagram of FIG. 7, and the Tp/ex characteristic will be explained using this diagram.
いま、仮に第4図においてFG2回路部分をのぞきその
出力電流IL′をゼロと仮定すれば、exとTpの関係
は、EBI t− EB2 を折点電圧とし点線(1
)で示すような折線特性となる。Now, if we look into the FG2 circuit part in Fig. 4 and assume that its output current IL' is zero, the relationship between ex and Tp is expressed by the dotted line (1
) is a broken line characteristic.
この折線特性は第6図に示したFG1の入出力特性(e
x対I x’ )に相似する折線特性である。This broken line characteristic is the input/output characteristic of FG1 (e
x vs. I x' ).
実際にFG2によってIL’がPWMの基準電流Isに
加算される場合は入出力特性(ex対Tp )は例えば
実線(2)で示すような曲線を画く,exがーE B
2 < e X < E B 1 の範囲(これを中間
範囲と呼ぶ)におけるex対Tp曲線はex=0におい
て点線(1)の直線分a′b′に接しexが変化するに
したがって湾曲する。When IL' is actually added to the PWM reference current Is by FG2, the input/output characteristics (ex vs. Tp) will draw a curve as shown by the solid line (2), for example, when ex is -E B
The ex vs. Tp curve in the range 2<e
このex=Oにおける特性曲線(2)の傾きはRxによ
って定まり曲線の湾曲率(e)(の各点におけるexの
増加分△exに対するTpの増分△Tの比△TpAeの
変化率)はRLによって定ます。The slope of the characteristic curve (2) at ex=O is determined by Rx, and the curvature rate (e) of the curve (the ratio of the increment ΔT in Tp to the increment Δex in ex at each point of ΔTpAe) is RL Determined by
また、ex>EB1の範囲における特性曲線(2)はe
xがEB1を越える点で△Rx1および△RL1に関連
してその傾きおよび湾曲率が変化する。Moreover, the characteristic curve (2) in the range of ex>EB1 is e
At the point where x exceeds EB1, its slope and curvature change in relation to ΔRx1 and ΔRL1.
またe)(<−EB2の範囲ではexがーEB2以下に
なる点で△Rx2および△RL2に関連してその傾きお
よび湾曲率が変わる。Further, e) (In the range <-EB2, the slope and curvature change in relation to ΔRx2 and ΔRL2 at the point where ex becomes less than -EB2.
したがって、第4図の実施例回路によって所望の非線形
特性に近似する特性の変換回路を構成する場合、まずF
G1およびFG2の2つの折線電圧EB1,一EB2を
定め、この中間範囲の入力特性( Tp/e x )を
RxおよびRLによって所望の非線形特性に近似するよ
うに定め、e X > E B 1、およびe X <
E B 2の範囲の入出力特性を△Rx1 y△RL
1、および△Rx2 y△RL2 によって所望の非
線形特性に近似するように定める。Therefore, when constructing a conversion circuit with characteristics approximating desired nonlinear characteristics using the embodiment circuit of FIG.
Two broken line voltages EB1 and -EB2 of G1 and FG2 are determined, and the input characteristic (Tp/e x ) in this intermediate range is determined to approximate the desired nonlinear characteristic by Rx and RL, e X > E B 1, and e X <
E B The input/output characteristics in the range of 2 are △Rx1 y△RL
1, and ΔRx2 yΔRL2 to approximate the desired nonlinear characteristics.
本方式においては、FG1の特性を決定する回路要素R
x t△Rxl v△Rx2およびFG2の特性を決定
する回路要素RL ,△RL1,△RL2 の値を任
意所望の値に選定して目的とする非線形特性に近似する
特性の変換回路を構或するものであるから容易に近似性
のよい変換回路が実現できる。In this method, the circuit element R that determines the characteristics of FG1
The values of the circuit elements RL, ΔRL1, and ΔRL2 that determine the characteristics of x tΔRxl vΔRx2 and FG2 are selected to arbitrary desired values to construct a conversion circuit with characteristics that approximate the target nonlinear characteristics. Therefore, a conversion circuit with good approximation can be easily realized.
また、FG1を構成する回路要素の一部をFG2の回路
要素の一部に共用することができるので折点数の比較的
少ない折線特性の回路によって目的とする非特性特性と
よく近似する特性の変換回路が実現できる。In addition, since some of the circuit elements constituting FG1 can be shared with some of the circuit elements of FG2, it is possible to convert a characteristic that closely approximates the desired non-characteristic characteristic by using a circuit with a broken line characteristic with a relatively small number of break points. The circuit can be realized.
なお、本発明の回路要素である折線特性の回路は、第4
図の折線特性回路Iに限定するものではない。Note that the circuit with the broken line characteristic, which is the circuit element of the present invention, has the fourth
The present invention is not limited to the broken line characteristic circuit I shown in the figure.
折線特性を決定する回路要素およびその数を任意に選定
せるものでもよい。It is also possible to arbitrarily select the circuit elements that determine the broken line characteristics and the number thereof.
また、パルス幅変調回路の方式も他の方式のものでもよ
い。Further, the pulse width modulation circuit may be of another type.
入力信号Ixと基準信号Isとの比に対応する出力信号
Tpを発生する回路であればよい。Any circuit may be used as long as it generates the output signal Tp corresponding to the ratio between the input signal Ix and the reference signal Is.
第1図は本発明実施例の原理的な構成を示す。
第2図は本発明実施例に含まれるパルス幅変調回路を示
す。
第3図はパルス幅変調回路の出力の波形図を示す。
第4図は本発明実施例の具体的の構成を示す。
第5図は本発明実施例の折線特性回路部分の要部の構或
を示す。
第6図は第5図に示折線特性回路の入出力の関係を示す
特性線図である。
第7図は本発明実施例の入出力関係を説明するための特
性線図である。
FG1 ・・・第1電圧一電流変換回路、FG2・・・
第2電圧一電流変換回路、PWM・・・パルス幅変換回
路、■・・・出力信号計数回路。FIG. 1 shows the basic configuration of an embodiment of the present invention. FIG. 2 shows a pulse width modulation circuit included in an embodiment of the present invention. FIG. 3 shows a waveform diagram of the output of the pulse width modulation circuit. FIG. 4 shows a specific configuration of an embodiment of the present invention. FIG. 5 shows the structure of the main part of the broken line characteristic circuit part of the embodiment of the present invention. FIG. 6 is a characteristic line diagram showing the relationship between input and output of the differential line characteristic circuit shown in FIG. FIG. 7 is a characteristic diagram for explaining the input/output relationship of the embodiment of the present invention. FG1...first voltage-current conversion circuit, FG2...
Second voltage-current conversion circuit, PWM...pulse width conversion circuit, ■...output signal counting circuit.
Claims (1)
特性の第2電圧・電流変換回路と、入力電流と正負に極
性を反転する基準電流とにより入力電流と基準電流との
比に対応するパルス幅変調信号を発生するパルス幅変調
回路とを具備し、入力電圧を前記第1電圧・電流変換回
路によって変換せる第1出力電流を前記パルス幅変調回
路の入力に与えるとともに入力電圧を前記第2電圧・電
流変換回路によって変換せる第2出力電流を一定の電流
に加算せる可変電流を前記基準電流として使用し、前記
パルス幅変調回路の出力に前記第1出力電流と前記可変
の基準電流との比に対応する出力信号を得るように構成
せる非線形特性の変換回路。1. The ratio between the input current and the reference current is determined by a first voltage/current conversion circuit having a first broken line characteristic, a second voltage/current conversion circuit having a second broken line characteristic, and a reference current whose polarity is reversed to positive or negative with respect to the input current. a pulse width modulation circuit that generates a corresponding pulse width modulation signal, a first output current for converting the input voltage by the first voltage/current conversion circuit is provided to the input of the pulse width modulation circuit, and the input voltage is A variable current capable of adding a second output current converted by the second voltage/current conversion circuit to a constant current is used as the reference current, and the first output current and the variable reference are added to the output of the pulse width modulation circuit. A conversion circuit with nonlinear characteristics that can be configured to obtain an output signal corresponding to the ratio of the current.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13909477A JPS5837596B2 (en) | 1977-11-18 | 1977-11-18 | Conversion circuit with nonlinear characteristics |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13909477A JPS5837596B2 (en) | 1977-11-18 | 1977-11-18 | Conversion circuit with nonlinear characteristics |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5471963A JPS5471963A (en) | 1979-06-08 |
| JPS5837596B2 true JPS5837596B2 (en) | 1983-08-17 |
Family
ID=15237345
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13909477A Expired JPS5837596B2 (en) | 1977-11-18 | 1977-11-18 | Conversion circuit with nonlinear characteristics |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5837596B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4877981A (en) * | 1988-05-25 | 1989-10-31 | Ampex Corporation | Precision device for soft clipping AC and DC signals |
-
1977
- 1977-11-18 JP JP13909477A patent/JPS5837596B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5471963A (en) | 1979-06-08 |
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