JPS5840195B2 - Control waveform signal generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an envelope waveform signal generator used for controlling musical tones of electronic musical instruments, for example.

2. Description of the Related Art Among electronic musical instruments, synthesizers that form musical tones through voltage signal control are known.

These electronic musical instruments attempt to express the performer's naturalness and musicality by controlling pitch pinch, timbre, volume, etc. using envelope waveform signals generated in response to key operations. It is.

FIG. 1 shows an example of the basic configuration of such an electronic musical instrument, in which a keyboard circuit 11 generates a voltage pitch signal corresponding to the pitch of the operated key, as well as key press (key on) and release. Generates a keying signal corresponding to the key (key off).

The pitch signal from the keyboard circuit 11 is supplied to a VCO 12 (voltage controlled variable frequency oscillator), and this VCO 12 is controlled to oscillate a sound source signal with a frequency corresponding to the pitch of the operated key. The obtained sound source signal is V
A tone is formed by a CF13 (voltage controlled variable filter) to produce a musical tone signal.

The musical tone signal obtained from this VCF 13 is then
After setting the amplitude envelope with A14 (voltage controlled variable gain amplifier) and appropriately amplifying it with the amplifier 15, the speaker 16
and generate a performer.

In addition, the above VCO 12, VCF 13. For each VCA 14, an envelope generating circuit 17, 18.
The envelope waveform signal generated in step 19 is supplied as a control signal.

This envelope waveform signal is set to the initial level IL from the key press (key-on) as shown in FIG.
It rises to the attack level AL at the attack time AT, then decays to the sustain level SL at the 1st decay time IDT, maintains this sustain level SL, and then rises to the attack level AL at the attack time AT.
The signal is attenuated to the initial level IL.

In order to obtain such a waveform signal, a keying signal is coupled from the keyboard circuit 11 to each of the envelope generation circuits 17 to 19, and an IL, AT, AL,
It combines condition signals such as IDT, SL, 2DT, etc.

That is, from the envelope generation circuits 17 to 19, the VC
O12, VCF 13. By supplying the envelope waveform signal as described above to each of the VCAs 14 as a control signal, the pitch, timbre, and volume of the performance sound are modulated so that the performance sound can be expressed effectively.

FIG. 3 shows an example of an envelope waveform generating circuit used as described above, in which the input terminal 21 a +
2 l b and 21 c are voltage signals VAL that provide the level conditions AL, SL, and IL that form the above waveform;
Connects vSL and VIL, and also connects input terminals 22 a and 2
2 b 522 c has time conditions AT, I DT.

2 Voltage signal that causes DT ■AT, ■1DT, ■2D
Combine T.

These voltage signals are each set by a voltage dividing circuit using a variable resistor or the like in the control circuit 20.

The voltage signals coupled to the input terminals 21a to 21c are sent to switch circuits 23a to 23C each made of an FET.
and is coupled to a storage capacitor 25 via a voltage-controlled variable resistance circuit 24.

Further, the voltage signals from the terminals 22a to 22c are also combined together via switch circuits 26a to 26C each consisting of an FET, and are supplied to the variable resistance circuit 24 as a resistance value setting control signal.

Then, the terminal potential of the capacitor 25 is read through the high input impedance buffer 27 and used as a waveform signal.

Then, the output voltage signal from the high input impedance buffer 2γ and the signal voltage VAL from the input terminal 21a
When the output voltage of the high input impedance buffer 27 exceeds VAL, the flip-flop circuit 29 is set.

The keying signal from the keyboard circuit 11 is expressed as logic "1" when the key is released and logic rOJ when the key is pressed.
This keying signal is coupled to inverter 30 and switch circuit 23c.

26c as a closing command signal.

Further, the output signal of the inverter 30 is coupled to the AND circuit 31 together with the reset output signal of the flip-flop circuit 29, and the output signal of the AND circuit 31 is coupled to the switch circuit 2.
The output signal of the NOR circuit 32, which is supplied to 3a and 26a as a closing command signal and which is combined with the keying signal and the output signal of the AND circuit 31, is supplied to the switch circuits 23b and 26b.
It should be used as a closing command signal.

Then, a signal from the capacitor 33 with the keying signal and the logic rlJ signal added to both poles is applied to the inverter 34, and when the keying signal changes from "1" to rOJ, the inverter 34 generates an output "1" and the flip-flop circuit is activated. 29 will be reset.

That is, in the steady state when no key is pressed, the keying signal is rlJ, so the switch circuits 23c and 26c
is applied, and the terminal potential of the capacitor 25 is maintained at the initial level potential VIL.

Then, when the key is pressed in this state, the keying signal becomes "0".
, the flip-flop circuit 29 is reset, and the switch circuit 23 is reset by the output of the AND circuit 31.
a, 26a is closed, and the voltage signal VAL is applied to the variable resistance circuit 24.
are combined.

The resistance value of this resistor circuit 24 is set by the voltage signal VAT, and the capacitor 25 is set at VAL with a time constant corresponding to vAT.
will be charged up to.

When the terminal potential of the capacitor 25 reaches VAL, an output signal is generated from the comparator 28, and the flip-flop circuit 29 is set.

Therefore, since the output of the AND circuit 31 disappears and the keying signal is in the "0" state, the switch circuits 23b and 26b are turned on by the output signal from the NOR circuit 32.

That is, the input voltage of the variable resistance circuit 240 is VSL, the control voltage is VtDT, and the capacitor is VSL.
It changes to VSL with a time constant determined by IDT, and maintains that state while the key is pressed thereafter.

Then, when the key is released and the keying signal becomes rlJ,
The switch circuits 23c and 26c are turned on, the input terminal potential of the variable resistance circuit 240 becomes VIL, and the control voltage becomes V2.
DT, and the terminal potential of the capacitor 25 is changed to ■□1 with a time constant determined by V2DT.

Then, an envelope waveform signal as shown in FIG. 2 is read out and output as a change in the terminal potential of the capacitor 25.

Note that the power supply E connected to the negative terminal of the comparator 28 is a security power supply.

That is, since it takes an infinite amount of time for the charging voltage of the capacitor 25 to reach VAL, the comparator 28 theoretically does not operate forever.

Therefore, by connecting the security power supply E, capacitor 2
The comparator 28 is configured to operate when the charging voltage of the battery No. 5 reaches ①AL-E.

However, such an envelope waveform signal has a rising and falling edge of 1 when a key is pressed and a key is released.
Only the step change state is set, and it is not possible to determine the waveform change especially when the key is continuously pressed.

In other words, the envelope waveform is relatively unchanging, making it difficult, for example, to make the musical tone control more variable and to broaden the expressive power.

This invention was made in view of the above points, and not only allows the envelope waveform to be variably set in more stages, but also effectively expresses the sustained state and allows for more varied control commands. The present invention aims to provide a control waveform signal generation device that performs the following functions.

That is, the control waveform signal generation device according to the present invention sets a plurality of level setting voltage signals, takes out the voltage signals through each of the plurality of switch circuits, and couples them to a voltage storage element through a time constant circuit. The plurality of switch circuits are sequentially switched on and off in response to the count value of a counter that is incremented by a set time width signal.

An embodiment of the present invention will be described below with reference to the drawings.

Figure 4 shows its configuration, where the input terminal 41 a
, 4 l b...... are voltage signals VL□, vL□, which set the waveform level, respectively.
・ are combined, and this voltage signal VL□, vL2・
. . . are switch circuits 42a each consisting of an FET.

42b...... and are collectively coupled to the variable resistance circuit 24.

Further, the input terminals 43a, 43b, . . . are supplied with voltage signals ■T1.
vT2...... are combined, and these voltage signals ■A□ and VT2...... are respectively F.
Switch circuit 44 a 744 b... consisting of ET
. . . are collectively transmitted through each of them and supplied to the variable resistance circuit 24 as a resistance value setting signal.

A storage capacitor 25 is provided on the output side of the variable resistance circuit 24, and an envelope waveform output signal is obtained by reading the terminal potential of this capacitor 25 via a high human power impedance buffer 27.

Further, this device is provided with a counter 45, and a count signal of this counter 45 is applied to a decoder 46.

Then, the decoder 46 causes the switch circuit 4 to
2a, 42b...and 44a, 44
This is to control the sequential switching and closing of b...
As the count of the counter 45 advances, the switch circuits 42a and 44a, 42b and 44b, etc. are switched in combination.

The counter 45 is reset and set to the desired value by a differential output signal associated with key-on of the keying signal from the keying input terminal 47, and this differential output is further passed through an OR circuit 48 to a monostable multivibrator 49.
is combined as a trigger signal.

This monostable multivibrator 49 is configured as shown in FIG. 5, for example.

In FIG. 5, the comparator 50 has a control voltage vc and a resistor R1.
The power supply voltage V obtained through.

0 and controls the base of the transistor Tr1 according to its comparison output.

This transistor Tr1 acts as a switching element whose gate is controlled by the output of the comparator 50, and its emitter circuit is coupled to the voltage VCC via the resistor R1, and its collector circuit is grounded via the capacitor C. , this capacitor C is controlled to be charged with a time constant corresponding to the comparison output of the comparator 50.

Then, the terminal potential of this capacitor C is the resistance R2tR
The comparator 51 compares the divided voltage of Tr 3 with the voltage of the terminal Tr 2 and generates an output signal when the terminal potential exceeds a certain potential. The discharge is sometimes controlled.

That is, this monostable multivibrator 49 discharges the capacitor C when a trigger signal is applied, and then charges the capacitor C with a time constant determined by the control voltage Vc, and the terminal potential of the capacitor C is divided by the resistors R2 and R3. When the piezoelectric voltage is reached, the comparator 51 generates an output signal, and the rising edge of this output signal is detected by a differentiating circuit and is supplied to the counter 45 as a clock signal for counting steps, and is also supplied to the OR circuit 48. It is used as a trigger signal to the monostable multivibrator 49.

The control voltage vc for the monostable multi-bi flake 49 is supplied to the switch circuit 52a.

This switch circuit 52 a t 52 b has an input terminal 53 a.
, 53 b Time width designation signal vt□t from ``''...
It is formed by combining V,, -......

Here, the switch circuit 52a. 52 b---°---
-- is the switch circuit 42a.

42b......, 44a > 44b...
. . . and switching is sequentially controlled by the output signal of the decoder 46.

That is, in the device configured as described above, although not particularly shown, the terminal potential of the capacitor 25 is always
VLO corresponding to the initial level IL shown in Figure 2
It is set to .

When the keying signal rises with the key operation, the counter 45 is reset to the desired state in synchronization with this, and the decoder 46 controls the switch circuit 42a,
44a and 52a are set to be turned on.

Then, the resistance value of the variable resistor 24 is set corresponding to VTI, and the capacitor 25 is controlled to charge up to VLt with a time constant corresponding to the resistance value.

Further, at the same time as the counter 45 is reset, a trigger signal is applied to the monostable multi-by-break 49, and the capacitor C is controlled to discharge.

Thereafter, charging of the capacitor C is controlled in accordance with the V, 10 control voltage applied via the switch circuit 52a, and after a time period corresponding to the voltage vt1 has elapsed, the comparator circuit 52a
An output signal can be obtained from 1.

That is, the counter 45 is incremented after a time corresponding to the voltage vt□ after the key is turned on, and then the switch circuit 42b is incremented.
, 44b and 52b, and connect capacitor 25 to VT
The potential is changed to vL□ with a time constant corresponding to Vt2, and the counter 45 is then incremented after a time corresponding to Vt2 has elapsed, and this is sequentially repeated thereafter.

Therefore, the terminal potential of the capacitor 25 is the time width signal V
The time t1゜t corresponding to ,,V,,...
Level signals vL□, vLi・
vTl, vT2.・・・・・・
The waveform of the output envelope signal is as shown in Figure 6, for example.
The sustain duration part can also be effectively expressed by the time width signal.

In the above embodiment, the signal waveform from key-on is set to change step by step, but when used in an actual electronic musical instrument, it is also necessary to control the setting of the envelope waveform from key-off.

In this case, in the apparatus shown in FIG. 4, the reset of the counter 45 and the desired triggering command of the monostable multivibrator 49 via the OR circuit 48 may be performed by detecting the key-off of the keying signal.

That is, in FIG. 7, 54a and 54b are waveform signal generators as shown in FIG.
54b respectively have vLo and vL□.

......, VT 15 VT 2,...
......, VI, o', VI,,',...song...
.

In addition to a plurality of level signals VT1', VT□'... and a time constant setting signal, a time width signal vt1. vt2
．．・・・・・・・・・・・・

Vt1', Vt2', . . . are supplied.

The differentiating circuits 55a and ssb detect the rising edge (key-on) and falling edge (key-off) of the keying signal, respectively, and the waveform signal generators 54a and 54b
supply a reset signal to

Then, an output signal is extracted from the waveform signal generator 54a via a gate circuit 56a whose gate is opened when the key is on, and from the waveform signal generator 54b, an output signal is taken out through a gate circuit 56b whose gate is opened by an inverter 57 when the key is off.
By extracting the output signal through the key-off, a control waveform signal with a sustain envelope set can be obtained even after the key is turned off.

As described above, according to the present invention, it is possible to generate and control an envelope waveform signal in which highly arbitrary multi-step changes can be set according to the key operation state of an electronic musical instrument, and the level hold sustain state can also be set arbitrarily. This makes it possible to effectively set the diversity of various controls.

[Brief explanation of drawings]

FIG. 1 is a diagram for explaining an electronic musical instrument related to the present invention, FIG. 2 is a diagram for explaining a control waveform signal used in the electronic musical instrument, FIG. 3 is a diagram for explaining a means for generating the waveform signal, and FIG. 4
5 is a diagram showing a monostable multivibrator used in the above embodiment, FIG. 6 is a diagram showing an example of a generated waveform signal, and FIG. The figure is a diagram showing a configuration diagram in the case of corresponding to key press and release of an electronic musical instrument. 24...variable resistance circuit, 25...memory capacitor, 42 a, 42 b""・y 44
a y 44 b”...t 52 a, 52
b... Switch circuit, 45... Counter, 46... Decoder, 49... Monostable multi-bi break, 54a, 54b...
Waveform signal generator, 55a t 55b...differentiation circuit (rising, falling), 56a, 56b
・・・・・・Gate circuit.

Claims (1)

[Claims] 1 A switch circuit to which a plurality of set voltage signals are respectively coupled, and a voltage that commonly couples the voltage signals taken out from this switch circuit and reads the terminal potential whose charging and discharging is controlled with a set time constant as an output signal. A storage element, a counter that sequentially issues a switching input command to the plurality of switch circuits in accordance with the counted values thereof, and means for selecting a time width setting signal in response to the increment of the counter; A control waveform signal generating device characterized in that the counter is sequentially incremented by the counted time width.