JPS5842968B2 - Astable oscillator control circuit - Google Patents
Astable oscillator control circuitInfo
- Publication number
- JPS5842968B2 JPS5842968B2 JP52045439A JP4543977A JPS5842968B2 JP S5842968 B2 JPS5842968 B2 JP S5842968B2 JP 52045439 A JP52045439 A JP 52045439A JP 4543977 A JP4543977 A JP 4543977A JP S5842968 B2 JPS5842968 B2 JP S5842968B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- control circuit
- pulse
- control signal
- oscillator control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/20—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising resistance and either capacitance or inductance, e.g. phase-shift oscillator
- H03B5/24—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising resistance and either capacitance or inductance, e.g. phase-shift oscillator active element in amplifier being semiconductor device
Landscapes
- Electrophonic Musical Instruments (AREA)
Description
【発明の詳細な説明】
本発明は発振を開始した非安定マルチバイブレークから
唯1個のパルスを取出すことのできる制御回路に関する
。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control circuit capable of extracting only one pulse from an astable multi-by-break that has started oscillation.
従来電子楽器のリピートトーン発生用発振器は非安定マ
ルチバイブレータを使用し、押鍵と共に発振を開始した
マルチバイブレークからパルスを取出し楽音を制御して
いた。Conventional oscillators for generating repeat tones in electronic musical instruments use an unstable multivibrator, and control musical tones by extracting pulses from the multivibrator, which starts oscillating when a key is pressed.
即ち第1図に示すように第1トランジスタQ1、第2ト
ランジスタQ2とコンデンサC1,C2と抵抗素子等で
公知の非安定マルチバイブレータを構成し、両トランジ
スタのベースから各々抵抗素子R1,R2とダイオード
D0.D2とを介して共通に接続した端子を出力端子と
し、第2トランジスタQ2のベース端子に開閉素子とな
るトランジスタQ3を接続した発振器を使用する。That is, as shown in FIG. 1, a known unstable multivibrator is constructed from the first transistor Q1, the second transistor Q2, capacitors C1 and C2, and resistive elements, and from the bases of both transistors, resistive elements R1 and R2 and diodes are connected. D0. An oscillator is used in which a terminal commonly connected to D2 is used as an output terminal, and a transistor Q3 serving as a switching element is connected to the base terminal of a second transistor Q2.
トランジスタQ3のベースニ外部カらの制御信号として
押鍵に対応するキースイッチの閉路により例えば負の電
圧が急激に付加されるとトランジスタQ3がOFFとな
り、今迄第2トランジスタQ2のベースが接地状態にあ
り発振停止していたマルチバイブレータが発振を開始す
る。If, for example, a negative voltage is suddenly applied to the base of the transistor Q3 as a control signal from an external source by closing a key switch corresponding to a key press, the transistor Q3 is turned off, and until now the base of the second transistor Q2 has been grounded. The multivibrator, which had stopped oscillating, starts oscillating.
そしてベース電極に生じたパルスを抵抗素子・ダイオー
ドR1・Dl、R2・D2を経て取出し、楽音を制御し
ていた。Then, the pulse generated at the base electrode was taken out through resistive elements/diodes R1/Dl and R2/D2 to control musical tones.
非安定マルチバイブレータはその特性上キースイッチ閉
路中はパルス発生を接続するが、スタッカート奏法によ
る押鍵直後の離鍵の場合、出力端子から唯1個のパルス
出力を希望しても両トランジスタから当然1個ずつのパ
ルス出力が得られ、演奏上、聴感上好ましくない。Due to its characteristics, an unstable multivibrator connects pulse generation while the key switch is closed, but when a key is released immediately after being pressed in a staccato playing style, even if only one pulse is desired to be output from the output terminal, both transistors naturally generate pulses. A pulse output is obtained one by one, which is unfavorable in terms of performance and hearing.
第2図に示すタイムチャートにおいて、第2図Aにキー
スイッチ開閉に伴なうトランジスタQ3のベースへの入
力電圧、第2図Bに出力端子のパルス出力を示すと、時
刻T。In the time chart shown in FIG. 2, FIG. 2A shows the input voltage to the base of the transistor Q3 as the key switch opens and closes, and FIG. 2B shows the pulse output from the output terminal.
においてキースイッチが閉じられ、時刻T1において開
いたとき、パルス出力はPl、P2となる。When the key switch is closed at time T1 and opened at time T1, the pulse outputs become Pl and P2.
この場合時刻T2において不所望のパルスP2を生じ、
若し時刻T3で新たにキースイッチを閉じてもパルスP
3を直ちに得ることができず、時刻T4において発生し
ている。In this case, an undesired pulse P2 is generated at time T2,
Even if the key switch is newly closed at time T3, the pulse P
3 cannot be obtained immediately and occurs at time T4.
本発明は前述のような回路において発振を開始した非安
定マルチバイブレークから所望ならば唯1個のパルスを
取出すことのできる非安定発振器制御回路を提供するこ
とを目的とする。It is an object of the invention to provide an astable oscillator control circuit which, if desired, can extract only one pulse from an astable multi-by-break that has started oscillating in a circuit as described above.
以下本発明を電子楽器のリピートトーン発生用発振器に
適用した実施例について、第3図により詳細に説明する
。Hereinafter, an embodiment in which the present invention is applied to an oscillator for generating repeat tones of an electronic musical instrument will be described in detail with reference to FIG.
第3図においてQl、Q2.Q3.R1,R2,Dl。In FIG. 3, Ql, Q2. Q3. R1, R2, Dl.
D2.C1,C2は第1図と同様のものを示す。D2. C1 and C2 are the same as in FIG.
D3゜Q4は本発明における側路素子を構成するダイオ
ードとトランジスタを示し、一端は第2トランジスタQ
2のベース回路の抵抗素子R2、ダイオードD2の接続
点に接続され、トランジスタQ4のダイオードD3とは
反対側が電源端子子B(出力パルスに対する等何曲接地
点)に接続される。D3゜Q4 indicates a diode and a transistor constituting the bypass element in the present invention, one end of which is connected to the second transistor Q.
The transistor Q4 is connected to the connection point between the resistive element R2 and the diode D2 of the base circuit No. 2, and the opposite side of the transistor Q4 from the diode D3 is connected to the power supply terminal B (the ground point for the output pulse).
押鍵がなくキースイッチが開いているときはキースイッ
チ出力端子に信号がなく、トランジスタQ3= Q4は
共にONとなっている。When no key is pressed and the key switch is open, there is no signal at the key switch output terminal, and both transistors Q3 and Q4 are turned on.
第2図Aに示すように時刻T。At time T as shown in FIG. 2A.
でキースイッチが閉じると、トランジスタQ3− Q4
がOFFとなり、マルチバイブレークは発振開始し、第
2図Cのように1個のパルスPP、がダイオードD□を
介して生じる。When the key switch is closed, transistors Q3-Q4
turns OFF, the multi-by-break starts oscillating, and one pulse PP is generated via the diode D□ as shown in FIG. 2C.
そしてパルスPP1の生じている時刻T1においてキー
スイッチが開いたとき、トランジスタQ2のベースに生
じたパルス(PP2とする)は、そのときトランジスタ
Q3. Q、がONとなっているため、ダイオードD3
とトランジスタQ4とを経てパルスPP2は側路され、
パルス出力端子には現われない。Then, when the key switch is opened at time T1 when the pulse PP1 is generated, the pulse (referred to as PP2) generated at the base of the transistor Q2 is transmitted to the transistor Q3. Since Q is ON, diode D3
The pulse PP2 is bypassed through the transistor Q4 and the transistor Q4.
It does not appear on the pulse output terminal.
そして時刻T3においてキースイッチが閉じられるとパ
ルスはPP3と直ぐ生じ、時刻T、においてキースイッ
チ閉が続くとパルスPP4が発生する。Then, when the key switch is closed at time T3, a pulse PP3 is generated immediately, and when the key switch continues to be closed at time T, a pulse PP4 is generated.
マルチバイブレーク回路動作の開閉素子となるトランジ
スタQ3は側路素子のうちトランジスタQ4を介してマ
ルチバイブレーク発振・停止の判断信号が印加される。A multi-by-break oscillation/stop judgment signal is applied to the transistor Q3, which serves as an opening/closing element for the multi-by-break circuit operation, through a transistor Q4 among the bypass elements.
このようにして本発明によると簡易な付加回路によって
不所望のパルスを出力端子に生じさせず、キースイッチ
を閉じたとき直ちにマルチバイブレークが発振開始とな
るから、電子楽器に適用したとき例えばスタッカート奏
法による押鍵によっても所望パルスによるリピートトー
ン等が確実に得られるような有効な制御回路となってい
る。In this way, according to the present invention, an undesired pulse is not generated at the output terminal by a simple additional circuit, and the multivib break starts oscillating immediately when the key switch is closed. Therefore, when applied to an electronic musical instrument, for example, when playing a staccato This is an effective control circuit that can reliably produce repeat tones and the like using desired pulses even when keys are pressed.
第1図は従来の非安定マルチバイブレーク制御回路を示
し、第2図は動作説明用タイムチャートを示す。
第3図は本発明一実施例を示す回路図である。
Ql・・・・・・第1トランジスタ、Q2・・・・・・
第2トランジスタ、Q3・・・・・・開閉素子、Dl、
D2.D3・・・・・・ダイオード、R,、R2・・・
・・・抵抗素子、Q4・・・・・・トランジスタ。FIG. 1 shows a conventional unstable multi-by-break control circuit, and FIG. 2 shows a time chart for explaining the operation. FIG. 3 is a circuit diagram showing one embodiment of the present invention. Ql...First transistor, Q2...
Second transistor, Q3...Switching element, Dl,
D2. D3...Diode, R,, R2...
...Resistance element, Q4...Transistor.
Claims (1)
トランジスタの両ベースから各々抵抗素子とダイオード
とを介して共通に接続した端子をパルス出力端子とし、
第2トランジスタのベースに接続されマルチバイブレー
クの発振・停止を外部からの制御信号印加により制御す
る開閉素子を有する非安定発振器制御回路において、前
記第2トランジスタのベース回路の抵抗素子・ダイオー
ドの接続点と等価的接地点間に接続され且つマルチバイ
ブレータの発振・停止を制御する外部からの制御信号が
印加される前記パルス出力に対する側路素子を備え、前
記開閉素子は前記側路素子と同時に開閉制御されるよう
に前記側路素子を介して制御信号が印加されるよう接続
したことを特徴とする非安定発振器制御回路。1. The terminals commonly connected from the bases of the first and second transistors constituting the unstable multivibrator through respective resistive elements and diodes are used as pulse output terminals,
In an unstable oscillator control circuit having a switching element connected to the base of the second transistor and controlling oscillation/stop of the multi-by-break by applying an external control signal, a connection point between the resistive element and the diode of the base circuit of the second transistor; and a bypass element for the pulse output, which is connected between an equivalent ground point and to which an external control signal for controlling oscillation and stopping of the multivibrator is applied, and the switching element is controlled to open and close at the same time as the bypass element. An astable oscillator control circuit, characterized in that the control signal is applied through the bypass element so that the control signal is applied to the non-stable oscillator control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52045439A JPS5842968B2 (en) | 1977-04-20 | 1977-04-20 | Astable oscillator control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52045439A JPS5842968B2 (en) | 1977-04-20 | 1977-04-20 | Astable oscillator control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS53130012A JPS53130012A (en) | 1978-11-13 |
| JPS5842968B2 true JPS5842968B2 (en) | 1983-09-22 |
Family
ID=12719342
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52045439A Expired JPS5842968B2 (en) | 1977-04-20 | 1977-04-20 | Astable oscillator control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5842968B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55100735A (en) * | 1979-01-05 | 1980-07-31 | Hitachi Ltd | Oscillation circuit |
| EP2698645A2 (en) | 2004-05-31 | 2014-02-19 | Anritsu Corporation | Radar oscillator capable of preventing leak of oscillation output |
-
1977
- 1977-04-20 JP JP52045439A patent/JPS5842968B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS53130012A (en) | 1978-11-13 |
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