JPS5844219B2 - Frequency/phase voltage conversion circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a frequency/phase voltage conversion circuit that generates a voltage according to the frequency and phase of a certain signal.

Conventionally, in speed and phase control devices for servo motors and the like, a frequency-voltage converter circuit that generates a voltage according to frequency and a phase-voltage converter circuit that generates a voltage according to phase are configured as separate circuits.

Such a frequency voltage conversion circuit and a phase voltage conversion circuit are:
Since they include similar circuit elements in principle, attempts have been made to share a portion of both circuits in order to reduce costs (for example, Japanese Patent Laid-Open No. 48-6222), but this has not yet been sufficient.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a frequency-phase-voltage conversion circuit that generates a voltage according to both frequency change and phase change.

The present invention will be explained in detail below with reference to the accompanying drawings.

FIG. 1 shows an embodiment of the present invention. Reference numeral 1 denotes a waveform shaping circuit that shapes the waveform of an input signal applied to an input terminal 11, and generates positive phase and negative phase signals a and a according to the input signal. Occur.

A frequency dividing circuit 2 divides the frequency of the signal a into two, and similarly generates positive phase and negative phase signals S and b.

The signal S becomes the second timing pulse b which opens the output gate 8.

3.4 is an AND gate, which performs the logical product of signals a and K, and i and I, respectively, and the AND gates 3 and 4 constitute a logic circuit.

The output of gate 3 becomes the third timing pulse g which opens its output gate 10, while the output of AND gate 4 becomes the first timing pulse C which opens its output gate 5.

The gate 5 charges and supplies the voltage from the power source 12 to the capacitor 13 using the first timing pulse C which is the output pulse of the AND gate 4 .

The gate 8 causes the capacitor 13 to be discharged by means of a constant current source 14, which discharge takes place during the second timing pulse b, producing a sawtooth wave f with a descending slope.

This sawtooth wave f is sampled by a sample-and-hold circuit 16 via a gate 10 triggered by a third timing pulse g, which is a sampling pulse, and the sample-and-hold circuit 9 outputs the potential at that point as an output voltage. Supplied to terminal 17.

Furthermore, a reference signal generation circuit 6 that generates a reference signal pulse d having a reference phase, an AND circuit or an AND gate 7 for detecting the phase difference between the input signal pulse a and the reference signal pulse d, and the AND gate 7 The constant current source 15 is operated by the open state of the gate 9, and the constant current discharge of the capacitor 13 is performed.

The waveforms of the signals a-g and the signals supplied to the output terminal 17 are shown in FIG. 2 a-h.

As mentioned above, the gate 9 is opened by the output signal e of the AND gate 7, and the discharge current of the capacitor 13 increases, so that the slope of the downward slope part of the sawtooth waveform signal f changes, and the signal is sampled according to the change in phase difference. The output voltage of the sample-and-hold circuit 16 changes in response to changes in the frequency and phase of the input signal.

Further, as the sawtooth wave generating circuit, a similar effect can be obtained by using an upwardly sloped sawtooth wave generating circuit having an upwardly sloped portion instead of the downwardly sloped coppertooth wave as described above.

In this case, the reference power source 12 may be set to the ground potential, and the capacitor at the ground potential may be charged by a constant current source.

As the frequency dividing circuit, an integer frequency dividing circuit such as a frequency dividing by 3 as well as a frequency dividing by 2 circuit can be used, and a desired timing pulse can be obtained by using various circuits as the logic circuit.

From the above, it is clear that the frequency/phase voltage conversion circuit according to the present invention can be used not only for speed control of servo motors but also for various control devices, and has a small number of circuit elements, making a significant contribution to cost reduction. It can be done.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing operation waveforms of each part of the circuit of FIG. Explanation of main symbols, 2... Frequency divider circuit, 3, 4.7
...and gate, 5, 8, 9, 10...
...Gate circuit, 6...Reference signal generation circuit, 1
6...Sample/hold circuit.

Claims (1)

[Claims] 1. A frequency divider that divides the frequency of a human input signal, and a first timing pulse having a pulse width equal to a half period of the input signal by combining the input signal and the output of the divider, and then a logic circuit for generating a second timing pulse with a pulse width equal to at least one period of the input signal and then generating a third timing pulse with a pulse width equal to half a period of the input signal; It consists of a sawtooth wave generation circuit that generates a sawtooth wave voltage, and a sample hold circuit that samples and holds the voltage of the sawtooth wave at the time of generation of the third timing pulse, and the sawtooth wave generation circuit has a reference phase. a reference signal generation circuit that forms a slope of the sawtooth wave during the existence period of the second timing pulse, and changes to the slope according to a phase difference between the input signal and the reference signal generation circuit; A frequency/phase voltage conversion circuit characterized in that it is configured to. 2. The sawtooth wave generation circuit includes a power storage circuit, a circuit that charges the power storage circuit to a predetermined voltage according to the first timing pulse, and a constant current discharge of the power storage circuit during the existence period of the second timing pulse. It is characterized by including a first discharge circuit, a detection circuit that detects a phase difference between the input signal and the reference signal, and a second discharge circuit that discharges the electricity storage circuit at a constant current according to the output of the detection circuit. A frequency/phase voltage conversion circuit according to claim 1. 3. The frequency/phase voltage conversion circuit according to claim 2, wherein the detection circuit is a gate circuit that performs a logical product of the input signal and the reference signal.