JPS5845191B2 - photo diode array - Google Patents
photo diode arrayInfo
- Publication number
- JPS5845191B2 JPS5845191B2 JP51146587A JP14658776A JPS5845191B2 JP S5845191 B2 JPS5845191 B2 JP S5845191B2 JP 51146587 A JP51146587 A JP 51146587A JP 14658776 A JP14658776 A JP 14658776A JP S5845191 B2 JPS5845191 B2 JP S5845191B2
- Authority
- JP
- Japan
- Prior art keywords
- substrates
- photodiode
- photodiodes
- diode array
- photo diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000758 substrate Substances 0.000 claims description 25
- 239000004065 semiconductor Substances 0.000 claims description 9
- 238000009792 diffusion process Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 229920006332 epoxy adhesive Polymers 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 238000010002 mechanical finishing Methods 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
Description
【発明の詳細な説明】
模写電送等において、読取りの速度を向上するためにフ
ォトダイオードアレイが用いられる。DETAILED DESCRIPTION OF THE INVENTION Photodiode arrays are used in photocopy transmission and the like to improve the reading speed.
すなわち多数のフォトダイオードを一列(こ配列し2、
原画をその配列方向と直角に移動させて各ダイオードか
ら信号を並列に取出すもので、新聞紙の読み取りに必要
な程度の解像度を得るためには1間の幅に3〜5個のフ
ォトダイオードを配列する必要がある。In other words, a large number of photodiodes are arranged in a row (2,
The original image is moved perpendicular to the direction in which it is arranged, and signals are extracted from each diode in parallel.To obtain the resolution necessary for reading newspapers, three to five photodiodes are arranged in a width of one square. There is a need to.
また同一半導体基板上に複数個のフォトダイオードを形
成する場合は、励起キャリヤの拡散長の関係から各々の
間に20μm程度の間隔を設けなければならないから、
1つのフォトダイオード180μmX180μm程度の
犬さとなる。Furthermore, when forming multiple photodiodes on the same semiconductor substrate, it is necessary to provide an interval of about 20 μm between each photodiode due to the diffusion length of excited carriers.
One photodiode has a dog size of about 180 μm x 180 μm.
かつ原画は一般にA4またはB4の大きさを有するから
フォトダイオードアレイの全長は200〜2601fL
mを必要とするが、シリコン等の単結晶半導体基板は径
50mm程度の円板であるから、これを帯状に切断して
用いると、その各々にフォトダイオードアレイを形成し
て更(こ複数個の帯状基板を一直線状に連結する必要が
ある。Moreover, since the original picture is generally A4 or B4 in size, the total length of the photodiode array is 200 to 2601 fL.
However, since a single-crystal semiconductor substrate such as silicon is a disk with a diameter of about 50 mm, if this is cut into strips and used, a photodiode array is formed on each of the strips. It is necessary to connect the strip-shaped substrates in a straight line.
しかし帯状半導体基板の端部を切断し、研磨して突き合
せると機械的加工の精度の点から、それらの間に100
μm程度の間隙が生ずることを避は得ない。However, if the edges of a strip-shaped semiconductor substrate are cut, polished, and butted, there will be a gap of 100% between them due to the accuracy of mechanical processing.
It is unavoidable that a gap on the order of μm will occur.
この間隙は同一基板上に形成されたフォトダイオードの
間隔20μmより遥かに大きいから基板の継目において
解像度が低下する。Since this gap is much larger than the 20 μm gap between photodiodes formed on the same substrate, the resolution decreases at the joint between the substrates.
従って従来は基板の継目には、該基板上のフォトダイオ
ード列から外れた位置に更に他のフォトダイオードを配
置し、その出力に一定の遅延を与えて、連結された基板
上におけるフォトダイオードの出力と共に送出する装置
が用いられていた。Therefore, conventionally, at the joint of the substrates, another photodiode is placed at a position away from the photodiode array on the substrate, and a certain delay is given to the output, so that the output of the photodiodes on the connected substrates is A device was used to send out the same.
しかしフォトダイオードアレイの構造が複雑で製作も煩
雑になると共(こ遅延回路等を必要とするから回路構成
も複雑であり、かつ遅延時間の誤差によって充分な解像
度が得られない等の欠点があった。However, the structure of the photodiode array is complicated, making it complicated to manufacture (this requires a delay circuit, etc., so the circuit configuration is also complicated, and there are disadvantages such as not being able to obtain sufficient resolution due to errors in delay time). Ta.
従って本発明はこのような欠点のないフォトダイオード
アレイを提供するものである。The present invention therefore provides a photodiode array that does not have these drawbacks.
第1図は本発明実施例の平面図、第2図はその縦断面図
、また第3図は第1図の一部を拡大した図である。FIG. 1 is a plan view of an embodiment of the present invention, FIG. 2 is a vertical sectional view thereof, and FIG. 3 is an enlarged view of a part of FIG. 1.
このように基台1に帯状のシリコン単結晶基板2,3を
エポキシ系接着剤で貼着すると共に基板2,3の端部を
突き合せた接合部にも上記接着剤4を塗布しである。In this way, the band-shaped silicon single crystal substrates 2 and 3 are adhered to the base 1 with an epoxy adhesive, and the adhesive 4 is also applied to the joint where the ends of the substrates 2 and 3 are butted together. .
基板2,3は例えばn型導電性の半導体であってその表
面にp型不純物の拡散層5を形成し、かつ中央を帯状に
残して両側をエツチングにより除去すると共に残った帯
状部に例えば20μmの幅のきざみ目を入れて、180
μmX180μmの大きさの正方形状フォトダイオード
6.6・・・・・・を形成しである。The substrates 2 and 3 are, for example, n-type conductive semiconductors, and a p-type impurity diffusion layer 5 is formed on their surfaces, and both sides are removed by etching, leaving a strip in the center, and a 20 μm thick layer is formed on the remaining strip. Insert the width of 180
A square photodiode 6.6 having a size of μm×180 μm is formed.
すなわち帯状の基板2,3の上にフォトダイオード6.
6・・・・・・が1間に5個の密度をもって一列に配列
されている。That is, photodiodes 6. are placed on the strip-shaped substrates 2 and 3.
6... are arranged in a line with a density of 5 pieces per space.
また各ダイオードにおける拡散層5の上には金属電極バ
ッド7を設け、かつ上記フォトダイオード列の両側に添
着した絶縁体層8の−Lに金属端子層9,9・・・・・
・を形成して例えば径25μの金線10.10・・・・
・・で各電極パッド7と端子層9とをそれぞれ接続しで
ある。Further, a metal electrode pad 7 is provided on the diffusion layer 5 of each diode, and metal terminal layers 9, 9 are provided on -L of the insulator layer 8 attached to both sides of the photodiode row.
For example, a gold wire 10.10 with a diameter of 25μ is formed.
. . . to connect each electrode pad 7 and terminal layer 9, respectively.
従って基板2,3を接地すると、端子層9,9・・・・
・・から各フォトダイオード6.6・・・・・・の出力
を得ることができる。Therefore, when the boards 2 and 3 are grounded, the terminal layers 9, 9...
The output of each photodiode 6.6 can be obtained from .
上述の半導体基板2,3は、その端部をダイオード6.
6・・・・・・の配列方向に対して例えば45度の角度
aをもって切断し、この切断端面を突き合せである。The semiconductor substrates 2 and 3 described above have their ends connected to diodes 6.
6... are cut at an angle a of, for example, 45 degrees with respect to the arrangement direction, and the cut end surfaces are butted.
なおこの場合に、上記端面の機械的仕上精度の点から、
突き合わされた端面の間に100μm程度の間隙すを設
けなければならない。In this case, from the viewpoint of mechanical finishing accuracy of the end face,
A gap of about 100 μm must be provided between the abutted end faces.
また基板2,3の端面c、dはこれを所定の間隙すをも
って対設したとき、基板2のダイオード列と基板3のダ
イオード列とが所定のピッチで連続的に配列されて一連
のダイオードアレイを構成するようにしである。When the end surfaces c and d of the substrates 2 and 3 are placed opposite each other with a predetermined gap, the diode rows of the substrate 2 and the diode rows of the substrate 3 are continuously arranged at a predetermined pitch, forming a series of diode arrays. This is how you configure it.
すなわち図は基板2および3の端部のダイオード6□お
よび63がそれぞれ一3角形状に切断され、それらが合
体して1つのフォトダイオードを形成したもので、この
ような場合は上記2つのダイオードを金線10で連結し
て1つの端子層に接続する。In other words, the figure shows that the diodes 6□ and 63 at the ends of the substrates 2 and 3 are cut into triangular shapes and combined to form one photodiode.In such a case, the two diodes mentioned above are connected to one terminal layer by connecting them with a gold wire 10.
しかし第3図(こ鎖線で示したように基板2,3の端部
のダイオードの一部だけが欠除する場合はこのような必
要がなく、それぞれを独立のダイオードとして別の端子
層に接続する。However, if only a portion of the diodes at the ends of substrates 2 and 3 are removed, as shown by the chain lines in Figure 3, this is not necessary and each can be connected to a different terminal layer as an independent diode. do.
上記実施例のように本発明は帯状半導体基板の端部を、
斜めに切断して、突き合せたものである。As in the above embodiments, the present invention provides an edge portion of a strip-shaped semiconductor substrate,
It is cut diagonally and butted together.
従って前記実施例においては基板2,3の端部のフォト
ダイオード62と63とが、ダイオード列に直角な走行
方向において距離eだけ重合する。Therefore, in the embodiment described, the photodiodes 62 and 63 at the ends of the substrates 2 and 3 overlap by a distance e in the running direction perpendicular to the diode array.
すなわち基板2,3の連結部に全く間隙を生じないから
、この部分の解像度が低下するような欠点がなく、しか
も各フォトダイオードがすべて実質的lこ一直線上lこ
配置されるから遅延回路lこよって信号発生時刻の差を
補償する等の必汝がないと共にフォトダイオードアレイ
の構造も簡単で、その製作が容易である。In other words, since there is no gap at all between the connecting parts of the substrates 2 and 3, there is no drawback that the resolution in this part is degraded.Furthermore, since all the photodiodes are arranged substantially in a straight line, the delay circuit is not required. Therefore, there is no need to compensate for differences in signal generation times, and the structure of the photodiode array is simple, making it easy to manufacture.
なお前記実施例の場合は、連結部における1つの)第1
・ダイオードの受光面積が3分の1程度に減少する。In addition, in the case of the above embodiment, one) first
・The light-receiving area of the diode is reduced to about one-third.
しかし模写電送のよう(こ原画を黒白の二値信号に変換
する場合は、フォトダイオードの出力をスライサに加え
てマーク、スペース信号を得るから、そのスライスレベ
ルを比較的低く設定することにより、例等支障を生じな
いものである。However, when converting an original image into a black and white binary signal, such as when copying and transmitting data, the output of the photodiode is added to a slicer to obtain mark and space signals, so by setting the slice level relatively low, etc. will not cause any problems.
第1図は本賢明実施例の平面図、第2図は第1図のフォ
トダイオードアレイの縦断面図、第3図は第1図の一部
を拡大した図である。
なお図において、1は基台、2,3はシリコン単結晶半
導体基板、4は接着剤、5は不純物拡散層、6はフォト
ダイオード、7は電極パッド、8は絶縁体層、9は金属
端子層、10は金線である。FIG. 1 is a plan view of this sensible embodiment, FIG. 2 is a vertical sectional view of the photodiode array of FIG. 1, and FIG. 3 is an enlarged view of a part of FIG. 1. In the figure, 1 is a base, 2 and 3 are silicon single crystal semiconductor substrates, 4 is an adhesive, 5 is an impurity diffusion layer, 6 is a photodiode, 7 is an electrode pad, 8 is an insulator layer, and 9 is a metal terminal. Layer 10 is gold wire.
Claims (1)
た複数個の帯状半導体基板の端部を上記フォトダイオー
ドの配列方向(こ対して傾斜するように斜めに切断し、
各半導体基板の端部を突き合せて連結することにより所
望の長さとなしたことを特徴とするフォトダイオードア
レイ。1. The ends of a plurality of strip-shaped semiconductor substrates each having a plurality of photodiodes formed in a row are cut diagonally in the direction in which the photodiodes are arranged.
A photodiode array characterized in that a desired length is obtained by butting and connecting the ends of each semiconductor substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP51146587A JPS5845191B2 (en) | 1976-12-08 | 1976-12-08 | photo diode array |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP51146587A JPS5845191B2 (en) | 1976-12-08 | 1976-12-08 | photo diode array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5371591A JPS5371591A (en) | 1978-06-26 |
| JPS5845191B2 true JPS5845191B2 (en) | 1983-10-07 |
Family
ID=15411074
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP51146587A Expired JPS5845191B2 (en) | 1976-12-08 | 1976-12-08 | photo diode array |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5845191B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA1175884A (en) * | 1980-06-25 | 1984-10-09 | Hugh St. L. Dannatt | Light emitting diode assembly |
| JP6403369B2 (en) * | 2013-09-18 | 2018-10-10 | ローム株式会社 | Photodetector and sensor package |
-
1976
- 1976-12-08 JP JP51146587A patent/JPS5845191B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5371591A (en) | 1978-06-26 |
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