JPS5847716B2 - Envelope control circuit for electronic musical instruments - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an envelope control circuit for an electronic musical instrument, and has a configuration in which the power supply voltage is directly variable controlled to control the charging voltage and discharging voltage of a capacitor, thereby controlling the level with a simple circuit configuration. It is an object of the present invention to provide an envelope control circuit that can obtain a variety of different envelope signals.

Generally, electronic musical instruments such as electronic organs and synthesizers are configured to obtain a desired sound by controlling the amplitude of a sound source signal from an oscillator using an envelope having a desired shape.

Here, the envelope signal used for a single musical instrument such as a synthesizer is the time (rise time, attack time) from when the key switch is activated until it reaches a predetermined level.
, the time (decay time, decay time) from reaching a predetermined level to reaching the level that should be maintained (sustain level), the time maintained at the sustain level, the time from the sustain level to the release level after the key switch is turned off. It can be considered by breaking it down into the time when it decays at a fast rate and the time when it remains as a lingering sound.

In this case, in order to obtain the desired gain, a method of controlling only the level while keeping the time of each part of the envelope constant (gain control) can be considered, but since the envelope has a complex configuration, the gain control circuit will be complicated. In the past, there was no circuit that controlled gain in this way.

In addition, in a compound instrument such as an electronic organ that requires an envelope or shaping circuit for each key, a gain control circuit cannot be provided due to cost and space considerations, and as shown in Fig. 1, the rise time t'1 is Constant fall time t'2
At present, only a circuit for controlling only t'4 is provided.

The present invention has been made in view of the above facts, and one embodiment thereof will be described with reference to FIG. 2 and subsequent figures.

FIG. 2 shows a circuit diagram of one embodiment of an envelope control circuit for an electronic musical instrument according to the present invention.

In the same figure, when the key switch 1 is closed at time t1 (Fig. 3A>, the output terminal 2a of the logic circuit 2 is
An H level signal as shown in FIG. From the output terminal 5, a voltage as shown by curve 3 in FIG. 3E is taken out.

At this time, the capacitor C is charged at a voltage such that Vo = the capacitance value of the capacitor C, R the resistance value, and t the charging time.

When the terminal voltage of the capacitor C becomes higher than the inversion level voltage Vc of the input terminal of the comparator 6 at time t2, the state of the comparator 6 is inverted.

As a result, the signal from the output terminal 2a of the logic circuit 2 is L.
At the same time, a signal of H level as shown in FIG. 3C is taken out from the output terminal 2b, and this signal is supplied to the discharge circuit and the sustain circuit 7.

As a result, the gate of the charging circuit 3 is closed, and the discharge circuit 7
The gate of capacitor C starts to discharge, and its terminal voltage attenuates as shown by curve 2 in FIG. 3E.

At this time, the anti-R1 of comparator 6 level voltage V.

is ■c-VB・ like R1+R2 It is expressed as follows.

Here, the terminal voltage of capacitor C? o is V = VC
−f dt (i is the discharge current C and t is the discharge time).

Note that when the current i is a constant current, the envelope becomes linear, but there is no problem in practical use.

The terminal voltage of capacitor C is changed to sustain circuit 7 at time t3.
When the voltage attenuates to the sustain level Vs set at , the terminal voltage of the capacitor C is maintained from time t3 as shown by curve 2 in FIG. 3E.

Here, the sustain circuit 7 is configured as shown in FIG. 4, for example, and the sustain level Vs is expressed as R4 Vs=vB.

R3+R4 When the key switch 1 is opened at time t4, the output terminal 2b (FIG. 3C) of the logic circuit 2 becomes L level and the sustain circuit 7 is turned off, and at the same time, an H level signal is received from its output terminal 2c. The signal is output and supplied to the release circuit 9, which operates the release circuit 9, which has the same structure as the sustain circuit shown in FIG.

As a result, the capacitor C is rapidly discharged from time t4 to the release level vR set in the release circuit 9 with a time constant smaller than the discharge time constant of the discharge circuit 7, as shown by the curve (■) in FIG. 3E. , after which it is discharged slowly.

Note that the release action provides the necessary lingering time for the sound.

Here, if it is desired to obtain an envelope signal with a smaller gain than the envelope signal shown by curve (2) in FIG. 3E, the voltage value VB of the power source 4 is variably set so as to be smaller than in the above case.

As in the case described above, when the key switch 10 is closed at time t1, the charging circuit 3 is activated by the signal from the logic circuit 2 shown in FIG. 3B, thereby charging the capacitor C.

At this time, since the current value supplied to the charging circuit 3 is set to be smaller than that in the above case, the capacitor C
The terminal voltage of is small, and the envelope is slow compared to the rise time of curve (2), as shown in curve (2) in FIG. 3E.

When the terminal voltage of the capacitor C becomes equal to the inversion level voltage ■'c of the comparator 6 at time t2, the state of the comparator 6 is inverted.

At this time, since the voltage of the power supply 4 is set to a voltage V'H smaller than that in the above case, the inverted level voltage 2c of the comparator 6 becomes a voltage V'c that is smaller than that in the above case.

Here, instead of changing the values of resistors R1, R2 and capacitor C, the voltage Vc, charge circuit 3, discharge circuit and sustain circuit 7, and release circuit 9 are made proportional to the power supply voltage vB to apply it to the input terminal of the comparator 6. Since the voltage value applied to the emparator 6 is varied, the relative ratio of the voltage applied to each input terminal of the emparator 6 to the constant time is always constant regardless of the magnitude of the voltage of the power source 4.

Therefore, even if the voltage of the power supply 4 reaches v'B, the comparator 6 inverts its state at time t2 as in the case described above, and R1 at this time becomes the inversion level voltage V.

is Vε-yB・ and R1+R2 Ru.

Due to the reversal of the state of the comparator 6, the capacitor C is discharged, and its terminal voltage increases at time t as shown by the curve
2 Attenuates more.

Note that when controlling the amount of discharge current using a constant current circuit, there is a linear slope from time t2 to t3, and when the power supply voltage is variably set to a small value, the slope is the same as that before varying the power supply voltage. It is small compared to the slope.

In addition, when the discharge is controlled by a discharge resistor, there is a curved slope from time t2 to t3, and the slope when the power supply voltage is variably set to a small value is smaller than the slope before the power supply voltage is varied. It is.

When the terminal voltage of capacitor C attenuates to the sustain level V'S at time t3, the terminal voltage of capacitor C is maintained from time t3 as shown by the curved line in FIG. 3E.

At this time, the discharge amount of the discharge circuit 7, which is configured in the same way as the circuit shown in FIG. , Rehe R3+R
4. Since the ratio between level V8 and level V'S is always constant regardless of the magnitude of the voltage of power supply 4, the time when the terminal voltage of capacitor C reaches level V'S is time t3, as in the previous case. be.

When the switch 1 is opened at time t4, the capacitor C is rapidly discharged to the release level v8 with a time constant smaller than that at time t4, as shown in FIG. 3E, by the same operation as described above.
After that, it is discharged slowly.

In this embodiment, the envelope due to spontaneous discharge after time t4 is made to become zero at time t5 by discharging at different discharge time constants in curves ■ and ■. In the case (2), both discharges may be performed with the same discharge time constant, and the lingering times may be made different.

Note that, without using a comparator, the time t1 to t4 in FIG.
The waveforms shown in FIGS. 3B, D, and F, which correspond to the above, may be taken out, and the gates of the charging circuit or the discharging circuit may be opened using these waveforms to charge and discharge the capacitor.

Further, a discharge circuit, a sustain circuit 7 and a release circuit 9
Actually, a buffer is provided, and the output is output through the buffer to the output terminal 5.

Furthermore, by appropriately varying the resistances provided in the charging circuit 3, the discharging circuit, the sustain circuit 7, and the release circuit 9, it is possible to vary the sustain level and the release level at times t2 and t3 in FIG. 3E, respectively.

Furthermore, the present invention is not limited to electronic organs;
It can be similarly applied to monophonic musical instruments such as synthesizers.

Furthermore, the attack circuit 3 is constituted by a simple circuit as shown in FIG.

As described above, the envelope control circuit of the electronic musical instrument according to the present invention charges a capacitor in a key switch provided corresponding to a plurality of keys from the moment the key switch is closed, and increases the terminal voltage of the capacitor. and a reference voltage, and when the terminal voltage of the capacitor reaches the reference voltage level, a circuit is connected that inverts the state and discharges the capacitor, and controls the sound envelope from the terminal of the capacitor. In the envelope shaping circuit of an electronic musical instrument configured to extract an envelope signal,
Since the reference voltage is configured to change with changes in the power supply voltage for charging the capacitor, it is possible to obtain various envelope signals with different levels, and it is possible to obtain simple circuits such as comparators and logic circuits. H
Furthermore, when obtaining a small level envelope, the power supply voltage is lowered, so that current consumption can be saved.

[Brief explanation of drawings]

FIG. 1 is an envelope signal waveform diagram of a conventional electronic organ, and FIGS. 2 and 3 A to 3 are circuit diagrams of one embodiment of an envelope control circuit of an electronic musical instrument according to the present invention, and for explaining its operation. 4 is a specific circuit diagram of the sustain circuit shown in FIG. 2, and FIG. 5 is a specific circuit diagram of the attack circuit shown in FIG. 2. 1...-Key switch, 2...Logic circuit, 3...Charging circuit, 4...Power supply, 5...
...Output terminal, 6...Comparator, 7
...Discharge circuit and sustain circuit, 9...
...Release circuit, C...Capacitor, R1~
R4---Resistance.

Claims (1)

[Claims] 1 A capacitor is charged from the time when the key switch is provided corresponding to each of the keys and the key switch is closed, and the terminal voltage of the capacitor is determined by comparing the terminal voltage of the capacitor with a reference voltage. An envelope for an electronic musical instrument, comprising a circuit that inverts the state and discharges the capacitor when the reference voltage level is reached, and extracts an envelope signal for controlling the sound envelope from the terminal of the capacitor. 1. An envelope control circuit for an electronic musical instrument, characterized in that, in the shaping circuit, the reference voltage changes in accordance with changes in a power supply voltage for charging the capacitor.