JPS584831B2 - Bipolar negative resistance semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an internal structure of a bipolar negative resistance semiconductor device with an improved external current carrying rate α.

The operation of conventional semiconductor devices of this type is NPN (or PNP).
The base-open operation of a transistor is explained in detail.

That is, it is known experimentally that the relationship of Vc = VB 1 - α holds when the external current carrying rate α of the NPN transistor, the breakover voltage VB, and the voltage Vc after entering the negative resistance region are set. , breakover voltage V
When a voltage exceeding B is applied to the element, the current increases rapidly, the external current carrying rate α approaches 1, the voltage Vc becomes smaller than the breakover voltage VB, and negative resistance characteristics are exhibited.

Based on this principle, the emitter injection efficiency γ and the base transmission efficiency β have been increased in order to increase the external current carrying rate α.

That is, in order to increase the emitter injection efficiency γ, the impurity concentration of the emitter layer is made higher than that of the base layer, and in order to increase the base transmission efficiency β, the width of the base layer is made narrower.

For this reason, for example, the width W of the base layer of the mesa-shaped negative resistance element shown in FIG. 1 is approximately 10 to 30 microns, and it has not been easy to control this with high precision.

Also, in order to prevent damage to the wafer during the process, a minimum thickness of about 150 microns is required, so the bonding part J1
, J2 was 60 to 70 microns deep, and the long-term high-temperature diffusion caused local variations in the junctions J1 and J2, disordered crystals, etc., and also caused a reduction in the lifetime of minority carriers.

On the other hand, one way to lengthen the lifetime of minority carriers is to increase the specific resistance of the base layer, but this increases the breakover voltage VB and deviates from the actual circuit constant. This creates a contradiction in that the depth of the joints J1 and J2 must be made shallow and the width of the base layer must be made wide.

Furthermore, as shown in Figure 1, P of the conventional two-polar negative resistance element
The N-junctions J1 and J2 exposed portions are sloped by etching the semiconductor substrate to prevent the elements from being destroyed due to voltage breakdown.

However, since a long etching process is involved, there are drawbacks such as increased production costs.

The present invention solves these various problems, and consists of a semiconductor base layer with a high specific resistance, and a highly impurity layer having a conductivity type opposite to that of the base layer, which is provided on both sides in contact with the base layer. a low resistivity base layer having the same conductivity type as the base layer and having a high impurity concentration surrounding at least one of the semiconductor layer having a high impurity concentration and a semiconductor layer having a conductivity type opposite to the base layer and having a bottom surface in contact with the base layer; and an electrode provided on the outer surface of a semiconductor layer of conductivity type.

Embodiments of the present invention will be described below with reference to FIG. 2 a, which is a sectional view, and FIG. 2 b, which is a plan view.

In FIGS. 2a and 2b, 1 is a base layer made of a high resistivity P-type silicon semiconductor with a thickness of 200 microns and a resistivity of 10 to 100 Ωcm, and 2 and 3 are base layers 1 provided in contact with both sides of the base layer 10. 4 and 5 are N-type semiconductor layers 2 and 5, respectively, which have a high impurity concentration and a conductivity type opposite to
A low resistivity P-type base layer with a high impurity concentration surrounds the type semiconductor layer 3 and has a bottom surface in contact with the base layer 1, and 6 and 1 are electrodes provided on the outer surfaces of the N-type semiconductor layer 2 and the N-type semiconductor layer 3, respectively. be.

The thickness of the N-type semiconductor layers 2 and 3 is 15 microns.

In the manufacturing method of the present invention shown in this example, an N-type epitaxial layer is formed on both sides of a high-resistivity P-type silicon substrate serving as the base layer 1 while doping, for example, phosphorus as an impurity, and then a P-type Impurities such as boron are diffused into the epitaxial layer to form low resistivity P-type semiconductor layers 4 and 5 whose bottom surfaces are in contact with the P-type silicon substrate.

As a result, N-type semiconductor layers 2 and 3 are also formed as an epitaxial layer surrounded by P-type semiconductor layers 4 and 5.

Finally, electrodes 6 and 7 are provided.

As described above, the bipolar negative resistance semiconductor device of the present invention has a base layer 1 having a wide base layer 1 having a high specific resistance, and a base layer 4 having a narrow low specific resistance having the same width as the N-type semiconductor layers 2 and 3. , 5.

Therefore, recombination of carriers flowing from the N-type semiconductor layer 2 or the N-type semiconductor layer 3 to the base layer occurs only slightly,
The breakover voltage is not determined by the high resistivity base layer 1 but is determined by the junction between the low resistivity base layer 4 and the N-type semiconductor layer 2 and the junction between the low resistivity base layer 5 and the N-type semiconductor layer 3.

Therefore, by appropriately selecting the dimensions of the N-type semiconductor layers 2 and 3 and the low resistivity base layers 4 and 5, the breakover characteristics can be determined.

In the embodiment, a low resistivity base layer 4 is formed on both sides of the high resistivity base layer 10 so as to surround the N-type semiconductor layer 2 and the N-type semiconductor layer 3.
Although the low resistivity base layer 5 and the low resistivity base layer 5 are respectively provided, it is not necessarily necessary to provide the low resistivity base layer on both sides, and it is also possible to provide the low resistivity base layer on only one side and only the N-type semiconductor layer on the other side. By providing low resistivity base layers 4 and 5 of P+ conductivity type, the breakover voltage can be controlled and the junction between high resistivity base layer 1 and N-type semiconductor layers 2 and 3 can be controlled. is prevented from being exposed from the side surface of the semiconductor substrate.

Thus, according to the present invention, it is not necessary to accurately control the width of the base layer, and since it is possible to use a thick semiconductor substrate, cracking during the process is reduced, which is a great advantage in terms of manufacturing technology.

Furthermore, when another element is provided along with this element on the outer base layer 10 surface of the low resistivity base layer 4 or the low resistivity base layer 5, the low resistivity base layer 45 plays the role of isolation. It can also serve as

Furthermore, as is well known, the two-pole negative resistance element shown in FIG. By forming the base layers 4 and 5, the structure is such that the bonding portion is not exposed from the side surface of the semiconductor device.

Therefore, there is an advantage that it is not necessary to form a beveled structure by etching or the like over a long period of time.

Note that the present invention is not limited to the embodiments, and it is possible to reverse the conductivity type, change the dimension of each component, or protect the entire structure by covering it with an insulating film. This does not depart from the scope of the invention.

[Brief explanation of the drawing]

Figure 1 is a sectional view of a pellet of a conventional mesa-type negative resistance element, Figure 2a is a sectional view of a pellet of a bipolar negative resistance semiconductor element of the present invention, and Figure 2b is a plan view of Figure 2a. 1......High resistivity P type base layer, 2,3...
......N-type semiconductor layer, 4,5...
...Low resistivity P type base layer.

Claims (1)

[Claims] 1 A semiconductor substrate formed by an epitaxial growth method with first and second semiconductor layers of conductivity type opposite to that of the semiconductor base layer on both sides of the high resistivity semiconductor base layer, and having the same conductivity as the high resistivity semiconductor base layer. First and second low resistivity base layers of a conductive type and having a high impurity concentration are placed at the peripheral edges of the first and second semiconductor layers such that their bottom surfaces are in contact with the high resistivity semiconductor base layer, respectively. Diffused to form the high specific resistance half i
The method is characterized in that the joint between the body spacer layer and the first and second semiconductor layers is prevented from being exposed from the side surface of the semiconductor substrate, and electrodes are formed on the main surfaces of the first and second semiconductor layers. A bipolar negative resistance semiconductor device.