JPS5848865B2 - Storage battery deterioration determination device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to determining the deterioration state of a storage battery, and in particular to a device that determines the deterioration state of a lead-acid battery from the characteristics at the end of charging. The relay is connected via a normally closed contact that is controlled to open and close, and the measurement load is connected via a normally open contact that opens and closes in synchronization with the normally closed contact. An inflection point detection circuit is connected to the output terminal of the inflection point detection circuit to detect whether or not the terminal voltage that changes due to charging has changed in a characteristic having an inflection point under the control of a timer circuit. A display circuit is connected to the display circuit, and the state of deterioration of the storage battery is determined from the state of the inflection point that appears at the end of charging of the storage battery, which is displayed by the display circuit.

In general, storage batteries, particularly lead-acid batteries, are widely used in both mobile and stationary applications, and the role of storage batteries as an emergency backup power source is particularly important.

Therefore, conventional storage battery deterioration conditions, such as a situation where the storage battery has reached the end of its life even though it was fully charged and the capacity has decreased, or a situation where the storage battery was fully charged and had capacity, but the capacity decreased significantly after a few times, that is, self-discharge became large. Various methods have been proposed for detecting the state etc. in advance.

As a method for determining the deterioration of a storage battery, there is a method of determining the magnitude of the overvoltage caused by gas generation based on the voltage level at the end of charging.

This method can be easily measured with just a voltmeter and an ammeter if you use the charging current as a parameter and investigate the relationship between the voltage at the end of charging and the lifespan in advance, but the high voltage at the end of charging is due to overvoltage due to gas generation. There is a problem in that it cannot be determined whether the voltage is due to an overvoltage caused by the apparent internal resistance of the storage battery or, in the case of a multi-cell storage battery, a voltage increase due to contact resistance at the connection between the cells.

Another method is to use a third electrode (auxiliary electrode) to
There is also a method of measuring the change in voltage between the electrode and the cathode, but this method requires changing the structure of the storage battery and has the disadvantages of requiring a third electrode for each cell, which requires time and effort to maintain this electrode. ing.

Another method is to discharge the battery at a constant resistance for several minutes and determine the state of deterioration based on the terminal voltage at that time, but this method discharges the battery for several minutes, so large capacity batteries may generate heat. For storage batteries used as an emergency power source, if you happen to need an emergency power source while determining the state of deterioration (during a constant resistance discharge for several minutes), you should consider that the battery is being discharged. Therefore, there is a problem in that there is a possibility that emergency equipment (even if the capacity is small) may not work, leading to a fatal accident.

The present invention has been made in view of the above points, and its purpose is to determine the deterioration state of a storage battery from the state of the inflection point that appears at the end of charging due to the magnitude of overvoltage generated by gas generation during charging. The purpose of the present invention is to provide a device that does the following.

Another purpose is to provide a device that allows determination of deterioration without requiring skill.

Still another object is to provide something that can be applied to large capacity storage batteries.

Furthermore, another object is to provide a system that does not cause accidents such as inability to drive even during the determination of deterioration of the storage battery.

Still another object of the present invention is to provide a device that can be incorporated into a float charging system to automatically determine deterioration.

Specifically, the characteristic having an inflection point that appears in the characteristic curve when charging a storage battery is mainly due to the overvoltage generated by hydrogen gas at the end of charging, and is always present in a storage battery that has not deteriorated.

In addition, in deteriorated storage batteries, alloy components (antimony in lead-acid batteries) are eluted into the positive electrode grid of the storage battery due to long-term charge/discharge cycles and electrodeposited on the negative electrode plate.
The dissimilar metal reduces the overvoltage for hydrogen gas generation,
Inflection points no longer appear.

On the other hand, the presence of dissimilar metals on the plates will result in the formation of local batteries and promote self-discharge.

Therefore, it can be said that a storage battery with an unclear inflection point has progressed in deterioration and self-discharge has increased.

Now, after charging a lead-acid battery that is considered to have completed charging 1 at 100C, performing -C discharge for 10 seconds, and then performing iooC20 charging for 50 seconds, the change in terminal voltage is measured by the difference from the constant voltage. , storage battery Ba that has not yet deteriorated
As shown in Figure 1A, the charging characteristic curve of No. 1 has inflection points A, B, and C.
2 or incompletely charged storage battery Ba3 has been confirmed to exhibit characteristics with an inflection point A as shown in Figure 1, and the rise characteristics at the time of switching from discharging to recharging are mainly Since this is due to the apparent internal resistance of the storage battery, it can be seen that the larger the rise, the higher the apparent internal resistance of the storage battery, or the greater the contact resistance of the connection part in multi-cell storage batteries. The overvoltage caused by gas generation can be confirmed by the presence of the subsequent inflection point B, and the clearer the presence of the inflection point B, the more fully charged the battery is and the less deterioration has progressed.

Focusing on this point, the present invention detects the presence or absence of the inflection point B and displays it on a display means to determine the deterioration of the storage battery. Figure 2 smell? , 1 is a storage battery to be measured, and 2 is a charger connected between the terminals of the storage battery 1 via a normally closed contact Xb that is controlled to open and close by a control signal from a timer circuit 6. For example, the AC power supply voltage is connected to a transformer. It is designed to supply a full-wave rectified DC voltage through the

3 is a measurement load connected between the terminals of the storage battery 1 via a normally open contact X which is controlled to open and close in synchronization with the normally closed contact X5 by the control signal of the timer circuit 6, and is It has become.

4 is an inflection point detection circuit connected between the terminals of the storage battery 1 that detects an inflection point in the charging characteristic curve when switching from discharging during measurement to recharging; Voltage ■ depending on the opening and closing of closed contact Xb and normally closed contact Xa
h is detected and stored at predetermined time intervals, the stored voltage is calculated, the inflection point is detected based on the magnitude of the calculated value, and the detection signal is connected to the output terminal of the inflection point detection circuit 4. The signal is sent to the displayed display circuit 5.

The inflection point detection circuit 4 and display circuit 5 will be explained with reference to FIG. , grounded via resistor R2, and the differential amplifier A
The inverting input terminal of MP1 connects the terminal voltage 8 of the storage battery 1 to a preset reference voltage 8 via a resistor R4.
Terminal voltage as the difference voltage between ■.

A reference voltage setting circuit (■8) is connected to increase the change in S of the storage battery 1, and a negative feedback resistor (R3) is connected between the inverting input terminal and the output terminal of the differential amplifier AMP. A differential amplifier circuit 7 is provided in which the differential voltage (V, -V8) of the reference voltage ■8 is derived from the output terminal of the differential amplifier AMP1 at a predetermined amplification degree.
Memory capacitors C1, C2, and C3 are connected to the output terminal of the memory capacitors C1, C2, and C3 via normally open contacts X1a, X28, and X3a, respectively, which are controlled to open and close by the control signal of the timer circuit 6.
are inserted between the ground and connected to the non-inverting input terminals via resistors R5, R7, R, respectively. Negative feedback is provided between the inverting input terminals and output terminals of high power resistance amplifiers AMP2, AMP3, and AMP4. Resistors R6, R8, R.

Memory circuits 8, 9, and 10 each having a memory cell inserted therein are connected in parallel.

Reference numeral 11 connects the inverting input terminal of the differential amplifier AMP5 to the output terminal of the memory circuit 8 via a resistor Rll, and connects a negative feedback resistor R12 between the inverting input terminal and the output terminal.
is inserted, and the non-inverting input terminal of the differential amplifier AMP5 is connected to the output terminal of the storage circuit 9 via a resistor R, 3, and is grounded via a resistor R14. The difference (vo vs) between the output voltage (■) of the memory circuit 9 and the output voltage (■8) of the memory circuit 8 is calculated and the result is (■) shown in FIG.
1 by a predetermined amplification degree α.

12, similar to the differential amplifier circuit 11 above, a resistor R15, a negative feedback resistor R16, a differential amplifier AMP6, and resistors R17, R18.
A differential amplifier circuit formed by the above-mentioned differential amplifier A
The inverting input terminal of MP, is connected to the output terminal of the memory circuit 9 via a resistor R15, and the non-inverting input terminal is connected to the resistor R15.
17 to the output terminal of the memory circuit 10, and output voltage VIO of the memory circuit 10 and output voltage VIO of the memory circuit 9,
(VIO V9) is operationally amplified to derive 2 shown in FIG.

13 is a differential amplifier circuit connected to the output terminals of the differential amplifier circuits 11 and 12, and the inverting input terminal of the differential amplifier AMP7 is connected to the output terminal of the differential amplifier circuit 11 via a resistor R19. A negative feedback resistor R20 is inserted between the inverting input terminal and the output terminal, and the non-inverting input terminal of the differential amplifier AMP7 is connected to the output terminal of the differential amplifier circuit 12 via the resistor R21, so that the differential Output voltage α■1 of amplifier circuits 11 and 12
The difference (V2-α■1) between

The display circuit 5 includes a display M consisting of a DC voltmeter or the like.
is grounded via a resistor R23, and responds to the output (V2-α1) of the inflection point detection circuit 4 to indicate a value corresponding to the output.

The differential amplifier circuit 13 is provided to detect the magnitude of the overvoltage due to gas generation in the storage battery 1, and the output voltage (2) of the differential amplifier circuit 12 is There is an overvoltage (resistance overvoltage, activation overvoltage, diffusion overvoltage, etc.) due to the internal resistance above, and on the other hand, the differential amplifier circuit 1
1's output voltage α■ 1's voltage ■ can be seen as an overvoltage due to the apparent internal resistance, so the above output voltage
The increase in the terminal voltage of the storage battery 1 due to the overvoltage due to gas generation is detected by subtracting the voltage v1 from Charged undegraded mountain self discharge is small)
If it is a storage battery, ■2》Is it confirmed that there is a v1 relationship? According to actual measurements, the overvoltage due to gas generation is several hundred mV/cell at the charging current of TTT)C, while the overvoltage due to the apparent internal resistance is several iomV/cell, which is an order of magnitude smaller. To determine whether it is sufficiently large, the apparent internal resistance is determined by subtracting the output voltage 2 of the differential amplifier circuit 12 by the output voltage α■ of the differential amplifier circuit 11, which is amplified by the amplification degree α (for example, 5). By sufficiently eliminating the overvoltage caused by gas generation, it is clear that the storage battery 1
The increase in terminal voltage is derived.

Further, to explain the timer circuit 6 with reference to FIG. 4, a starting switch S1 and a voltage dividing resistor R24 e R25 are connected in series between the output end of a constant voltage power supply (not shown) and the ground, and the voltage dividing resistor R24 j Connect the input end of the NOR circuit NOR1 to the connection point with R25 via the noise prevention capacitor C4, connect one of the input ends of the NOR circuit NOR2 to the output end of this NOR circuit, and connect the other input end of the NOR circuit NOR2 to the output end of this NOR circuit. It is connected to the input end of the NOR circuit NOR, through a CR time constant circuit consisting of a diode D1 inserted in the opposite direction and a resistor R26 and a capacitor C5 connected in parallel, and the output end of the NOR circuit NOR2 is connected to the input end of the NOR circuit NOR2. The power supply voltage ■ is connected to the output end of a constant voltage power supply (not shown).

Relay X receiving 0 and resistor R28 connected to the ground side
Connect the base of transistor Q1, whose collector and emitter are inserted in series between A normally open contact X and a normally closed contact X which operate in conjunction with this relay is connected to the output terminal of the NOR circuit NOR.

One of the output terminals of this NOR circuit NOR3 is connected to the NOR circuit NOR4 and the resistor R29 whose input terminals are commonly connected.
■ Connected to the output end of a constant voltage power supply (not shown) through the power supply voltage.

Relay X that receives 0, and resistor R30 connected to the ground side
The "L" level output sent by the NOR circuit NOR3 is connected to the base of the transistor Q2 which is inserted in series between the collector and emitter of the transistor Q2 through the NOR circuit NOR4 as the "H" level output. Q2 to make the transistor Q2 conductive to excite the relay X1, and to open and close the relay X1 in conjunction with the normally open contact X1a of the memory circuit 8 of the change point detection circuit 4, The other output end of the NOR circuit NOR3 has a diode D2 inserted in the opposite direction and a resistor R connected in parallel.
3 and capacitor C.

and a CR time constant circuit consisting of the NOR circuit NOR.
Connect to the commonly connected input terminal of 5, and connect this NOOR circuit NO.
The output end of R5 is connected to a constant voltage power supply (not shown) via a resistor R3 to supply a power supply voltage V.

Relay X2 receiving 0 and resistor R33 connected to the ground side
When the NOR circuit NOR5, connected to the base of the transistor Q3 inserted in series between the collector and emitter, outputs e'L" level to its input terminal, ""Hps.
A level output is sent to make the transistor Q3 conductive to excite the relay X2, and the normally closed contact X2a of the memory circuit 9 of the inflection check circuit 4 which is interlocked with this relay X2 is provided to be closed. A diode D3 inserted in the opposite direction is connected to the commonly connected input terminal of NOR6, and a CR time constant circuit consisting of a resistor R34 and a capacitor C7 connected in parallel, and the output terminal of this NOR circuit NOR6 is connected to the resistor R35. Connected to a constant voltage power supply (not shown) via the power supply voltage ■.

Relay X3 receiving 0 and resistor R3 connected to the ground side
6 and connected to the base of a transistor Q4 inserted in series between the collector and emitter, and the ゜H'' level output of the NOR circuit NOR6 makes the transistor Q4 conductive, energizes the relay X3, and works in conjunction with this relay X3. It is provided to close the normally open contact X3a of the memory circuit 10 of the inflection point detection circuit 4.

Next, the operation will be explained with reference to FIG. 5. When the input ends of the timer circuit 6 are connected to a constant voltage power supply (not shown) and the starting switch S1 is turned on, the voltage dividing point of the voltage dividing resistor R24 t R25 is The output becomes "H" level, and the NOR circuit NOR1 receiving this becomes It L jj
The level output is sent to one of the input terminals of the NOR circuit NOR2.

In response to this, the other input terminal of the NOR circuit NOR2 remains at the "L" level until the time limit t1 determined by the CR time constant of the resistor R26 and the capacitor C5 is reached.
1, the output of the NOR circuit NOR2 is held at the HP+ level.

This "H" level output conducts the transistor Q1 and excites the relay X, which closes the normally open contact X and opens the normally closed contact Xba. 3 is connected and the storage battery 1 is discharged.

On the other hand, the output of the NOR circuit NOR3, which receives the ``H'' level output of the NOR circuit NOR2 and the ``LI1'' level output of the NOR circuit NOR1, becomes the ``L'' level, so the NOR circuits NOR4, NOR5, and NOR6 are tt
Relays X1 and X2 send out H” level outputs respectively.
,

Due to this closed circuit, the memory circuits 8, 9, 'to receive the terminal voltage VB of the storage battery 1 via the differential amplifier circuit 7 as a differential voltage (V~■8) with the reference voltage 8, and the capacitor Cl
tC2 and C3 are charger amplifiers AMP2 and AM, respectively.
Since the magnitudes of the outputs of P3 and AMP4 are the same at this time, the output voltages of the memory circuits 8 and 9.10 are
1o is the same, and the differential amplifier circuits 1, 1, 12 and 1
The display circuit 5 receives no output through the ffllJ51t load 3, and the display circuit 5 does not respond while the storage battery 1 is discharging to the ffllJ51t load 3.

Eventually, when the time limit 11 (for example, 10 seconds) determined by the CR time constant of the resistor R26 and the capacitor C5 is reached,
The output of the NOR circuit NOR2 changes from ゜゛H'' level to at
Lpp level is reached, transistor Q1 is made non-conductive, relay , this charger 2 starts charging the storage battery 1.

On the other hand, the output of the NOR circuit NOR, which receives the output of the t( L #j level of the NOR circuit NOR2, becomes the ゜'H'' level, so the output of the NOR circuit NOR4 becomes ``''L 11
level, transistor Q2 becomes non-conductive, relay X1 becomes non-excited, and memory circuit 8 of inflection point detection circuit 4
Since the normally closed contact X,a of is opened, the capacitor C holds (memorizes) the lowest value when the storage battery 1 stops discharging, and the output voltage 8 of the memory circuit 8 becomes this lowest value.

On the other hand, the input terminals of the NOR circuits NOR5 and NOR6 also receive the Hpg level output of the NOR circuit NOR3, but the time limit t2 is determined by the CR time constants of the resistor R3 and the capacitor C6, and the CR time constant of the resistor R34 and the capacitor C7. Since the input is at the "L" level until reaching t3, relays X2 and X3 are energized.

Then, when the time limit t2 (for example, lsec) determined by the CR time constant of the resistor R31 and the capacitor C6 is reached,
The output of the NOR circuit NOR5 becomes ゜゛L'' level, making the transistor Q3 non-conductive, and the relay X2 becomes non-energized, opening the normally open contact X2a of the memory circuit 9 of the inflection point detection circuit 4, and storing the memory as described above. The capacitor C2 of the circuit 9 stores the terminal voltage VB during charging of the storage battery 1 through the differential amplifier circuit T as a differential voltage with respect to the reference voltage 8.

Furthermore, when the time limit t3 (for example, 50 seconds) determined by the CR time constant of the resistor R34 and the capacitor C7 is reached, the output of the NOR circuit NOR6 becomes the ``Lpp level'', making the transistor Q4 non-conductive and deenergizing the relay X3. The normally open contact X3a of the storage circuit 10 of the bending point detection circuit 4 is opened, and the capacitor C3 of the storage circuit 10 stores the output voltage of the differential amplifier circuit 7 after time t3 from the start of recharging the storage battery 1, as described above. do.

As a result, the output voltages of the memory circuits 8, 9, 10 ■8, ■9
,■,.

are the time periods t1 and 3 from the start of Mlffl of the storage battery, respectively.
1+t2, becomes the output voltage of the differential amplifier circuit 7 after t1+t3, and the differential amplifier circuit 7 that receives this becomes the output voltage of the differential amplifier circuit 7. 11 amplifies the difference voltage (V9V8) between the output voltages 8 and 8 of the memory circuits 8 and 9 by a predetermined amplification degree α and supplies it to one of the input terminals of the differential amplifier circuit 13 as an output voltage α■1. The output voltage V9tV10 of the memory circuits 9 and 10 is applied to the other input terminal of the differential amplifier circuit 13 via the differential amplifier circuit 12.
Since the differential voltage (V1o Vo) is received as the output voltage ■2, the differential amplifier circuit 13 outputs the differential voltage (■2 - αV1) between these input voltages α■1 and V2 to the display circuit 5. supply

In response to this, the display M of the display circuit 5 displays the differential voltage (V2
-α■1) Give instructions according to the size of the dog.

This completes the inflection point detection operation.

Therefore, if the indicated value by the indicator M is large, that is, if the differential voltage (■2-α■,) is in the relationship (■2-αV,))0, it is determined that the storage battery 1 has not deteriorated. If the indicated value on the display M is small, that is, the difference voltage (V2-α■1
) is in the relationship (V2 - αV,) < 0, it is 1 of deterioration. After recharging (for example, 1 hour with ioc'), open and close the switch S of the timer circuit 6 again. As described above, the inflection point detection operation is performed, and if the result is larger than the previous indicated value, the storage battery 1 is insufficiently charged and has deteriorated.
If there is no change from the previous time, it is determined that the storage battery 1 has deteriorated, and the storage battery 1 is replaced in preparation for an emergency, for example.

In this embodiment, the state of the inflection point is ? Since the deterioration is detected as a crack, it is possible to determine not only the degree of deterioration but also the degree of deterioration.The indicated value on the display is stabilized by a memory circuit, so it is easy to read and can be determined in a short time. Since the amount of electricity discharged by measurement is extremely small compared to the nominal capacity, this does not accelerate deterioration of the storage battery at all.

FIG. 6 shows another embodiment in which the present invention is incorporated into a float charging system. Components with the same functions are designated by the same reference numerals. 1 is the storage battery to be measured, 2 is the storage battery to be measured, and 2 is the storage battery to be measured. The charger is connected between the terminals of the storage battery 1 via a normally closed contact X, which is controlled to open and close by a timer circuit 6, and is used to perform float charging and equal charging on the secondary side of a power transformer connected to an AC power source, for example. A full-wave rectifier circuit using a rectifying element is connected to this tap through a normally closed contact X4b and a normally open contact X4a, which are connected to this tap so that the tap can be changed, to supply DC power. ing.

Reference numeral 3 denotes a permanent load connected between terminals of the storage battery 1, and includes a control section for controlling an emergency power supply device 8a connected, for example, in parallel with the permanent load 3, and an indicator light therefor.

4 is an inflection point detection circuit connected between terminals P and N of the storage battery 1, which detects inflection points A and C of the charging characteristic curve of the storage battery 1 during deterioration measurement shown in FIG. An output is sent to the display circuit 5 depending on whether the point has occurred only once at point A or twice at point A and point C within a predetermined period of time, and the display circuit 5 indicates when there is an inflection point twice. If it is an output, for example, turn on a blue indicator light to determine that the storage battery 1 has not deteriorated, and if it is an output when there is only one inflection point, turn on a yellow indicator light and re-measure. The inflection point is detected again using the output of the timer circuit 6 and the inflection point is 1.
Only once. If so, the output turns off the yellow indicator light and turns on, for example, a red indicator light to indicate that the storage battery 1 is deteriorating.

The inflection point detection circuit 4 connects the non-inverting input terminal a and the inverting input terminal b of the differential amplifier AMP8 to the input terminal P via resistors R3 and R38, respectively, and also connects the inverting input terminal b to the inverting input terminal b. A capacitor C8 is connected between the ground and a CR time constant circuit is formed with the capacitor C8 and a resistor R38, and diodes D4 and D are connected in antiparallel between the input terminals a and b of the differential amplifier AMP8. A protection circuit for the differential amplifier AMP8 is provided by inserting the differential amplifier AMP8.
A diode D6 is inserted in the opposite direction between the output terminal and the ground via a resistor R39 to clamp the output when it becomes negative, thereby configuring the pulse generating circuit PU, and connecting the input terminal P
When the terminal voltage of the storage battery 1 is applied between the input terminal N and the grounded input terminal N, the voltage applied to the inverting input terminal b of the differential amplifier AMP8 is equal to
Since there is a delay by a time period determined by the time constant, when the storage battery 1 is discharging, the voltage applied to the inverting input terminal b becomes higher than the voltage applied to the non-inverting input terminal a by (baa), and the output becomes a negative output (a- b(0), but it is clamped by resistor R39 and diode D6 and becomes O level (“L”).
level) is maintained, and when the storage battery 1 switches from discharging to charging, the terminal voltage of the storage battery 1 instantaneously rises to a certain level, so the voltages applied to the non-inverting input terminal a and the inverting input terminal b are once equalized. (a=b), and then the voltage applied to the inverting input terminal b follows the voltage applied to the non-inverting input terminal a with a delay determined by the CR time constant of the resistor R38 and the capacitor C8, so the differential amplifier AMP8 at this time The output of is positive (a-b)O), and when the slope of the charging characteristic curve is zero, the non-inverting input terminal a and the inverting input terminal b are equal <
(a=b), so the output becomes 0 (°"L pp level) (strictly speaking, it varies depending on the offset input voltage, but there is no particular need to adjust the offset input voltage).

That is, the output of the differential amplifier AMP8 is inverted and becomes positive ('°H' level) when the storage battery 1 switches from discharging to charging, and further inverted when both input voltages become equal < (a = b). A square wave pulse that becomes 0 ("L" level) is sent out as an output.

The input terminal CP of a falling-operation type flip-flop circuit FF1 is connected to the output terminal of this pulse generating circuit PU, and the output terminal Q of this flip-flop circuit FF is connected to the output terminal of this pulse generating circuit PU.
1 connects the input terminal Cp2 of the flip-flop circuit FF2 of the falling operation type, and connects the input terminal Cp2 of the flip-flop circuit FF2 of the falling operation type.
One input of the NOR circuit NOR7 is connected to the output terminal Q2 of the flip-flop circuit FF, and the other input is connected to the output terminal Ω1 of the flip-flop circuit FF.
The output terminal Q1 of the flip-flop circuit FF1, which instantaneously inverts at the falling edge of the output pulse, changes from ``H'' level to ゜゛L.
” level, flip-flop circuit FF2
Output terminal Q2, Q2? It is designed to send out an inverted output.

One of the input terminals of the NOR circuit NOR8 is connected to the output terminal of the NOR circuit NOR7 through the NOT circuit NOT1, and the other is connected to the output terminal of the NOR circuit NOR7 through the CR time constant circuit formed by the resistor R4o and the capacitor C. circuit NOR
When the output of the NOR circuit NOR7 is at the ゜゛H'' level, the NOR circuit NOR is activated for a period of time determined by the CR time constant of the resistor R40 and the capacitor C.
The output of 8 is held at the "H" level.

The output terminal of this NOR circuit NOR8 is connected to the input terminal CP3 of the flip-flop circuit FF3 of the falling operation type, as described above.
and the input terminal CP4 of the flip-flop circuit FF of the falling operation type was connected to the output terminal Q3 of this flip-flop circuit FF3, so that the output of the NOR circuit NOR8 changed from the "H" level to the "L" level. When the output terminal Q3 of the flip-flop circuit FF3 is inverted from the "H" level to the "LI+" level, the output of the flip-flop circuit FF4 is inverted by its output.

Therefore, the output terminal Q of this flip-flop circuit FF4
4, the NOR circuit NOR, via the NOT circuit NOT2.
At the same time, the other input of an OR circuit OR1 is connected to the output terminal Q2 of the flip-flop circuit FF2 via a NOT circuit NOT3, and the output terminal I of the OR circuit OR1 is connected to the output terminal Q2 of the flip-flop circuit FF2. A timer circuit is connected to the other inputs of the NOR circuit NOR9 and NOR,1, and the NOR circuit NOR12 has one input connected to the NOR circuit NOR1, and one input connected to the output terminal of the flip-flop circuit FF2. The output end of the timer circuit T2 of 6 is connected via the NOT circuit NOT7, and the output of the NOR circuit NOR, , NOR1, , NOR1 is sent to the display circuit 5 as an output signal of the inflection point detection circuit 4. It has become.

Further, the output terminal of the OR circuit OR2, one of whose inputs is connected to the output terminal Q2 of the flip-flop circuit FF2, and the other input of which is connected to the output terminal of the starting switch circuit S2 of the timer circuit 6, is connected to the flip-flop circuit FF3. ，
Reset terminal R3 of FF4. While connecting to tR4,
The output terminal of an OR circuit OR6, one of whose inputs is connected to the output terminal of the starting switch circuit S2, is connected to the reset terminals R1, R2 of the flip-flop circuits FF, FF2, and the flip-flop circuits FF1, FF2, FF are
4 when starting -. It is always reset by the "H" level output of the starting switch circuit S2.

Furthermore, the reset terminals R1 and R2 of the flip-flop circuits FF1 and FF2 are connected to the output terminal of the time limit circuit T3 of the timer circuit 6 via the input terminal of the OR circuit OR6, and the "H" level of this time limit circuit T3 is connected to the output terminal of the time limit circuit T3. The flip-flop circuits FF, FF2 are also reset by the output of the flip-flop circuits FF, FF2.

Next, the display circuit 5 is a series circuit formed by connecting indicator lights L3, L1, L2 and collector-emitter terminals of transistors Q5, Q6, Q7, respectively, between the output side of a constant voltage power supply (not shown) and ground. are inserted in parallel, and the NOR circuits NOR, , NOR of the inflection point detection circuit 4 are connected to the bases of the transistors Q5, Qa, and Q7 through resistors R41, R42, and R43, respectively.
Connect each of the 12 output terminals to create this NOR circuit NO.
When receiving the +tH'' level outputs of R, , NOR,1, NOR,2, transistors Q5, Qa, and Q7 are made conductive to light indicator lamps L3, L1, and L2.

When turned on, the indicator lights L3, L, , L2 exhibit, for example, red, yellow, and blue to facilitate discrimination, so that they can be distinguished at a glance.

Note that the indicator lights L3, L, , L2 are not limited to being displayed in different colors, and may have a configuration that allows for identification at a glance, for example, by making the characters stand out when turned on.

Next, to explain the timer circuit 6, one input terminal of a NOR circuit NOR13 is connected to the output terminal of a constant voltage power supply (not shown) via a NOT circuit NOT4, and the other input terminal of this NOR circuit NOR13 is connected to a resistor. R44 and capacitor CIO are connected via a CR time constant circuit to form a starting switch circuit S2, and when receiving the power supply voltage VCC of the constant voltage power supply device, the CR time constant of resistor R44 and capacitor CIO is The output of the NOR circuit NOR,3 is held at the ``H'' level until the time limit determined by I is reached.

One of the output terminals of the NOR circuit NOR13 is connected to the reset terminals R3, R, of the flip-flop circuits FF3, FF through the OR circuit OR2 of the inflection point detection circuit 4, and is connected to the reset terminals R3, R, of the flip-flop circuits FF3, FF, through the OR circuit OR6 of the inflection point detection circuit 4. It is connected to the reset terminals R1 and R2 of the flip-flop circuits FF1 and FF2, and the other output terminal is connected to the NOR?? via the OR circuit OR3. It is connected to the set terminal S of the flip-flop circuit FF5 formed by the NOR circuits NOR14 and NOR15, and the flip-flop circuits FF1, FF2, FF3 and FF4 are reset by the ttHn level output of the NOR circuit NOR13, and the flip-flop circuit FF , the output of output terminal Q5 is set to IIH# level.

One of the output terminals Q5 of the flip-flop circuit FF5 is connected to the /ear circuit NOR16 via the NOT circuit NOT.
This NOR circuit is connected to one of the input terminals of NO.
A resistor R45 and a capacitor Cl are connected to the other input terminal of R16.
are connected through a CR time constant circuit consisting of resistor R45 and capacitor C1 to form a time limit circuit T1, and when the time limit circuit T receives an output of the "H" level, The output of the time limit circuit T1 (output of the NOR circuit NOR, 6) is held at the tt H n level until a predetermined time limit T (for example, 20 seconds) is reached.

The output terminal of the NOR circuit NOR16 of this time limit circuit T1 is connected to a constant voltage power supply device (not shown) via a resistor R46 to provide a power supply voltage (2).

The base of a transistor Q8, whose collector and emitter are inserted in series, is connected between the relay X that receives 0 and the ground, and the transistor Q8 is made conductive by the ゜゛H'' level output of the time limit circuit T1, and the relay X is excited. and storage battery 1
By opening the normally closed contact X5 of the relay X connected to the storage battery 1, the storage battery 1 is discharged without being charged by the permanent load 3 during a time period T8.

The other output terminal Q of the flip-flop circuit FF5 is connected to the NOR circuit N via the NOT circuit NOT6.
One of the input terminals is connected to the output terminal of OR16, and the other input terminal of OR circuit OR4 is connected to the other input terminal of OR circuit OR4.
4, one of them is a NOR circuit NOR1, NOR1
8, resistor R4, R48, and capacitor C12.

1 and connect the output of "L jj Re ~ Re to Norer circuit NO
When R17 is received, time limit T2 (for example, 2 m
i n ) After that, a timer circuit T2 is connected to send out an output at It H jj level, and the other is a NOR circuit NOR1 whose input end is connected to the output end of the timer circuit T2 and the output end of the OR circuit OR4. , to the input end of an OR circuit OR5 whose output end is connected to the base of a relay X4 and a transistor Q9 through a resistor R49, which is inserted in series between the output end of a constant voltage power supply (not shown) and the ground. Then, the output of the OR circuit OR4 is at the "L" level during the time limit circuit T2 (that is, until the time limit T2 is reached).
The NOR circuit NOR1 and tt via the OR circuit OR5
H pp level output is sent to the base of transistor Q9 to make the transistor Q9 conductive and relay X4 is activated.
energizes the normally open contact X4a and normally closed contact X4b of charger 2.
When the time limit circuit T2 reaches the time limit T2 and sends out an output at the ``H'' level, the transistor Q is made non-conductive and the relay X4 is switched on.
is de-energized and the voltage of the charger 2 is switched to the float charging side.

One of the output terminals of the timer circuit T2 is connected to the NOR circuit NO of the inflection point detection circuit 4 via the NOT circuit NOT7.
When the input terminals of R9, NOR, , NOR, 2 are connected, and when the slope circuit T2 sends out an output of the tt H pp level, the output of the "L" level is sent to the NOR circuit NOR, via the NOT circuit NOT7. ,NOR,,,NOR,2, and the other is a flip-flop circuit F.
By connecting the reset terminal R5 of F5, the flip-flop circuit FF5 is reset by the "H" level output of the timer circuit T2, and the output of the output terminal Q5 is inverted, and via the NOT circuit NOT8, The output terminal of the Nor circuit NOR9 of the inflection point detection circuit 4 is connected to the other input terminal of the OR circuit OR7, which has one input terminal connected, and the output terminal of the OR circuit OR7 is connected to the output terminal of the Nor circuit NOR2o, NOP2, and so on. A time-limited circuit T formed by connecting a pinary counter BC2 to an astable multi-byte break formed by a resistor R4Q t R50 and a capacitor C12.
3 is connected, and when the NOR circuit NOR2o of the timer circuit T3 receives the ``HI+ level output of the timer circuit T2 as an output of the ``Lpp level'' via the NOT circuit NOT8 and the OR circuit OR7, the timer circuit T3 , the astable multi-by-break oscillates a pulse, which is counted by the pinary counter BC2, and the time limit T3 is reached.
(For example, shr), an output of ゜゛H'' level is sent out.

In addition, the output terminal of the OR circuit OR7 is connected to the reset terminal R of the pinary counter BC2 of the time limit circuit T3, and when the time limit circuit T2 is counting the time limit T2, the ゜゛H'' level is output via the NOT circuit NOT8. This output resets the pinary counter BC2 to prepare for the next response.

One of the input ends of the NOR circuit NOR22 is connected to the output end of the timer circuit T3 via the NOT circuit NOT9, and the other input end of the NOR circuit NOR2 is connected to the resistor R51 and the capacitor C14. The output terminal of this NOR circuit NOR22 is connected to the input terminal of the OR circuit ORρ, and the output terminal of this NOR circuit NOR22 is connected to the input terminal of the OR circuit ORρ.
to the output terminal 6 of the reset terminal R of the pinary counter BC1 of the time limit circuit T2 and the OR circuit OR6 of the inflection point detection circuit 4.
When the time limit circuit T3 receives the "H py-level output" which is sent out when the time limit circuit T3 reaches the time limit T3, the NOR circuit NOR22 connects the input terminal of the resistor R51 and the capacitor C.
Until the time limit determined by the CR time constant with 14 is reached, an output of ゜tH y'' level is sent to the set terminal S of the flip-flop circuit FF5 via the OR circuit OR3 to set the flip-flop circuit FF5, and the output terminal Q5 of the flip-flop circuit FF5 is set. While inverting the output of to +tHn level,
An II H jj level output is sent to the reset terminal R of the binary counter BC of the timer circuit T2 to reset the binary counter BC1 in preparation for the next clock, and the flip-flop circuits FF1 and FF of the inflection point detection circuit 4 FF2 is reset via an OR circuit OR6.

That is, the timer circuit 6 has a time limit T1+a time limit T2+a time limit T3.
The clock can be repeated periodically using the total time period.

The other output terminal of the time limit circuit T3 is connected to an inflection point detection circuit 4.
One input terminal is connected to the other input terminal of a NOR circuit NOR23, which has one input terminal connected to the output terminal of the NOT circuit NOT1, and the output terminal of this NOR circuit NOR23 is connected to the OR circuit OR5. When the flip-flop circuit FF1 receives only one output pulse from the pulse generation circuit PU of the inflection point detection circuit 4, the timer circuit T3 outputs a NOR during the clocking of the time period T3 in preparation for detecting the next inflection point. The output of the circuit NOR23 is set to ゜゜H'' level, and the transistor Q is made conductive via the OR circuit OR5, and the relay X4 is energized to connect the normally open contact X4a and the normally closed contact X of the charger 2.
The taps of the power transformer can be switched to enable equal charging by opening and closing 4b.

Next, to explain its operation, when the starting switch circuit S2 of the timer circuit 6 is connected to the output terminal of a constant voltage power supply (not shown), the output of the NOR circuit NOR13 is connected to the resistor via the NOT circuit NOT4. "H" until the time limit determined by the CR time constant of R44 and capacitor C1o is reached.
jj level, so this NOR circuit NOR13's
The flip-flop circuit FF5 is set via the OR circuit OR3 by the ゜H'' level output, and the output of its output terminal Q becomes IIH'' level, and the timer circuit receives the ゛H'' level output from the flip-flop circuit FF5. T1 is connected to the NOR circuit NO via the NOT circuit NOT5.
The output of R16 is the CR of resistor R45 and capacitor Cll.
This time limit circuit T1 remains at the "H" level until reaching the time limit T (for example, 2 osec) determined by the time constant.
The output at ゜H'' level makes transistor Q8 conductive, energizes relay X, opens normally closed contact X5, and disconnects charger 2 from storage battery 1.

As a result, the storage battery 1 is discharged without being float-charged by the permanent load 3 of the emergency power supply device 8.

Due to this discharge, the terminal voltage 8 of the storage battery 1 drops, and the pulse generating circuit PU receives this drop, and the differential amplifier AMP
8, a negative output is generated, but it is clamped to 0 ("L" level) by the resistor R39 and the diode D6, and no output pulse is sent out.

Next, when the output of the time limit circuit T1 reaches the time limit T1, It
Since the current level reaches L jj level, the transistor Q8 becomes non-conductive, deenergizing the relay OR circuit OR4 for L″ level output
Since the other input of the NOR circuit NOR1, which is received at one of the inputs via the gate circuit T2, is also receiving the output of the ゜゜L'' level from the time limit circuit T2, the output becomes the ゛゜H'' level, which is passed through the OR circuit OR5. Sends to the base of transistor Q9 to conduct the transistor Q, energizes relay X4, opens and closes its normally open contact X4a and normally closed contact X4b, and switches the tap of the power transformer of charger 2 to the equal charging side. Then, the storage battery 1 is evenly charged by the charger 2.

On the other hand, the timer circuit T2 responds to the tt L'' level output of the OR circuit OR4 and clocks the timer T2.

During this time period T2, the terminal voltage 8 of the storage battery 1 rises due to equal charging by the charger 2, and the inflection point detection circuit 4 receives this rising terminal voltage 2 through the input terminals P and N. , one input (input terminal a) of the differential amplifier AMP8 of the pulse generating circuit PU receives the change in the terminal voltage 8 of the storage battery 1 as it is, and the other (input terminal b) receives the change in the terminal voltage 8 of the storage battery 1 as it is, and the other input (input terminal b) receives the change in the terminal voltage 8 of the storage battery 1 as it is.
CR between and capacitor C8? Since the tracking will be delayed by the time period determined by the constant, the input difference (a-b)
becomes positive, and the output of the differential amplifier AMP8 is positive, that is, t
H j″ level, and the difference (a-b) between the above inputs is 0.
When (a=b), that is, the charging characteristic of storage battery 1 is the seventh
As shown in the figure, once a flat portion is drawn and the change occurs, the output of the differential amplifier AMP8 becomes O, that is, "L Pj level."

The pulse generating circuit PU has now sent out one output pulse.

Therefore, the differential amplifier AMP8 of the pulse generating circuit PU
The output of the flip-flop circuit F is switched from the to H” level to the “L” level, and this falling output causes the flip-flop circuit F to
F, inverts its output and output terminal Q1 becomes "H pp
The level output is sent to the input terminal CP2 of the flip-flop circuit FF2, but since the flip-flop circuit FF2 is of the falling operation type, the output is not inverted.

On the other hand, the output terminal Q1 of the flip-flop circuit FF1 is inverted and sends an output at the "L pp level" to the NOR circuit NOR7.

In response to this, the other input of the NOR circuit NOR7 is ゜'L
'' level, the output at It H # level is sent to the NOR circuit NOR8 as an output at It L # level via the NOT circuit NOT1.

In response to this, the NOR circuit NOR8 sends out a ゜゛H'' level output to the input terminal CP3 of the flip-flop circuit FF3 until the time limit determined by the CR time constant of the resistor R40 and the capacitor C9 is reached. When the time limit determined by the CR time constant is reached, an output of ゜゛L'' level is sent out.

When the output of the NOR circuit NOR8 changes from the "Hy+ level" to the "°L" level, the output of the flip-flop circuit FF3 that receives it is inverted, and its output terminal Q3
The output of ゜゛H” level is sent to flip-flop circuit FF4.
However, the flip-flop circuit FF4 maintains a reset state.

In this state, the time limit circuit T2 is set to the time limit T2 (for example, 2 mi).
n) and the output becomes ``H'' level, the inflection point detection circuit 4 receives the ``H'' level output of this timer circuit T2 as the ``I, jl level output through the NOT circuit NOT7. NOR circuit NOR9, NOR1,, NOR
Of the 12, only the NOR circuit NOR and the other input are connected via the NOT circuit NOT3 and the OR circuit OR1 to "L".
Since it receives the level output, the corresponding NOR circuit NOR1
The output of 1 becomes "H" level, makes the transistor Q6 of the display circuit 5 conductive, turns on the indicator light Ll (for example, yellow), and indicates that the inflection point is 1 during the time period T2 of the timer circuit T2.
In addition to displaying that it is necessary to detect the inflection point again, the ``H'' of the time limit circuit T2 is displayed.
The flip-flop circuit FF5 is reset by the level output.

Furthermore, when two output pulses are sent out from the differential amplifier AMP8 of the pulse generation circuit PU of the inflection point detection circuit 4 during the time period T2 of the time limit circuit T2, the output pulses of the flip-flop circuit FF1 that received the two output pulses are The output is inverted again at the fall of the second output pulse, and since the output of the output terminal Q1 is at the "H" level or level L, the output of the flip-flop circuit FF2 that receives this is also inverted. The output terminal Q2 outputs the It H #j level output to the flip-flop circuits FF3 and FF via the OR circuit OR2.
, to reset terminals R1 and R2 of the flip-flop circuits FF3 and FF4.

On the other hand, the output terminal Q2 of the flip-flop circuit FF2 sends an "L" level output to the NOR circuit NOR12.

In this state, as described above, when the output of the time limit circuit T2 reaches the time limit T2 and becomes ``H'' level, this ``H'' level output is received as an ``L'' level output via the NOT circuit NOT7. Norr circuit NOR,,N of point detection circuit 4
Among OR11 and NOR12, only the NOR circuit NOR12 has the other input receiving an output of ゜゛L'' level, so the output of the NOR circuit NOR1 becomes ``H'' level, and this ttH'' level output causes the display circuit to The transistor Q7 of No. 5 becomes conductive and the indicator light L2 (for example, blue) is turned on.
is lit to indicate that there are two inflection points during the time limit T2 of the time limit circuit T2.

When this indicator light L2 lights up, it is determined that the storage battery 1 has not deteriorated.

Therefore, when the indicator light L1 of the display circuit 5 lights up due to the "H" level output sent out when the time limit circuit T2 reaches the time limit T2 (that is, when there is only one inflection point), , the determination of the deterioration of the storage battery 1 is suspended, and the flip-flop circuit FF5 is reset by the tt H'' level output of the timer circuit T2, and the output of its output terminal Q5 becomes "L" level, and the NOR circuits NOR1, The output of the NOR circuit NOR23 connected to the other input terminal of the OR circuit OR5 is also at the "Lpp" level. Since it receives the 11L" level output of the NOT circuit NOT of the inflection point detection circuit 4 and the ttL" level output of the timer circuit T3, it is at the "H" level, and the ゜゛H'' of this NOR circuit NOR23 is received. The level output causes the transistor Q to remain conductive via the OR circuit OR5, and the storage battery 1 is maintained in a uniformly charged state by the charger 2.

Also, the high level output of the timer circuit T2 is connected to the not circuit N.
The timer circuit T3 receives the "L" level output via OT8 and the OR circuit OR7, and responds, and when the timer T3 (for example, 8 hours) is reached, the output of the timer circuit T3 becomes ttH.
Since the output of the timer circuit T3 at the H91 level causes the output of the NOR circuit NOR23 to go to the ttLyp level, the OR circuit OR5 is inserted, the transistor Q is rendered non-conductive, and the relay X4 is de-energized. to switch the charger 2 from equal charging to float charging.

On the other hand, the output of the NOR circuit NOR22, which is received as a "'L" level output via the NOT circuit NOT9, is connected to the resistor R.
51 and the capacitor C14 until reaching the time limit determined by the CR time constant, and the OR circuit OR3 is driven by the high level output of the NOR circuit NOR2.
The flip-flop circuits FF, FF2 are reset via the binary counter BC1 of the time limit circuit T2 and the OR circuit OR6 of the inflection point detection circuit 4, and the flip-flop circuit FF is set to output terminals Q,
It operates in the same manner as described above, and during the time period T1 of the time limit circuit T1, the charger 2 is disconnected from the storage battery 1, and the storage battery 1 is discharged to the permanent load 3;
After time limit T1, charger 2 is switched to equal charge and storage battery 1 is charged.
is inserted between the terminals of the storage battery 1 to uniformly charge the storage battery 1 during the period of time T2, and during this uniform charging (during the period of time T2), the output pulse of the pulse generation circuit PU of the inflection point detection circuit 4 becomes 1 again.
When only one is sent out, at the fall of the output pulse, the output of the flip-flop circuit FF1 is inverted as described above, but the flip-flop circuit FF2 maintains the reset state, so the output of the NOR circuit NOR7 becomes ゜゛H'' level, and this ttH ”The circuit NOT outputs the level.
The output of the NOR circuit NOR8, which is received as a "L pp level output" through "L"
After holding the ' level, it becomes et L'' level, so
The output of the flip-flop circuit FF3 that received this is also inverted by the falling edge, and the output of the output terminal Q3, which was at the tt H'' level in the previous inversion operation, is inverted to the tt L n level. F
The output of F4 is also inverted and the output of its output terminal q is ``H''
The NOR circuit NOR, which receives this ttH'' level output as the ``L'' level via the NOT circuit NOT2, sends out the ``''Hat level output to the NOT circuit NOT7 when the time limit circuit T2 reaches the time limit T2. When receiving the "L" level through the NOR circuit, the output of the NOR circuit NOR9 becomes the "H" level, making the transistor Q5 of the display circuit 5 conductive and lighting the indicator lamp L3 (for example, red).

It is determined that the storage battery 1 has deteriorated due to the lighting of the indicator light L3, and the input terminal of the time limit circuit T3 of the timer circuit 6 is connected to the input terminal of the timer circuit NOR9 until the storage battery 1 can be recharged.
ttH through the OR circuit OR7 by outputting the level
Since it is held at the pp level, the timer circuit T3 stops responding, and the flip-flop circuit FF5 is also held in the reset state, so the periodic operation of the timer circuit 6 is stopped.

Then, by replacing the storage battery 1 that has been determined to have deteriorated and opening and closing the input terminal of the starting switch circuit S2 of the timer circuit 6, the above-described operation is repeated again.

It should be noted that when two output pulses from the pulse generation circuit PU of the inflection point detection circuit 4 are sent out during the time limit T2 period of the time limit circuit T2, the flip-flop is activated as described above due to the fall of the second output pulse. As the output of the circuit FF1 is inverted again, the flip-flop circuit FF2 receives this inversion.
The output of the flip-flop circuits FF3 and FF4 is also inverted, and the It H jl level output from the output terminal Q2 causes the flip-flop circuits FF3 and FF4 to be inverted.
At the same time, the NOR circuit NOR,2, which receives the ゜'L'' level output from the output terminal Q2, sends out the ゜゛H'' level output when the time limit circuit T2 reaches the time limit T2 via the NOT circuit NOT7. Since the signal is received as an output at the ゜゛L'' level, the indicator light L2 of the display circuit 5 is turned on as described above.

By lighting the indicator light L2, it is determined that the indicator light L1 was lit during the previous inflection point detection operation, which means that the storage battery 1 was not completely charged, and that the storage battery 1 has not deteriorated.

In addition, in the embodiment, the indicator light L 1 t L of the display circuit 5
2+L3 has been explained using a lamp, but it may be configured to display using a light emitting diode instead of the lamp.

In addition, the above indicator light L3 (indicator light that indicates that it has deteriorated)
The alarm may be configured by an alarm means such as a buzzer, and in this case, the deterioration of the storage battery 1 can be known by the sound of the alarm even if maintenance personnel are not nearby.

Furthermore, if the display circuit 5 is provided in a central control room or the like, maintenance by determining the deterioration of these storage battery groups can be centrally managed.

In this embodiment, it is possible to automatically and periodically inspect the float charging system without impairing its functions, making maintenance management easy.Moreover, if deterioration is detected, the detection operation is performed again. Since the detection is performed by performing the following steps, reliability can be improved.

Further, since there is no need to provide a special load for measurement, there is no need to place a burden on the storage battery and accelerate its deterioration.

As described above, the present invention connects a charger between the terminals of a storage battery via a contact that is controlled to open and close by a timer circuit, and uses the terminal voltage during charging of the storage battery as an input, and changes in this input to create a charging characteristic curve. An inflection point detection circuit is connected to detect an inflection point from the inflection point detection circuit, and a display circuit is provided at the output terminal of this inflection point detection circuit so that deterioration of the storage battery can be determined from the characteristics of the storage battery at the end of charging. During measurement, the storage battery is discharged with a small current to eliminate the overvoltage caused by gas generation, and the characteristics at the end of charging are obtained. Therefore, the charging characteristics of the storage battery can be stably obtained. Since the inflection point is detected from stable characteristics, the detection accuracy can be improved.
In addition, the amount of electricity discharged during measurement is extremely small compared to the nominal capacity, so it can be applied to large capacity storage batteries, there is no deterioration of the storage battery, and the discharge time is extremely short. Since it only takes time, even if a storage battery power source is required during the discrimination, there is no possibility that the system will be unable to drive.

In addition, deterioration can be determined by a simple operation of reading the display on the display circuit, so deterioration can be determined in a short time without requiring any skill.For example, even in places where many storage batteries are installed as an emergency power source. Since automatic inspection is possible, the scope of application can be expanded, such as centralized management, and maintenance management is also facilitated, which has remarkable effects.

[Brief explanation of the drawing]

FIG. 1 is a characteristic curve diagram of a storage battery at the final stage of charging, where A shows a case where the battery has not deteriorated, and the box A shows a case where the battery has deteriorated or is incompletely charged. FIG. 2 is a block diagram showing an embodiment of the device of the present invention;
FIG. 4 is a block diagram showing an embodiment of the inflection point detection circuit and display circuit of the device of the present invention, FIG. 4 is a block diagram showing an embodiment of the timer circuit of the device of the present invention, and FIG. FIG. 6 is a block diagram showing another embodiment of the device of the present invention, and FIG. 7 is a diagram explaining inflection point detection in another embodiment of the device of the present invention. , Figure A shows a case where the storage battery has not deteriorated, and Figure 1 shows a case where it has deteriorated. 1... Storage battery, 2... Charger, 4...
...Inflection point detection circuit, 5...Display circuit, 6
...Timer circuit.

Claims (1)

[Scope of Claims] 1 Between the terminals of a storage battery in which a charger and a measuring load are connected in parallel via contacts that are controlled to open and close by a timer circuit,
A differential amplifier circuit that calculates the difference between the terminal voltage of the storage battery and a preset reference voltage, and a timer circuit that is connected in parallel to the output terminal of this differential amplifier circuit and controls opening and closing of the input terminal at predetermined time intervals. first, second and third memory circuits which are connected to the output terminals of the first and second memory circuits to store the output of the differential amplifier circuit; a first differential amplifier circuit that calculates the difference between the outputs of the storage circuit; and a first differential amplifier circuit that is connected to the output terminals of the second and third storage circuits and calculates the difference between the outputs of the second and third storage circuits. a second differential amplifier circuit; and a third differential amplifier connected to the output terminals of the first and second differential amplifier circuits to calculate the difference between the outputs of the first and second differential amplifier circuits. An inflection point detection circuit consisting of an amplifier circuit is connected, and an indicator is connected to the output terminal of this inflection point detection circuit, and the terminal voltage when the storage battery is discharged to the measurement load and the switching from this discharge to charging is determined. The characteristic of the storage battery at the end of charging is detected based on the terminal voltage after a predetermined time period and the terminal voltage when charging is completed, and the detected value is indicated, thereby determining deterioration of the storage battery. A storage battery remaining capacity detection device. 2 Between the terminals of a storage battery, the charger and the measuring load are connected in parallel via contacts that are controlled to open and close by a timer circuit.
One of the input terminals is connected to the other input terminal via a CR time constant circuit and to a pulse generation circuit which receives input and sends out a positive square wave pulse as an output, and the output terminal of this pulse generation circuit. and a plurality of flip-flop circuits connected to each other so as to sequentially invert the output at the falling or rising edge of the output pulse of the pulse generating circuit, and a predetermined output terminal of the plural flip-flop circuits and an output terminal of the timer circuit. a NOR circuit that sends out a "H" level output when there is only one output pulse from the pulse generating circuit within a predetermined time, and a NOR circuit that sends out a UHu level output when there are two output pulses. An inflection point detection circuit is connected to the inflection point detection circuit, and an indicator circuit is provided in which an indicator light is connected in series through a switching element to each output terminal of a plurality of Norr circuits of this inflection point detection circuit, and the above-mentioned A device for determining deterioration of a storage battery, characterized in that the deterioration of the storage battery is determined by detecting an inflection point of a characteristic curve of the storage battery at the end of charging and selectively displaying the inflection point.