JPS5851271B2 - Ink Yokusen Kanmoji Hiyoji Souchi - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a cathode ray tube character display device, which shares one memory for storing input information and refreshing information on a cathode ray tube (hereinafter abbreviated as CRT) screen. It is an object of the present invention to provide a character display device using a CRT, which can insert and delete characters in units of characters and insert and delete statements in units of lines without using a dedicated address memory.

FIG. 1 shows a block system diagram of an example of a conventional CRT character display device.

In the figure, reference numeral 1 denotes a data control section, which transfers information between a keyboard 2, a computer 3, etc., and a memory 4.

The memory 4 encodes and stores information to be displayed on one screen, and also serves as a refresh memory for refreshing the image.

Reference numeral 5 denotes a memory control circuit which controls writing and reading of data to and from the memory 4 in response to control signals from the data control section 1, and also causes an access counter 6 to specify a memory address for reading/writing memory data.

This access counter 6 is composed of a column access counter for counting the number of characters on one line and a row access counter for counting the number of lines on one screen.

Refresh counter I is a memory address designating counter for image refresh, and like access counter 6, it is composed of a column refresh counter and a row refresh counter.

This refresh counter I specifies an address for image refresh in memory 4 when refreshing an image,
Normally, it does not operate during the refresh pause period.

That is, during the image refresh period, the address of the refresh counter 7 is set to the memory 4 by the address selector 8.
During the image refresh pause period, the address of the access counter 6 is gated to the memory 4 by the address selector 8.

The address of the access counter 6 and the address of the refresh counter 7 are compared in an address comparator 9, and a direct value is indicated at the point where the addresses of both counters match (
That is, a bi-level voltage of positive logic "1" is output to the display device 12).

This comparator 9 generates a cursor signal indicating the read/write point on the screen.

The output data of the memory 4 is temporarily stored in a memory data latch 10, which is a data buffer circuit, and read out at appropriate timings to the character generator 11 for image refresh and to the data control section 1 for memory data output. It will be done.

The character codes sequentially sent out from the memory 4 are converted by the character generation circuit 11 into character patterns necessary for display on the CRT, and then supplied to the display device 12.

This display device 12 receives a luminance signal from the character generation circuit 11,
The horizontal and vertical synchronizing signals from the timing circuit 13 and the cursor signal from the address comparator 9 are each combined to form a complete video signal, which is supplied to the CRT to display information.

The timing circuit 13 is a circuit that generates horizontal and vertical synchronizing signals, generates gate signals for specifying character position intervals to be displayed on the CRT, and generates various timing signals for the device.

It is a well-known fact that the count contents of the access counter 6 and the refresh counter 7, the memory address, and the display character position on the screen have a 1:1 relationship.

Such a CRT character display device has the function of storing information from the computer 3 or keyboard 2 or other terminal device, and displaying this on the CRT screen, as well as transmitting the stored information to the computer 3 or other external terminal device. It is significantly different from other input/output devices in that it allows you to freely edit the display screen.

One of the local editing functions includes insertion and deletion of displayed characters in units of characters, and insertion and deletion in units of lines.

Here, in this specification, insertion and deletion of characters and lines refer to the following.

In other words, "inserting a character" means writing a space on the screen at the column position where the cursor, which is the marker for writing/reading data, is located, and then shifts all subsequent columns to the right by one ram on that line. "Delete a character" means to delete the character where the cursor is, shift the subsequent characters on that line to the left by one ram, and write a space in the final column. Say something.

Also, "insert line" moves all lines below the cursor line down one line at a time (letters on the last line disappear), and writes spaces on all lines where the cursor is, and moves the cursor to the beginning of that line. means to set.

Furthermore, "delete a line" means to erase the line where the cursor is, move all lines below it one line up, write spaces on the last line, and set the cursor to the beginning of the erased line. do.

The cursor is normally set by the keyboard operator manually controlling the cursor control keys to move the cursor to the desired character or line position.

However, in the above-mentioned conventional CRT character display device, when inserting and deleting one character or line by line is processed using the access counter 6, it is difficult to store the memory address at the start and end of the insertion or deletion operation. The disadvantage was that a dedicated address memory was required.

The present invention eliminates the above-mentioned drawbacks, and one embodiment thereof will be described below with reference to FIG.

FIG. 2 shows a block system diagram of one embodiment of the device of the present invention.

In the figure, the same parts as in FIG. 1 are given the same reference numerals, and their explanations will be omitted.

In FIG. 2, 15 is a buffer memory for temporarily storing memory data, and when inserting or deleting one character at a time, l-bit latch memory is used.
In the case of deletion, it is a buffer memory with a storage capacity equivalent to the number of characters in one line.

A data selector 16 gates input information from the keyboard 2 and computer 3 and memory circulation data when inserting or deleting characters or lines to a memory input terminal.

Reference numeral 14 denotes a control logic (hereinafter referred to as I/D control logic) that controls insertion and deletion processing for each character or line on the screen, and receives a character or line insertion or deletion command level signal from the keyboard 2 or an external switch. It sends clock pulses to the refresh counter 7 to execute latched character and line insertion and deletion processing, and supplies read/write command signals to the memory to control its logic.

Therefore, the opening and closing of the gate of the data selector 16 and the opening and closing of the address gate of the address selector 8 are naturally under the control of the I/D control logic 14.

By the way, the present invention consists of the following three main points.

That is, first, since the refresh counter 7 normally does not operate during the refresh pause period, the refresh counter 7 is used as a memory for rewriting memory data for inserting or deleting one character or one line of characters on the screen during the pause period. An access counter 6 is used as a counter for specifying an address, and also operates as a counter for specifying a memory address, which normally specifies an address in the memory 4 for writing and reading memory data.At the start and end of processing for inserting and deleting one character To be used as a memory for storing the memory address for specifying the cursor display position on the screen at the time.

Second, rewriting memory data to insert or delete one character or line of characters on the screen must be done at the same address indicated by the refresh counter 7. In other words, first read the data at the same address in the memory, then write it. After finishing reading the data of the next memory address,
Continuous writing to rewrite memory data.

Thirdly, in order to rewrite data at the same address in the memory, a ring-shaped data buffer memory 15 is provided between the memory data latch circuit 10 and the input data terminal of the memory 4, and the display position on the screen is To temporarily store changing data in this buffer memory 15.

To explain the second and third points above in more detail, first, during the refresh pause period, data at the memory address indicated by the refresh counter 7 is read out,
This data is temporarily stored in the memory data latch circuit 10, and at the same time, the data previously read into the memory data latch circuit 10 is read into the buffer memory 15.

Next, with the memory address fixed, buffer memory 15
The above data is read and written into the memory 4 through the data selector 16.

Similarly, after the sequence of reading and writing data at one memory address is completed, the next memory address to be processed is set in the refresh counter 7, the data on this memory address is read, and the data read out previously is read out. The sequence of writing the data is continued until the end of the process, and by rewriting the data in the memory, one character or one line of characters on the screen can be inserted or deleted.

Next, in a CRT character display device with 16 lines per screen and 64 characters per line, the operation for inserting a new character into the 13th column of a line will be specifically explained.

The single character insertion level signal supplied at any time is the I/D
It is latched by the control logic 14, and a signal indicating the end of refresh is received from the timing circuit 13, and character insertion processing is started.

When the refresh pause period begins, the cursor is at the 13th position, so the I/D control logic 14 applies a clock pulse to the refresh counter 7 to load the access counter address indicating the cursor position into the refresh counter 7, and at the same time applies a clock pulse to the refresh counter 7. A pulse for blanking the output data is supplied to the data latch circuit 10 (writing blank data).

The reason for this is to display blank data at the cursor position.

Subsequently, the blank data of the memory data clutch 10 is set to 1.
At the same time, the data on the memory 4 corresponding to the 13th cursor position on the screen is read out and latched into the memory data latch 10.

Naturally, this data movement is performed by I/D control logic 1.
'4.

Thereafter, the blank data latched in the data buffer (latch memory) 15 is written into the memory 4 through the data selector 16.

In this one cycle, a blank (space) is written at the 13th cursor position on the screen, and the data that had been at the 13th cursor position until now remains in the memory data clutch 10.

Next, the memory address is set to the address position corresponding to the 14th column position on the screen by the refresh counter 7.
is set under the instructions of the D control logic 14,
The memory data in the 14th column is read out, and then the data in the old 13th column, which had been written in the buffer memory 10, is moved to the 1-bit buffer memory 15, and at the same time, the data in the 14th column is transferred to the memory data. clutch 10
latched to.

Then, the data in the 13th column of the day on the 1-bit buffer memory 15 is transferred to the memory 4 through the data selector 16.
will be written to.

By performing the processing up to the 64th column in the same sequence, the characters from the 13th column onward in the line will be shifted to the right one by one, and the data in the old 64th column will disappear, ending the process. Become.

At this time, blank data is written in the 13th column as described above.

The process of inserting one character ends when a carry-down signal is supplied from the column refresh counter of the refresh counter 7 to the I/D control logic 14.

Furthermore, after the processing is completed, the cursor position remains at the 13th column, of course.

Next, the operations for deleting one character, inserting one line of characters, and deleting each character are substantially the same as the operations for inserting one character above, so they will be briefly described below.

First, in the case of deletion of one character, the one character deletion level signal is latched by the I/D control logic 14, and the last column position (64th column) stored in the access counter 6 is stored in the refresh counter 7 during the pause period.
Blank data is written into the memory data latch circuit 10 at the same time that a pulse is applied to load the access counter address indicating the address.

At the same time that this blank data is written into the 1-bit buffer memory 15, the data in the 64th column on the memory 4 read from the memory 4 is written into the memory data clutch 10.

Next, the blank data in the buffer memory 15 is written into the memory 4 through the data selector 16.

As a result, the 64th column of the line on the screen becomes blank.

The same sequence is repeated thereafter, and the memory data is rewritten up to the data at the position indicated by the cursor.

The process ends when the column comparison signal supplied from the address comparator 9 to the I/D control logic 14 is detected.

Next, to explain the single line character insertion operation, the I/D control logic 14 latches the line insert level signal, writes blank data to the memory data clutch 10, and at the same time inserts the access counter 6 and refresh counter 7. Set it in the first column of the power line.

Next, the memory data in the first column of the insertion line indicated by the refresh counter 7 is read out.

This memory data is written to the memory data clutch 10 at the same time that the blank data of the memory data clutch 10 is transferred to the 64-bit buffer memory 15.

Here, as a matter of course, blank data is written into the 64-bit buffer memory 15 during the image refresh period.

Thereafter, the blank data in the 64-bit buffer memory 15 is written into the memory 4.

As a result, the first column of the insertion line becomes blank.

Next, the memory address is set in the second column of the insertion line using the refresh counter 7, and the memory data in the second column is rewritten.

Thereafter, the memory data up to the last column of the last line on the screen is rewritten using the same sequence.

As a result, all blanks are written to the insertion line, the data of the 15th line is completely written to the last line one line down, the data of the old 16th line (last line) is erased, and the cursor is moved to the insertion line. It stays in the first column.

The process ends when the line end signal from the refresh counter 7 is detected.

Furthermore, the operation of the apparatus of the present invention when deleting characters in one line will be explained.

A line delete signal is latched by the I/D control logic 1jll, and blank data is written into the memory data clutch 10.

At the same time as the access counter address is set in the first column of the line to be deleted, the refresh counter address is set in the last column (64th column) of the last line (line 16).

The memory data of the last line and the last column indicated by the refresh counter 7 is read from the memory 4, and this data is transferred to the memory data clutch 10 at the same time as the blank data of the memory data clutch 10 is transferred to the 64-bit buffer memory 15. Written to 10.

Here, as a matter of course, blank data is written into the 64-bit buffer memory 15 during the image refresh period.

Thereafter, the blank data in the 64-bit buffer memory 15 is written into the memory 4.

As a result, the 46th line and 64th column become blank.

Next, the memory address is set in the 63rd column of the last line by the refresh counter 7, the memory data here is rewritten to blank data, and the same sequence is repeated, and the memory data up to the first column of the deletion line is stored in the buffer memory. 15 is sequentially rewritten to the data temporarily stored in the memory.

With this process, all blank data is written in the last line, that is, the 16th line, and 15th line is written from the deletion line.
Up to the first line, the data one line below each line is written up one line at a time, and the deleted line data disappears in the 64-bit buffer memory 15.

At this time, the cursor remains set at the first column of the deletion line.

The process ends when the I/D control logic 14 detects the address comparison signal from the address comparator 9.

In the above embodiment, when inserting and deleting - characters and single-line characters in the same device, the buffer memory 15 has a storage capacity equivalent to a 1-bit latch memory and the number of characters in one line. Two buffer memories may be arranged in parallel, and switching may be performed by the I/D control logic 14.

As described above, the cathode ray tube character display device according to the present invention has a first counter for specifying a memory address for inputting and outputting information, and a second counter for specifying a memory address for refreshing an image, In a character display device that displays characters by sharing input information storage and refresh storage for refreshing the information on a cathode ray tube screen in one memory, the output data of the memory is temporarily stored and the data is , between the output terminal of the memory data latch and the data input terminal of the memory, each of which is read at an appropriate timing to a character generation circuit that converts into a character pattern, and a data control section that transfers information between the external terminal device and the memory. A buffer memory is provided to temporarily store the output data of the memory data clutch,
- When inserting or deleting characters or single lines, use the first counter as an address memory for specifying the start and end positions of operations on the image, and a counter for specifying memory addresses for rewriting memory data during the image refresh pause period. Using the second counter, write the data read from the memory at the same memory address to the buffer memory, read the data previously stored in this buffer memory, write it to the memory, and write it to the memory. Since the memory data is repeatedly rewritten in units of one address, it is possible to insert or delete one character or one and a half on the image by repeating the read/write operation in units of one address in the memory.
Since this insertion or deletion processing is performed during the refresh pause period when the second counter is inactive, the first counter for inputting and outputting information data is used for character insertion and deletion.
It can also be used as memory to remember the cursor position when deleting.
Therefore, it is possible to insert or delete one character or one and a half with the minimum number of elements without providing a special element such as a memory address designation counter for this process.Furthermore, memory data can be rewritten by reading memory data at the same address. Since the data is written repeatedly, it has the advantage that an element with the minimum storage capacity can be used as the buffer memory.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an example of a conventional device, and FIG. 2 is a block diagram of an embodiment of the device of the present invention. 1... Data control section, 4...
...Memory, 5...Memory control circuit, 6.
...Access counter, 7...Refresh counter, 9...Address comparator, 10...Memory data, latch, 14...
... Control logic (I/D control logic), 15... Buffer memory, 16...
...Data selector.

Claims (1)

[Claims] 1 Has a first counter for specifying a memory address for information input/output and a second counter for specifying a memory address for image refreshing, and stores input information and refreshes the information on the cathode ray tube screen. In a character display device that performs character representation by sharing a refresh memory for displaying characters in one memory, a character generation circuit and an external terminal device that temporarily store output data of the memory and convert the data into a character pattern. The output data of the memory data clutch is temporarily stored between the output terminal of the memory data clutch and the data input terminal of the memory, which are read out at appropriate timing in a data control section that transfers information between the memory and the memory. Provide a buffer memory, -
When inserting or deleting characters or single lines, the first counter is used as an address memory for specifying the start and end positions of operations on the image, and also as a counter for specifying memory addresses for rewriting memory data during the image refresh pause period. Using the second counter, data read from the memory at the same memory address is written to the buffer memory, and then data previously stored in the buffer memory is read and written to the memory, and this is 1 A cathode ray tube character display device characterized in that memory data is repeatedly rewritten for each address.