JPS5853389B2 - character identification device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a character recognition device, particularly a character recognition device that performs character recognition by comparing an extracted feature pattern with a standard pattern prepared in advance. The present invention relates to a character identification device which includes a mode control memory for storing mask information in advance, and is adapted to perform character identification well as the number of categories increases.

In general, in character recognition, character identification is performed by scanning input characters and comparing extracted feature patterns with standard patterns prepared in advance.

However, as the number of characters to be recognized increases, it becomes easier to be affected by slight character deformations, and it is not necessary to obtain complete comparison matches and comparison mismatches for all extracted feature patterns, especially for handwritten characters. In this case, it is convenient to select some of the above characteristic patterns for each character and use them as bit care.

In consideration of the above points, the present invention provides a mode control memory in which mask information corresponding to each bit of a standard pattern is stored in correspondence with the standard pattern, so that recognition processing for characters to be recognized, especially handwritten characters, can be performed effectively. It is intended to be.

Therefore, the character identification device of the present invention includes a feature register that stores extracted feature patterns and a standard pattern memory that stores standard patterns in advance, and performs character identification by comparing the feature patterns and the standard patterns. In a character recognition device that performs character recognition, a mode control memory that stores in advance mask information indicating the main feature existence range of the standard pattern in a form corresponding to the standard pattern, the feature pattern from the feature register and the standard pattern a first comparison means for bitwise comparing matches and mismatches with the standard pattern from the memory;
a second comparing means for comparing the bit correspondence match/mismatch signal from the comparing means with the mask information from the mode control memory and outputting a bit correspondence match/mismatch signal corresponding to the feature existence range; It is characterized by having the following.

This will be explained below with reference to the drawings.

FIG. 1 is an explanatory diagram for explaining the present invention in detail, FIG. 2 is a diagram showing the configuration of an embodiment of a character identification device according to the present invention, and FIG. 3 is an explanatory diagram of its operation.

For example, when identifying the characters ``ri'' and ``wa'' as shown in FIG. 1, if they are compared, it is clear that the illustrated area a determines the difference between the two characters.

Therefore, in the case of the characters "ri" and "wa", the illustrated area a becomes an important characteristic part in identifying the character, and the difference in the area a gives a decisive difference.

On the other hand, the illustrated area is not considered to be an important feature for identifying the characters "ri" and "wa", but rather is preferably ignored when identifying the characters "ri" and "wa".

However, for other characters such as ``shi'' and ``mu'', the area corresponding to the above-mentioned area s becomes an important characteristic part.

Therefore, it is desirable to determine the characteristic portions to be ignored for each standard pattern.

That is, in the case of the above characters "ri" and "wa", the above area a
It is specified in advance as mask information that the feature corresponding to the location is important and that the feature corresponding to the location in the area is not important.

If the area ab for the character "ri" and the area ab for the character "wa" happen to be the same area, the mask information corresponding to each character will have the same pattern.

It is desirable to perform the comparison with respect to the characteristic pattern and the comparison of the important characteristic portion with the mask information at high speed.

FIG. 2 shows the configuration of an embodiment of a character identification device according to the present invention, taking the above points into consideration.

In Figure 2, 1 is a feature register in which the feature pattern extracted by scanning the recognition target character is stored, and 2 is a standard pattern memory in which the standard pattern corresponding to the recognition target character is stored in advance. , 3 is a mode control memory in which mask information corresponding to the standard pattern is stored in advance, 4 is a memory address control circuit that controls each address of the standard pattern memory 2 and the mode control memory 3, 5 6 and T represent the first comparison means according to the present invention, such as an exclusive OR gate; 6 and T represent the second comparison means according to the present invention, such as an AND gate and an OR gate, respectively; and 8 represents an address conversion means, respectively. ing.

It should be noted that when mask information for two or more standard patterns has the same pattern, the mode control memory 3 stores the mask information in common at the same location, but in such a case, the above Address translation means 8 is utilized.

The feature pattern extracted as a result of scanning the character to be recognized is stored in a feature register 1 and input to an exclusive OR gate 5 which is generated for each bit.

On the other hand, while the feature pattern is stored in the feature register 1, the standard pattern memory 2 is accessed by the memory address control circuit 4 and sequentially outputs a predetermined number of standard patterns, and the corresponding exclusive or The mode control memory 3 is accessed by the memory address control circuit 4 via the address conversion means 8, and the mask information corresponding to each of the above-mentioned standard patterns is sequentially output, and the AND gate is applied to each bit. 6.

Here, for example, the extracted characteristic pattern, the standard pattern for the character "ri" stored in advance in the standard pattern memory 2, and the mask information for the character "ri" stored in advance in the mode control memory 3. have the patterns shown in Figure 3 A, Figure 3 Figure Opening and Figure 3 Figure 2, respectively, while the standard pattern for the character "F" and the mask information for the character "W" are shown in Figure 3 Figure Opening ' and Figure 3, respectively. It is assumed that the pattern shown in Fig. 3 is 2'.

The 5th and 6th bits in each of these patterns are made to represent characteristic elements corresponding to the characteristic portion corresponding to area a of the recognition target character shown in Figure 1, and the 9th and 10th bits are It is assumed that the characteristic element corresponding to the characteristic part corresponding to the area of the recognition target character is displayed.

In the mask information as shown in Figure 3, 2', for example, logic "1" information means that it is a feature element corresponding to the important feature part as mentioned above, and logic "O" information means that it is a feature element corresponding to the important feature part as mentioned above. It means a feature element corresponding to a feature part that is not a feature, that is, a don't care element.

Now, while a characteristic pattern having a pattern as shown in FIG. 3 is stored in the characteristic register 1, the standard pattern memory 2 and mode control memory If the standard pattern and the mask information as shown in Figure 3 (2) are output, the output of the exclusive OR gate 5 that compares the characteristic pattern and the standard pattern bit by bit is as shown in Figure 3 (C). It begins to have a pattern.

Therefore, the output of the AND gate 6, which compares the output pattern of the exclusive OR gate 5 and the mask information from the mode control memory 3 bit by bit, has a pattern as shown in FIG. outputs a logic "O".

That is, the character to be recognized is identified as the character "ri".

On the other hand, while a characteristic pattern having a pattern as shown in FIG. If a standard pattern such as the one shown in FIG. 3, that is, a standard pattern representing the character "ri" in the illustration opening in FIG. For example, the output pattern of the exclusive OR gate 5 is as shown in FIG. 3, and the output pattern of the AND gate 6 is as shown in FIG. It comes to have.

Therefore, a logic "1" is output from the OR gate 7, and it is detected that the character to be recognized does not correspond to the character "wa".

As described above, according to the present invention, in addition to the standard pattern memory 2 that stores standard patterns in advance, the mode control memory 3 that stores mask information corresponding to the standard patterns in advance is provided to compare the characteristic pattern and the standard pattern. By comparing and recognizing mask information indicating the range of main features of the standard pattern in a form corresponding to the standard pattern, even when the number of characters to be recognized increases, similar characters can be identified. There is no need to perform separate processing, the processing can be simplified, recognition can be performed conveniently, and the configuration can be simplified.

Furthermore, the mask information as shown in 2 and 4 in FIG. 3 has the same pattern even though the standard patterns are different.

Therefore, mask information having the same pattern as described above can be commonly stored at the same location in the mode control memory 3.

In this case, it is sufficient to provide the address conversion means 8 on the input side of the mode control memory 30, and the storage capacity of the mode control memory 3 can be reduced.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram for explaining the present invention in detail, FIG. 2 is an explanatory diagram of an embodiment of the character identification device according to the present invention, and FIG. 3 is an explanatory diagram of its operation. In the figure, 1 is a feature register, 2 is a standard pattern memory,
3 represents a mode control mechanism, 5 represents a first comparing means, 67 represents a second comparing means, and 8 represents an address converting means.

Claims (1)

[Claims] 1. A character that includes a feature register that stores extracted feature patterns and a standard pattern memory that stores standard patterns in advance, and performs character identification by comparing the feature pattern and the standard pattern. In the identification device, a mode control memory stores in advance mask information indicating the main feature existence range of the standard pattern in a form corresponding to the standard pattern, the feature pattern from the feature register and the standard pattern memory. a first comparing means for bit-wise comparing the match or mismatch with the standard pattern; and comparing the bit-wise match or mismatch signal from the first comparing means with the mask information from the mode control memory. A character identification device characterized by comprising second comparison means for outputting a match/mismatch signal corresponding to bits corresponding to the feature existence range. 2. The character identification device described in Patent No. 1, characterized in that mask information having the same pattern is stored in common at the same location of the mode control memory, and an address conversion means is provided on the input side of the mode control memory.