JPS5853420B2 - Rotating magnetic head control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a rotating magnetic head control device having a delay device that can vary the delay time, and in particular, when obtaining a delayed output for an input signal corresponding to the rotation of the rotating magnetic head device, This allows the delay output to be automatically varied according to the phase difference between the signal and the reference signal.This allows the phase difference to be kept constant at all times with a relatively simple configuration. be.

The apparatus of the present invention will be explained below with reference to the drawings.

FIG. 1 shows a basic system diagram of the main parts of a rotary magnetic head control device to which the present invention is applied.

In the figure, reference numeral 1 indicates a pulse generator, which is a rotating pulse generator provided in relation to the rotation axis of the rotating magnetic head (not particularly shown) in order to control the rotating state of the rotating magnetic head (not particularly shown) to be constant at all times. This is for position detection.

One person shows the detection head. Therefore, from this single head, one detection pulse Pa is obtained every rotation in synchronization with the rotation of the rotating shaft.

This detection pulse Pa is used as an input signal as described later, but will be referred to as a detection pulse in the following explanation.

As is well known, this detection pulse Pa is used not only as a speed control signal, but also as a head switching signal for alternately switching the reproduction output obtained from a pair of rotating magnetic heads to create a continuous head output. Also used as a pulse.

Since the head switching pulse in this case needs to be reversed every 180°, generally, another pulse generator is provided in conjunction with the rotating shaft, and both pulse generators are connected at an angle of 180°. The above-mentioned head switching pulse is formed from each detection pulse while maintaining the interval.
In this example, the head switching pulse is generated by the single pulse generator 1 described above.

Therefore, the detection pulse Pa is supplied to the head switching pulse forming circuit 2 after passing through the amplifier 3, and the head switching pulse Ss is obtained from the terminal 6.

The detection pulse Pa is supplied to a variable delay device 10, where it is delayed as desired and then supplied as a sampling pulse Ps to a servo circuit for the rotating magnetic head device.

A sawtooth wave signal So formed based on the vertical synchronization signal Vd is supplied to the sampling circuit 60 constituting the servo circuit, and a control voltage Vc obtained by sampling this with a sampling pulse Ps drives the rotating magnetic head device. It is supplied to the drive circuit 61 for the motor M as a speed control voltage.

Note that if the VTR is provided with a dropout compensation circuit, it is necessary to stop the compensation operation at least at the time of head switching.

Reference numeral 7 in FIG. 1 is an inhibition circuit that generates an inhibition signal for this purpose, and its explanation will be described later.

The head switching pulse forming circuit 2 includes one delay circuit 4 and an automatic delay time setting circuit 20.
The delay time of the delay circuit 4 is determined by the signal obtained in , and the head switching pulse Ss can be formed using the delayed output as a reference. In this case, the pulse corresponding to one of the position detection pulses Pa or pb is This is electrically generated by the above-mentioned delayed output.

30 is a circuit for this purpose, and in the following explanation, this circuit 30
is called a quasi-pulse forming circuit.

The position detection pulse Pa obtained by one pulse generator 1 is supplied to the delay circuit 4 as in the conventional device, and after being delayed by a predetermined time, the delayed output Pa' is supplied to the flip-flop circuit 5 as a set signal. be done.

The delay circuit 4 provides a delay time such that the delay output p a/ is located in the middle of the overlapping section Wa of the head outputs (reproducing outputs) Sa and Sb (A and B in FIG. 3) from the rotating magnetic heads Ha and Hb. It was established for the purpose of

Here, an n-ary counter can be used as the delay circuit 4. Therefore, the counter reaches an operating state upon the arrival of a trigger signal (described later), and starts counting clock pulses from that point on, and this is the n-ary counter. The configuration is such that one output pulse is obtained when the number of n pulses is reached, that is, the time for counting n pulses is the delay time of the trigger signal.

The fact that an output pulse is not obtained until after n counts is the operation when the value of the preset signal (usually a coded digital signal) given to this counter is zero.

Therefore, when the preset value is a digital signal corresponding to /2n, half the count time at the upper side becomes the delay time, and the delay time can be arbitrarily varied by the preset value.

In this example, a signal corresponding to Wa/2 is preset, and the circuit 20 shown in FIG. 2 is this automatic setting circuit.

Next, this circuit 20 will be explained. Head output Sa
, Sb is a waveform shaping circuit 14a.

The signal is supplied via line 14b to a circuit 15 that detects an area Wa where the outputs Sa and Sb of both heads overlap.

The detection circuit 15 can be composed of a flip-flop circuit, and connects the rising pulse of the head output Sa to a set terminal.
Then, by supplying the falling pulses of the other head output sb to the reset terminals, a third detection signal Sd corresponding to the section Wa is obtained.

This detection signal Sd is supplied as a gate signal to the subsequent gate circuit 16, and therefore, the clock pulse PC (Fig. 3E) from the clock pulse generator 17 is applied to this gate circuit only during the period in which the detection signal Sd is obtained, that is, the section Wa. 16 to the counter 18, it is possible to count the clock pulses Pc corresponding to the section Wa.

Now, if the total number is N, this count number N is counted down to 2 by a downstream step down converter, in this example, a % step down step 19, and this output is inverted.

It should be noted that since the counter 18 used in this example is adapted to take out a digital signal as an output, it will be treated as if the count number N1, that is, the interval Wa, has been converted into a digital signal.

In the drawings, the signal system is indicated by "→" for convenience.

The counted down signal Pc' (FIG. 3F) is stored in the nonvolatile generation memory 21 and then supplied as a preset signal to the preset terminal of the above-mentioned delay circuit, that is, the counter 4.
The same configuration is used, and therefore the clock pulse generator is also the same.

Since this counter 4 is triggered by the pulse Pa, it starts counting from the time t1 when the pulse Pa is obtained, and when it counts exactly zN, the counter 4 reaches the full count because %N is preset. Therefore, at this time t2, an output pulse, that is, a delayed pulse Pa' is obtained.

Here, counting down the count number N to 2 corresponds to the interval "/, Wa" when converted to the interval Wa, so the delayed pulse P a' is located in the middle of the interval Wa. Become.

This delayed pulse Pa' is used as a pulse for the switching pulse Ss type.

In this way, after automatically setting the preset value of the counter 4, the pulse P can be set without going through the setting circuit 20.
Since the delay pulse P a' can be directly formed from the delay pulse P a', the foot circuit 30 is not needed after the preset value is set.

Next, a circuit 30 for electrically obtaining a pulse pb' (meaning a detection pulse obtained by the other pulse generator) having a phase difference of 180 degrees with respect to the pulse Pa' will be described.

This pulse Pb' is formed based on the delayed pulse P a', and therefore the repetition period of the delayed pulse P a/ is changed to wb
Then, if we count this interval wb and set the countdown value to z as the preset value of the counter, we get
The output pulse of the counter 22 corresponding to the counter 4 can be obtained in the middle of the section Wa.

That is, the condensed pulse Pb' can be formed using the same circuit configuration as the circuit 20 described above based on the delayed pulse Pa'.

Therefore, 23 is a latch circuit, although corresponding parts are marked with "," and redundant explanation is omitted.

The pulse "Pc'" is a signal counted down to 2, and its inverted output becomes the preset signal of the counter 22, so that the condensed pulse Pb' is obtained at time t4.

Needless to say, this t4 is located in the middle of the area where the head outputs Sa and Sb overlap.

The pulses Pa' and Pb' obtained in the above manner are supplied to the flip-flop circuit 5, and as a result, the switching pulse Ss shown in FIG. 3G is formed.

This switching pulse Ss is the head output Sa as shown in the figure.

It will always be reversed in the middle of the overlapping part of sb,
It is possible to fully achieve the initial purpose.

Pulse Pa' is supplied to delay device 10 as its input signal.

Next, this device 10 will be explained. When applying servo to a rotating magnetic head device, the time interval between the reference synchronizing pulse Vd and the position detection pulse Pa' is (5±5)H [where H is one horizontal scan It is standardized to be within [period].

Therefore, the delay time of the pulse P a' is determined so as to comply with this standard.

In FIG. 4, reference numeral 9 denotes a variable delay circuit (first preset type counter) for delaying the pulse pa/ by a predetermined time as described above.

The delayed output obtained by this circuit 9 becomes the sampling pulse Ps required by the servo circuit of the rotating magnetic head device.

40 is a delay circuit, that is, a control circuit that determines a preset value for the counter 9;

The operation of the control circuit 40 will be explained with reference to the waveform diagram shown in FIG. 5, where A shows the reference signal Vd, and in this example, a vertical synchronization signal is used.

Further, FIG. 2B shows the above-mentioned pulse Pa', and the relationship between this and the reference signal Vd is such that the reference signal Vd is obtained after this delayed pulse Pa' is obtained.

The time interval WC, that is, the phase difference ε between the two is determined to fall within the above-mentioned standard.

In this example, the interval corresponding to 7H is selected as the reference interval Wc.

In the present invention, based on these two pulses P a' and Vd, if the interval Wc is a prescribed interval, a prescribed delay time is given to the circuit 9, but if the interval Wc is not the prescribed interval as a result of automatic measurement, the circuit 9 is automatically The configuration is such that the delay time is changed by the difference, and ultimately the interval Wc is held constant.

Therefore, in order to measure this interval, a counter (second counter) 41 and a latch circuit 42 are provided, and the counter 41 is activated by the pulse Pa', and its count state is latched by the reference signal Vd.

The AND circuit 43 provided in the latch circuit 42 receives the reference signal Vd.
This is used for control to provide a latch operation only when .

The AND circuit 43 is supplied with a control signal Sc (FIG. 5D) for ANDing the reference signal Vd.

The control signal Sc is used to measure the above-mentioned interval Wc at regular intervals.

In this example, a 10EIz square wave signal is used as the control signal Sc, so that it is latched every 0.1 seconds and interval measurements are taken every 0.1 seconds.

Note that 44 is a control signal generation circuit, 45 is a flip-flop circuit that is set by the control signal Sc and reset by the output of the AND circuit 43, and 46 is an input terminal for the reference signal Vd.

Here, the output of the counter 41 is a bit-coded digital signal, and in this example, an inverted bit signal corresponding to the regular interval Wc is given to the counter 41 as its preset signal.

Therefore, when the counter 41 counts the number corresponding to the regular interval Wc, the output is zero.

That is, the pulse Pa' obtained with the regular interval Wc and the reference signal Vd maintain a predetermined phase difference ε.

Therefore, if the rotational state of the rotating magnetic heads Ha and Hb changes and the obtained interval changes, for example, as shown in FIG. 5, from Wc to (W c +W c' ) or W
If the interval changes from c to Wc''(WC>Wc//), the output of the counter 41 will also change accordingly, so if we consider the latch output ε corresponding to the phase difference, the rotating magnetic head Ha .

This means that the rotational state of Hb can be detected.

For convenience of explanation, let the latch output obtained at regular intervals be zero (actually a digital signal corresponding to zero),
Therefore, assume that a positive latch output is obtained when the interval is wider than the specified interval, and a negative latch output is obtained when the interval is narrower than the specified interval.

The latch output is sent to the adder 4 together with the output of the shift register 47.
8, and its addition output is supplied to the above-mentioned counter 9 as a preset signal that determines the delay time.

Here, the output of the adder 48 is supplied to the shift register 47, so that the state immediately before the addition output can be obtained every time the control signal Sc arrives.

That is, if the addition output is Pk, the output of the shift register 47 will be Pk.

Note that Pk satisfies the following relational expression.

(PRO is the preset value of the counter 41) However, in the initial control state, the shift register 47 takes an appropriate value Po.

In the example described below, in order to facilitate understanding of the operation, the initial value of the shift register 47 is Po, and the latch output ε
Assume that the initial value Po is zero, and when this initial value Po is selected as the preset value of the counter 9, the pulse Pa' is delayed by a prescribed time T.

That is, when the interval is Wc, it is assumed that ε-0 and the sampling pulse Ps is obtained at time t2 delayed by τ from the reference signal Vd.

Also, a sawtooth signal S obtained in synchronization with the reference signal Vd
o will be sampled with this sampling pulse Ps at time t2, but the control voltage Vc of the servo system based on this sampling value (usually the voltage applied to the motor associated with the rotating magnetic head) will be the reference control voltage. Let's assume that it is selected.

Based on the above conditions, the operation of the control circuit 40 is
To explain with reference to the figure, first, the measurement interval is a specified interval W
If they match C, the latch output ε becomes zero, so the delay time of the counter 9 is not changed at this time.

Here, if the time from time 11/ when the reference signal Vd is obtained until the sampling pulse Ps is obtained is τ, then this time τ changes depending on the measurement interval.

Next, if the interval Wc is wider than the specified one, for example, Wc'
It is conceivable that the area may be very wide.

At this time, the latch output ε becomes ε>0, so the addition output also increases by that amount, and the preset value of the counter 9 eventually becomes larger.

Accordingly, the counting time up to full counting becomes shorter, and the delay time of the counter 9 is shorter than in the case of step stripping.

Here, the delay time is automatically changed from τ to I, but
Since the sampling value obtained by the sampling pulse Ps obtained at that time will be relatively smaller than that at the specified time,
The control voltage Vc also decreases, thereby imparting a control action to accelerate the motor.

Finally, as a result of the motor being rotated at high speed, if the interval Wc is narrowed and changes to Wc", the preset value will be small and the delay time of the counter 9 will automatically change from τ to τ"(τ<τ"). Changes to

In this way, if the delay time of the counter 9 is automatically changed according to the rotational state of the rotary magnetic head, the control voltage Vc will also change accordingly, so that the servo will act on the rotary magnetic head, so that during operation of the VTR, Correspondingly to the constantly measured distance Wc, the distance Wc is automatically corrected to within the standard.

By the way, each head Ha, H is activated by the head switching pulse Ss.
When switching head output Sa and Sb from b,
It is preferable not to operate the dropout compensation circuit.

In this example, the inhibition signal Si for controlling this compensation circuit is the above-mentioned pulse Pa'.

It is made of Pb'.

FIG. 6 shows a system diagram for this purpose. Pulses P a' and P b' obtained independently are combined in a synthesizer 51 to obtain a composite pulse Po (A in FIG. 7), and then the delay time is are supplied to different first and second delay circuits 52 and 53, respectively.

The delay time τ1 of the first delay circuit 52 is extremely small, and in this example, τ1 is selected to be 1 m5ec.
τ2 is relatively long so that it is located near the subsequent composite pulse, and in this example, τ2 is selected to be about 15.7 m5ec.

Therefore, the delayed composite pulse P01゜Po obtained by these circuits
2 (FIG. 7B, C) to the RSS flip-flop circuit 54, the inhibition signal Si having the desired pulse width is generated.
can be obtained.

Therefore, by supplying this inhibition signal Si to the above-mentioned compensation circuit, it is possible to reliably inhibit the dropout compensation operation during head switching.

As described above, the present invention includes the delay device 10 that includes the delay circuit 9 that is configured with a counter and the control circuit 40 that controls the delay time, so that The delay time can be automatically varied.

Therefore, in the above case, the desired delayed output, ie, the sampling pulse Ps, can be generated based on the phase difference between the position detection pulse Pa, which is the input signal, and the reference signal Vd.

Therefore, by applying the present invention to the control system of a rotary magnetic head control device of a VTR, it is possible to control the interval, that is, the phase difference, between the pulse Pa and the reference signal Vd to be constant at all times.

In this case, conventionally, a fixed delay circuit is interposed to form the sampling pulse Ps from the pulse pa/, and the interval Wc between the pulse Pa' and the reference signal Vd is manually adjusted to be within a specified range. adopts a configuration in which fluctuations in the interval Wc are absorbed by a subsequent servo circuit.

The present invention has a feature that it is possible to automatically set a delay time corresponding to the interval Wc, and that the rotary magnetic head control device itself can be simplified.

In this example, in determining the delay time of the delay circuit 4 composed of a counter as shown in FIGS. 2 and 3,
A pulse generator 12 and an automatic setting circuit 20 are provided, and the delay time of the delay circuit 4 is automatically determined using the signal obtained by the setting circuit 20, and the head H is determined based on the output of the circuit 4.
A, Hb switching pulse Ss can be formed.

Therefore, since there is no need to rely on mechanical precision, the switching timing between the heads Ha and Hb can be made accurate.

In this case, in addition to being able to completely eliminate manual adjustment work for the delay circuit, resulting in labor savings, reliability is significantly improved, which is an effect that cannot be obtained in the past.

In addition, when this device is integrated into an IC, there are no external parts for adjustment, so it is extremely advantageous to integrate the device into an IC, and accordingly, the device can be made smaller.

In addition, when forming the head switching pulse Ss, only one pulse generator 12 is associated with the rotating shaft, so that one pulse Pa is obtained, but the other pulse pb is generated electrically. This eliminates the need for positioning when installing the pulse generator 12, which has the practical benefit of making the control device easier to manufacture.

As described above, the device of the present invention can obtain a delayed output corresponding to the phase difference between the input signal and the reference signal, and since the circuit configuration can be digitized, it can be easily integrated into an IC.Moreover, if automatic setting of the delay time is adopted, it can be done manually. Labor-saving can be achieved as adjustment work can be completely eliminated.

[Brief explanation of drawings]

FIG. 1 is a system diagram showing an example of a rotating magnetic head control device according to the present invention, FIG. 2 is a system diagram showing an example of a device for forming head switching pulses, and FIG. 3 is an explanatory diagram of its operation.
FIG. 4 is a system diagram showing an example of the device of the present invention, FIG. 5 is an explanatory diagram of its operation, FIG. 6 is a system diagram of the inhibition circuit, and FIG. 7 is an explanatory diagram of its operation. IA and IB are pulse generators, 4A, 4B, 9°52 and 53 are delay circuits, 20 is an automatic setting circuit, 12 is a pulse generator, 30 is a condensed pulse forming circuit, 7 is an inhibition circuit, Ha
, Hb is a rotating magnetic head, 10 is a delay device, 42 is a latch circuit, 48 is an adder, and 47 is a shift register.

Claims (1)

[Claims] 1. A rotating magnetic head device, a pulse detector that obtains pulses corresponding to the rotation of the rotating magnetic head device, and a first pulse detector that counts clock signals based on the output pulses of the pulse detector.
a second counter that counts the clock signal using the output pulse; a latch circuit that latches the output of the second counter in synchronization with a reference synchronization signal; A sampling pulse having a delay amount corresponding to the phase difference between the output pulse and the reference synchronization signal is obtained from the first counter, and this sampling pulse is applied to the rotating magnetic head. A rotating magnetic head control device that is supplied to the rotating servo system of the device to control the speed of the rotating drum.