JPS5927965B2 - Rotating magnetic head control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a rotating magnetic head control device for a VTR, and is capable of accurately switching between a pair of magnetic heads without relying on mechanical accuracy.

During reproduction, the reproduction outputs alternately obtained from the pair of rotating magnetic heads are taken out as continuous reproduction outputs by supplying head switching pulses, as is well known.

FIG. 1 shows a schematic system diagram of a control device for a rotating magnetic head, including this switching pulse. In the figure, 2A, 2
B is a pulse generator IA provided in association with a rotating shaft (also not shown) for rotating a pair of magnetic heads (not particularly shown) that are arranged at an angular interval of 1800 mm.
, IB position detection heads, which are exactly 180
They are arranged with an angular spacing of 0.

Therefore, position detection pulses Pa and Pb (see FIG. 2C and D) indicating the rotational position of the rotation shaft are obtained from these heads 2A and 2B. Here, the relationship between the two reproduction outputs obtained from the magnetic head is as shown in FIGS. 2A and B, such that one head output (reproduction output) Ba and the other head output Sb partially overlap. Designed.

As is well known, the overlapping parts have the same information content.
Therefore, in this conventional control device, the head outputs Ba, Sb
The head switching pulse Ss is formed from these position detection pulses Pa and Pb obtained in synchronization with the above.
Therefore, the position detection pulses Pa and Pb are passed through amplifiers 3a and 3b provided as necessary to delay circuits 4A and 4, respectively.
B is supplied. If these delayed outputs are illustrated with dotted lines in FIG. 2C and D, the outputs Pa' and Pb of these delay circuits are
2 to a switching pulse forming circuit, in this example an RS flip-flop circuit 5, a switching pulse Ss as shown in FIG. 2E is generated. In this case, if head switching is performed exactly in the middle of the overlapping section of both head outputs Ba and Sb, continuous high-quality head output can be obtained.
1 and D2 are manually adjusted to switch the heads exactly in the middle of the overlapping section as shown in FIG. Note that the delay times D1 and D2 will be equal if the pulse generators IA and IB maintain an angular spacing of exactly 1800, but since it is difficult to achieve such mechanical precision during installation, the delay times are usually D1\D2. This also requires manual adjustment. In addition, in FIG. 1, 6 is the switching pulse Ss
The output terminal 7 is an inhibit circuit for stopping the operation of at least a dropout compensation circuit (not shown) at the time of head switching, so that an inhibit signal Si shown in FIG. 2F can be obtained.

8 is its output terminal.

Reference numeral 9 denotes a delay circuit for forming a sampling signal, and by supplying this signal to a servo circuit (not particularly shown) for controlling the rotational state of the rotary head device, the rotational head can be controlled by the difference in sampling values. Controlling the device as desired. 11 is an output terminal of the circuit 9.

By the way, in the control device 10 configured as described above, switching between the pair of magnetic heads is performed using the switching pulse Ss obtained from the delayed outputs Pa'' and Pb'', as mentioned above. In this control device 10, the delay circuit 4A is always
, 4B must be manually adjusted.

Therefore, not only is the adjustment work complicated, but also the reliability is poor due to manual adjustment. Further, in this example, since there are many adjustment points, if this control device 10 is implemented as an IC, there are drawbacks such as a large number of external components, which becomes a bottleneck in implementing an IC, and also hinders miniaturization. Moreover, pulse generators 1A and 1B
Unless the mechanical installation precision of the product is improved, the adjustment time will increase because each product requires different adjustment. In view of this point, the present invention automates the adjustment of the system for obtaining the switching pulse Ss in the control device 10, thereby eliminating the various drawbacks of the conventional device described above.

That is, in the present invention, as shown in the basic system diagram in FIG. 3, one pulse generator 12 and an automatic delay time setting circuit 20 are provided. The delay time of the circuit 4 is determined, and the head switching pulse Ss can be formed using the delayed output as a reference.
In this case, the pulse corresponding to one of the position detection pulses Pa or Pb is electrically generated by the above-mentioned delayed output.

30 is a circuit for this purpose, and in the following explanation, this circuit 30
is called a condensed pulse forming circuit.

Note that 40 is a control circuit for the delay circuit 9, the details of which will be described later together with a specific example of the inhibition circuit 7. Next, Figures 4 and 5
With reference to the figures, automatic setting circuit 2 which is the main part of the present invention
Let's explain about 0. In the present invention, as shown in FIG. 4, one pulse generator 12 is provided in connection with the rotating shaft for the rotating magnetic head, and the position detecting pulse PA obtained from the pulse generator 12 is provided.
is supplied to the delay circuit 4 as in the conventional device, and after being delayed by a predetermined time, the delayed output PA' is supplied to the flip-flop circuit 5 as a set signal. As described above, the delay circuit 4 is connected to the overlapping section W of the head outputs Sa and Sb.
This delay time is provided to provide a delay time such that the delay output PA' is located in the middle of the head output PA', and in the present invention, this delay time is automatically generated from the head outputs Sa and Sb. Here, an n-ary counter can be used as the delay circuit 4, and therefore the trigger signal (described later)
The counter enters the operating state at the arrival of , so it starts counting clock pulses from that point on, and when the number of clock pulses reaches n, one output pulse is obtained.In other words, the time to count n clock pulses is the delay time of the trigger signal. It is configured to be. The fact that an output pulse is obtained only after n counts is the operation when the value of the preset signal (usually a coded digital signal) applied to this counter is zero. Therefore, when the preset value is a digital signal corresponding to -fn, the count time in the above example becomes the delay time, and the delay time can be arbitrarily varied by the preset value. In the present invention, Wa/2
The circuit 20 shown in FIG. 4 is this automatic setting circuit.

Next, this circuit 20 will be explained. In the figure, Ha
, Hb are heads for recording and reproducing information signals, and head outputs Sa and Sb obtained from these heads are sent to waveform shaping circuits 14a and 14b.
The signal is supplied to a circuit 15 for detecting an overlapping section Wa of both head outputs Sa and Sb.

The detection circuit 15 can be composed of a flip-flop circuit, and connects the rising pulse of the head output Sa to the set terminal.
Then, by supplying the falling pulses of the other head output Sb to the reset terminals, the detection signal Sd of FIG. 5D corresponding to the section Wa is obtained. This detection signal Sd is supplied to the subsequent gate circuit 16 as a gate signal, and is then supplied with the clock pulse Pc (fifth clock pulse) from the clock pulse generator 17.
In FIG. E), only the period during which the detection signal Sd is obtained, that is, the period Wa, is supplied to the counter 18 through the gate circuit 16, so that the clock pulse Pc corresponding to the period Wa can be counted. Now, assuming that the total number is N, this counted number N is counted down to % by a downstream step down converter, in this example, a % step down converter 19, and this output is inverted. Note that since the ℃・ru counter 18 used in this example is configured to take out a digital signal as an output, from now on, all counts N, that is, the interval Wa will be treated as having been converted to a digital signal. .

In the drawing, the signal system is indicated by "◆" for convenience.
The counted down signal Pc' (FIG. 5F) is stored in the nonvolatile memory 21 and then supplied as a preset signal to the preset terminal of the above-mentioned delay circuit, that is, the counter 4.
The same configuration is used, and therefore the clock pulse generator is also the same.

Since this counter 4 is triggered by the pulse PA, it starts counting from the time t1 when the pulse PA is obtained, and when it has counted just 4-N, it has previously reached -FN.
Since the counter 4 has been preset, the counter 4 reaches a full count, and an output pulse, that is, a delayed pulse PA/, is obtained at this time T2. Here, counting down the count number N to % corresponds to the interval -h-Wa when converted to the interval Wa, so the delayed pulse PA' is located in the middle of the interval Wa. .

This delayed pulse PA'' is the pulse Pa'' in the conventional device.
, which is therefore used as the pulse for forming the switching pulse Ss. In this way, after the preset value of the counter 4 is automatically set, the delay pulse PA'' can be directly formed from the pulse PA without going through the setting circuit 20. becomes unnecessary.

Next, a pulse P equal to the pulse Pbl in the conventional device
A circuit 30 for electrically obtaining B'' will be explained.

This pulse PB' is formed based on the delayed pulse PA'. Therefore, when the repetition period of the delayed pulse PA' is Wb, this interval Wb is counted, and the value counted down to % is set as the preset value of the counter. Then, the output pulse of the counter 22 corresponding to the counter 4 can be obtained in the middle of the section Wa. That is, the condensed pulse PB' can be formed based on the delayed pulse PA'' with a circuit configuration similar to that of the circuit 20 described above. Therefore, the corresponding portions will be marked with "D" and repeated explanation will be omitted. Also, 23 is a latch circuit. And Pulse Pe! ! is a signal counted down to +, and its inverted output is the counter 22.
Therefore, the condensed pulse PB' is obtained at time T4. At this point T4, the head outputs Sa, S
Needless to say, it is located in the middle of the overlapping section of b.
The pulses PA' and PB' obtained in the above manner are respectively supplied to the flip-flop circuit 5, and as a result, the switching pulse Ss shown in FIG. 5G is formed.

This switching pulse Ss is the head output Sa, Sb as shown in the figure.
It is now possible to constantly invert in the middle of the overlapping part of , and the initial purpose can be fully achieved. By the way, when applying servo to a rotating magnetic head device, the time interval between the reference synchronization pulse Vd and the delay pulse PA' is (5±5)H[
However, H is standardized to be within one horizontal scanning period. Therefore, as applicable to this standard, pulse PA
Although the delay time ' is determined, this example is configured so that this delay time can also be automatically set. Next, this configuration will be explained with reference to FIG. 6 and subsequent figures. In FIG. 6, 9 is a circuit for delaying the pulse PA5 by a predetermined time as described above;
Consists of counters.

Note that since the delayed output obtained by this circuit 9 ultimately becomes a sampling pulse required by the servo system, this delayed output will be referred to as a sampling pulse Ps from now on. Also 4
0 is a delay circuit, that is, a control circuit that determines the preset value of the counter 9. For convenience of explanation, the operation of the control circuit 40 is as follows.
This is the case when playing back a VTR. This will be explained with reference to the waveform diagram in FIG. When the play button is operated while the VTR is in the playback state, a play pulse Pp (FIG. 7A) is obtained from the circuit 41 for 1 to 2 seconds in connection with this, but the time t1 at which this is obtained is Pulse PA later than
'' (Figure 7B) is obtained.

Also, after a number H of pulses PA', a reference synchronizing pulse Vd (FIG. 7C) is obtained. As this synchronization pulse Vd, an external synchronization signal or a vertical synchronization signal is used. Then, the interval Wc between the synchronization pulse Vd and the position detection pulse PA' is adjusted so as to be within the above-mentioned specifications. In this example, 7H is selected as the reference interval Wc. In this example, based on these three pulses PP, PA/ and Vd, the interval W
If c is a prescribed interval, the prescribed delay time is given to the circuit 9, but if the result of automatic measurement is not the prescribed interval Wc, the delay time is automatically changed by the difference,
Ultimately, the configuration is such that the distance Wc is kept constant.

Therefore, the counter 9 first operates to delay by the set time. 42 in Figure 6 is the set time (for example, 1 msec
), and the setting signal obtained from this is supplied together with the play pulse Pp to a first NAND circuit 43 composed of four NAND circuits as shown in the figure. The setting signal is sent to the counter 9 only during the period in which the setting signal is obtained.

A second NAND circuit 44 is interposed between the first NAND circuit 43 and the counter 9, and performs a NAND operation on a measurement signal, which will be described later. This measurement signal corresponds to the interval between the pulse PA' and the synchronizing pulse Vd obtained when the VTR is activated.

Therefore, a counter 45 and a latch circuit 46 are provided to measure this interval, and the counter 45 is operated with the pulse PA' and its counting state is latched with the synchronizing pulse Vd. An AND circuit 47 provided in the latch circuit 46 is used for control to provide a latch operation only when the synchronizing pulse Vd is obtained. The latch output, that is, the measurement signal is sent to the third AND circuit 5 together with the inverted pulse sieve of the play pulse Pp [49 is an inverter therefor].
0 and is configured such that no measurement signal is available at its output during the play pulse Pp.

Therefore, the setting signal itself becomes the preset signal for the counter 9 between time points t1 and T2 shown in FIG.

The counter 9 starts counting upon the arrival of the pulse PA', so under the preset conditions mentioned above, We(-1ms
ec), the sampling pulse Ps
can be obtained, the synchronization pulse V shown in Fig.
The sawtooth signal SO synchronized with d at time T3,
It is sampled by this sampling pulse Ps. Therefore, the sampled value in this case becomes the reference level supplied to the servo circuit system. FIG. 7H shows an example of the control voltage Vc obtained by the above-mentioned sampling, which is applied to a rotating shaft motor (not shown) when servo is applied. By the way, when the play pulse Pp disappears, the measurement signal itself is supplied to the counter 9 as a preset signal, so at least the three types of measurement signals described below can be obtained depending on the rotational state. The delay time will be changed.

First, when the measurement signal matches the setting signal (・),
At this time, the delay time We of the counter 9 is not changed (
(See Figure 7 (1)). Second, a case can be considered in which the interval Wc is wider than the specified one, for example, by We'' (measurement signal>setting signal).

In this case, since the preset value becomes larger, the counting time to full count becomes shorter, and the delay change of counter 9 is shorter than in the first case (see Fig. 7 (11), τ5 is the delay time). Here, the delay change is automatically changed from τ to τ5, but since the sampling value obtained by the sampling pulse Ps obtained at that time is relatively smaller than that at the specified time, the control voltage Vc also decreases, This provides a control action that accelerates the motor. Finally, as a result of the motor being rotated at high speed, when the interval Wc is narrowed and changes to Wc/', the measurement signal becomes the setting signal, so the preset value is small, and the delay time of the counter 9 also changes from τ to I( τ〈′) (see Fig. 7()).

In this way, any one of the first to third rotational states is detected depending on the rotational state of the rotating magnetic head, and the interval Wc is automatically corrected to within the standard according to the measured interval Wc. be done.

Note that, once preset, the delay time of the counter 9 is not changed, and the delay time determined by the preset value becomes the delay time of the counter 9. By the way, head switching pulse S
Head outputs Sa, Sb from each head Ha, Hb at s
It is preferable not to operate the dropout compensation circuit when switching.

In this example, the inhibition signal Si for controlling this compensation circuit is
is formed from the above-mentioned pulses PA'' and PB7. FIG. 8 shows a system diagram for this purpose. After obtaining PO (FIG. 9A), it is supplied to first and second delay circuits 52 and 53 having different delay times.The delay time τ1 of the first delay circuit 52 is extremely small. In this example, τ1 is selected to be 1 msec, and τ2 in the second delay circuit 53 is relatively long so as to be located near the subsequent composite pulse, and is 15.7 msec in this example.
τ2 is selected to be approximately c. Therefore, the delayed composite pulses POl, PO2 (Fig. 9B, C) obtained by these circuits are
By supplying the signal to the flip-flop circuit 54, an inhibition signal Si having a desired pulse width (2 msec in this example) can be obtained. Therefore, by supplying this inhibition signal Si to the above-mentioned compensation circuit, the dropout compensation operation at the time of head switching can be reliably inhibited.

As explained above, in the present invention, when determining the delay time of the delay circuit 4 composed of a counter, the pulse generator 12
An automatic setting circuit 20 is provided, and the delay time of the delay circuit 4 is automatically determined using the signal obtained by the setting circuit 20, and the switching pulse Ss for the heads Ha and Hb is formed based on the output of the circuit 4. It is made to be moisturized.

Therefore, in the present invention, the switching timing of the heads Ha and Hb can be made accurate without relying on mechanical precision.

In this case, in addition to being able to completely eliminate manual adjustment of the delay circuit, resulting in labor savings, there is also the advantage of significantly improved reliability, an effect that cannot be achieved in the past. In addition, when this device is integrated into an IC, there are no external parts for adjustment, so it is extremely advantageous to use an IC, and accordingly, the device can be made smaller. In the present invention, when forming the head switching pulse Ss, only one pulse generator 12 is associated with the rotating shaft, and although one pulse PA is obtained from this, the other pulse PB is electrically formed. This eliminates the need for positioning when installing the pulse generator 12, which has the practical benefit of making the control device easier to manufacture.

[Brief explanation of drawings]

Fig. 1 is a system diagram showing an example of a conventional rotary magnetic head control device, Fig. 2 is a waveform diagram for explaining its operation, Fig. 3 is a system diagram showing an example of the device of the present invention, and Fig. 4 is its outline. FIG. 5 is a diagram explaining its operation, FIG. 6 is a diagram explaining its operation, FIG. 7 is a diagram explaining its operation, and FIG. 8 is a diagram explaining its operation. FIG. 9 is an explanatory diagram of the operation. 1A and 1B are pulse generators, 4A, 4B, 9, 52 and 53 are delay circuits, 12 is a pulse generator, 30 is a condensing pulse forming circuit, 7 is an inhibiting circuit, Ha and Hb are rotating magnetic heads, and 20 is a It is an automatic setting circuit.

Claims (1)

[Claims] 1 A pair of rotating magnetic heads provided with an angular spacing of 180° from each other, a pulse generator provided in relation to the rotating shaft, and a delay in which the position detection output from this pulse generator is supplied. a circuit, a circuit for detecting an interval where the reproduced output from one magnetic head overlaps with the reproduced output from the other magnetic head, and a counter for counting clock pulses during this interval based on the output of the detection circuit. Becomes,
A rotary magnetic head control device characterized in that a delay time of the delay circuit is determined based on a signal obtained by stepping down the counter output, and a switching signal for the magnetic head is formed using the delayed output as a reference.