JPS5854508B2 - hand warmer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a semiconductor integrated circuit suitable for, for example, an input gate section of a TTL integrated circuit.

The basic circuit of a TTL integrated circuit is shown in FIG.

This circuit example constitutes a NAND gate and operates as follows.

In other words, if even one input is at “0” level, the current is Rg
, flows out between the base and emitter of Qt, and Q2
p Qa is OFF.

Q4 turns ON and the output becomes "1" level.

If all inputs are at 1” level, the base of Q2 is R.
The base current flows between the base and collector of gXQt, Q2, and Qa becomes 0NXQ4 is OFF, and the output is "0".
``It is something that performs an action that becomes a level.

The input leakage current for this circuit is □□.

It is expressed as H'F■, L×β.

IIL is the input load current, which is the current flowing through the input gate resistor Rg, and β is the reverse current amplification factor.

The smaller IIH is, the more fan-in can be increased, which is desirable.
Since IL is almost constant, β is required to reduce IIF[.

needs to be made as small as possible.

For this reason, various efforts have been made to reduce β in the input transistor 01 portion of the TTL circuit.

Figure 2 shows one example of this, and its characteristics are that the base region has a female-specific shape as shown in the figure, part 1 where a plurality of emitters E are formed, and part 2 where a base B is formed.
and a thin and long part 3 connecting them, especially having a base resistance Rb.

FIG. 3 shows an equivalent circuit of the input transistor Q0 having such a configuration.

Between the base B and the collector C, there is a diode D directly under the base electrode.The above ■□1 flows through Rb■,L
It consists of IIL2 flowing through I and D.

IILl is I if Rb is designed to be 500 ohms, for example.
IL1 middle ■.

□It is about 2×1, and in the equivalent circuit in Figure 3, it is llHf.
:0 1, L1×β.

Therefore, using an input transistor having such a configuration can reduce IIH by about one order of magnitude.

However, when this transistor is also shown in the xx' cross section of FIG. 2, there is generally a low-resistance N It has a buried layer 7.

Since this layer has the effect of increasing the reverse injection efficiency, that is, the efficiency of electron injection from the collector to the emitter of the input transistor, it has been an obstacle to lowering β.

Particularly when this N0 buried layer approaches the base layer during heat treatment, the influence becomes greater, which is a problem.

The present invention has been made with the aim of improving the above-mentioned drawbacks.

The details will be explained below using FIGS. 5 to 7.

In these figures, the same parts as in FIGS. 1 to 4 are given the same reference numerals.

FIG. 5 is a plan view of one embodiment, and FIG. 6 is a sectional view taken along the X-length line in FIG.

In the figure, the N+ buried layer 17 is such that no buried layer is provided directly under the emitter in order to eliminate the effect of increasing the reverse injection efficiency in the emitter region.

As a result of a comparative test of the product constructed in this manner with the conventional product, it was confirmed that ■□ was reduced to - to - of the conventional product, compared to 10 to 20 lLA of the conventional product.

10 Normally, gold is diffused in the manufacturing process of TTL circuits, but Au has the property of being easily trapped in the N buried layer during diffusion, but in the case of the present invention, the buried layer directly under the emitter is small. Au becomes easier to diffuse and therefore the lifetime in the base is reduced, which contributes to lowering β.Furthermore, since there is no buried layer, the collector resistance directly under the emitter increases.1. It seems that the reduction in L2 also led to good results.

FIG. 7 shows another embodiment of the present invention. In this example, the base and collector electrode portions have a female N0 buried layer 17 similar to FIG. 5.
Further, an n0 buried layer having a low impurity concentration and a shallow diffusion depth is provided directly below the emitter region.

In this case, there is an effect of reducing the efficiency of back injection from the collector.

In such a configuration, for example, if the surface concentration of the N buried layer directly under the base and collector is 5
jm/, 1 The diffusion depth is 5 μm, and the concentration of the n0 buried layer directly below the commissure is 5×1013 atrn/cd1.
The depth is 3 μm, and the IIH is 10 to 20 compared to the conventional product.
It decreased to 1/2 of μA.

Although the above description has been made regarding an example in which the transistor has an n-p-n structure, the present invention can also be applied to a p-n-p structure, in which case transistors having all opposite conductivity types may be used.

The present invention is as described above, and has the remarkable effect of reducing II□ of an integrated circuit and greatly increasing fan-in.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing an example of a TTL integrated circuit, Figure 2 is a plan view of the input gate section of Figure 1, Figure 3 is the equivalent circuit of Figure 2, and Figure 4 is the X of Figure 2. - Sectional view along the X-ray, 5th
The figure is a plan view of the first embodiment of the present invention, and Figure 6 is taken along the line X-X in Figure 5.
FIG. 7 is a cross-sectional view of another embodiment. B: base electrode, C: collector electrode, 17: buried layer.

Claims (1)

[Claims] 1 A base resistor is formed in a base region connecting a plurality of emitter regions and a base electrode, a normal buried layer is provided directly under the base electrode and the collector electrode, and a buried layer is provided directly under the emitter region. A semiconductor integrated circuit characterized in that the concentration of the buried layer is lower than that directly under the electrode.