JPS5855754B2 - How to control cycloconverter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention comprises a plurality of unit converters including a three-phase bridge type thyristor self-exciting converter that is controlled at a leading phase angle with respect to a three-phase AC power supply voltage. This invention relates to a control method for switching current polarity in a cycloconverter that supplies

1 to 3 are configuration diagrams showing an example of a cycloconverter configured by combining a plurality of unit converters including a self-excited converter.

In the case shown in Figure 1, unit converters AP and AN are both self-exciting converters, and both converters are connected to each other (in parallel (in parallel) to the load (inversely to each other with respect to the load). wired in parallel.

However, a cycloconvert consisting only of self-excited converters is rarely put into practical use, and it is generally used in combination with a σ separately-excited converter BP5BN as shown in Figure 2. be.

By doing so, the lagging reactive power taken by the separately excited converter and the leading reactive power taken by the self-excited converter are offset, and a great effect is produced, such as ensuring high power factor operation of the cycloconverter.

Furthermore, since self-commutated converters are equipped with forced commutation circuits and are more expensive than independently-excited converters that do not have such circuits,
As shown in Figure 3, the separately excited converter BP belonging to the positive load current
separately excited converter BNt belonging to 17BP2 and negative load current,
An economical connection is also known in which the BN2 is combined with a self-excited converter A that is shared by both polarities of the load current.

A cycloconverter is selected in which the converter to be operated corresponds to the desired polarity of the load current.

By controlling the control angle of the selected transducer, the desired current profile (for example sinusoidal) can be obtained.

Moreover, when switching the polarity of the load current, the gate pulse of the converter is blocked after confirming that there is no current in the converter belonging to one polarity, and then, after a predetermined current stop period, the gate pulse of the converter belonging to the other polarity is switched. Non-cyclic current control, well known in the stationary Leonard art, is performed by initiating the application of gate pulses to the transducer.

However, the current stop period becomes a switching time.

In order to compensate for this switching dead time (the delay between the actual current value and the current target value that occurs) and obtain, for example, a good sine wave output current, it is necessary to It is required to output a full output voltage.

This requirement is particularly noticeable when the cycloconverter is operated with an inductive load, but if the conventional phase control method, that is, the gate pulse supply method, was adopted, the timing at the time of switching the load current would be As a result, the maximum possible output voltage at that time may not be obtained, or rather, in most cases may not be obtained.

In a self-excited converter controlled by an advanced phase angle, the output voltage rises from a polarity opposite to the desired current polarity at the time of polarity change, so the switching time becomes long.

For this reason, the current rises poorly, and the actual current waveform is greatly distorted from the desired current waveform.

This point will be explained in more detail below with reference to the drawings.

Fig. 4 is a block diagram showing a conventional gate pulse supply circuit, Fig. 5 is a converter circuit diagram consisting of a three-phase bridge-connected cyrisk, and Fig. 6 explains the operation of Fig. 4. FIG.

FIG. 4 shows the gate pulse supply circuit for the self-excited converters A p and A N; one of the converters A p
? The corresponding parts are shown in detail, and the other converter A
For N only three parts are shown (see FIGS. 4 and 6 for the phase relationship of the thyristors U-zc in FIG. 5).

). Here, the current regulator 1 outputs a common regulation output to all unit converters so that the result between the actual value or current value Iist of the load current and the target value l5oll becomes zero.

The output of this regulator 1 is applied to the bidirectional converter A as a phase control signal.
Since it is given to the firing angle adjustment unit 2 common to P and AN, the firing angle adjustment unit 2 compares this phase control signal with a synchronization signal separately generated from the power supply voltage, and when they match, outputs the pulse. occurs.

Each output pulse of the firing angle adjustment unit 2 is shaped into a 120° width pulse by the shaping circuit 3, and then passed through the AND gate 51 to the gate 1 of each sirisk of the self-excited converter A.
U-2 or to the thyristor U-Z of the self-exciting converter AN.

In addition, the pulse shaping circuit 3 only needs to shape the output pulse of the firing angle adjustment unit 2 into a 120° width pulse using a built-in flip-flop group, and further converts them into a comb-shaped pulse. It can also have the function of

This is to prevent the iron core from being saturated when a gate pulse is applied via a pulse transformer, and in some cases, this function may be omitted.

The current switching command circuit 4 controls the analog game 1-51, 52 corresponding to the converter to be operated by determining the polarity of the current target value l5oll, for example, and
It controls a polarity switch 6 interposed between the current regulator 1 and the firing angle adjustment unit 2.

In that case, as already mentioned, there is a current stop period in order to switch the converter without circulating current, during which both AND gates 51, 52 are closed.

For example, the AND gate 51 is controlled by the current switching command circuit 4.
When the converter Ap &? Even if c is already at a value that gives the maximum forward conversion output, this converter AP starts from providing a voltage of opposite polarity to the desired current direction.

For example, t immediately after the current stop period provided at the time of release of the pulse off in FIG. 6, that is, the change of the load current.

(at this point, the AND gate 51 is opened and the converter A
It is assumed that the operation of P has started.

With the AND gate 52 open, the converter AN
1 is a level corresponding to the maximum control angle φmaxt (this control signal C is, when the AND gate 51 is opened,
At this time, the polarity switch 6 (this is done at the same time) and the converter AP (which means the minimum control angle φm
i in Ic changes (time t.

). In the state immediately before this (assuming that the output of the pulse shaping circuit 3 was in a state where the output of the pulse shaping circuit 3 was in a state for the converter AP to conduct, for example, the thyristors ■ and Z as shown in the figure), the operation of the converter AP starts when the thyristors ■, It starts with the firing of Z.

At this point t.

Hereinafter, the first signal that intersects with the control signal C is Z, and the next signal is V.

The pulse output by the firing angle adjustment unit 2 at the time of both openings does not cause any change because the corresponding flip-flop in the pulse shaping circuit 3 is already in the set state. Only at the moment when C intersects the synchronization signal X does the firing signal of thyristor Z end and switch over to the firing signal of thyristor X.

In this case, even though the control signal C has already reached φmin, which corresponds to the maximum forward conversion output, at the beginning of the start-up of the converter AP, the output voltage of the converter AP is vertical in Fig. 6d. Negative voltage P as shown by the line.

The voltage waveform rises slowly from .

Therefore, the output voltage P at the time when the pulse-off is released.

is the maximum voltage Pma that converter AP can output at that time
x# You can see that this is not the case.

This invention was made in view of the above, and its purpose is to
An object of the present invention is to provide a control method for supplying a gate pulse so that the output voltage of the converter can be outputted to the full capacity of the converter when the polarity of the load current is changed.

The above object, according to the present invention, is based on a plurality of unit converters including a three-phase bridge type thyristor self-exciting converter connected to a three-phase AC power supply and controlled at a phase angle leading to the power supply voltage. Either a common phase angle control unit is provided for the self-excited converters attached to each of the two polarities of the load current, or the self-excited converter itself is also shared for both polarities of the load current. The arc angle adjustment unit uses a 120° width pulse signal to convert the silisk firing signal into a 120° width pulse signal. After that, when the load current starts to flow with a new polarity, among the unit converters that should start operating at this time, self-excited converters are This is accomplished by providing additional firing pulses to the si-risks which are in a 120° phase relationship.

In other words, as mentioned above, the sirisk driven by the regular ignition pulse when the pulse off is released cannot necessarily cause the converter to output the maximum voltage, but the self-excited converter is driven by 1 in the leading phase. , and its output characteristics, we focused on the fact that the maximum output voltage can always be obtained by driving the sirisk of the phase leading by at least 120° by 1. It is strained to provide pulses.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 7 is a schematic configuration diagram showing an embodiment of the present invention, FIG. 8 is an explanatory diagram for explaining the operation of FIG. 7, and FIG.
FIG. 7 is a timing waveform diagram for explaining the operation of FIG. 7; FIG.

What is shown in FIG. 7 is an execution determination circuit 71. Monostable multi 72, AND circuit 73, 9 and OR circuit 10, 74
The present invention is different from the conventional example shown in FIG. 4 in that the present invention is provided with the following, and this point will be mainly explained below.

Current regulator 1, polarity switching circuit 6, firing angle adjustment unit 2
and a pulse shaping circuit 3 (the regular firing signal created in detail is outputted via an OR circuit 10 and an AND circuit 51 or 52, while an additional firing pulse signal is outputted via an AND circuit 9). It is configured as follows.

In this case, regarding the additional firing pulse signal, the AND circuit belonging to thyristor U receives the firing signal for firing thyristor ■, and the AND circuit belonging to thyristor Xl receives the firing signal for firing thyristor Y. The ignition signals are given for
, y, and zc (thus, the ignition signal is given to the AND circuits to which they belong).

From the AND circuit side, this relationship is the next phase, that is, 1
From the perspective of the pulse shaping circuit 3 that supplies the ignition signal, the ignition signal for the sirisk in the phase with a 20° lag is also configured to be given to the sirisk in the 120° advanced phase relationship. It's true that I'm there.

On the other hand, an AND circuit 73 is connected to the other input side of the AND circuit 9.
are connected to the input terminals of the AND circuit 73, and execution determination circuits 71 . A monostable multi 72 is connected.

The execution determination circuit 71 detects, for example, that the output frequency has exceeded a predetermined value and sends an AND circuit 73 (this signal). OR circuit 74
It operates for a certain period of time tm (see FIG. 9a) and provides a signal to the AND circuit 73.

Therefore, from the relationship between the control signal and the synchronization signal, when a gate pulse is given to drive Cyrisks ■ and 2, an execution command is given from the execution determination circuit 71, and a switching command is received from the current switching command circuit 4. When the AND circuit 9 belonging to the thyristors ① and Z (5) is opened, the AND circuit 9 belonging to the thyristors U and YftC, which are 120°el ahead of the thyristors 5, is also opened, and therefore the thyristor , V, Y, and Z are driven by 1 at the same time.

This point will be further explained with reference to FIGS. 8 and 9.

The conditions shown in Fig. 9 are the power supply voltage, control signal, synchronization signal, pulse-off release time, etc.
The relationship between the power supply voltage shown in FIG. 6a and the control signal and synchronization signal shown in FIG. 6A is exactly the same as the case shown in FIG.

As is clear from FIG. 9, the pulse-off release time point t.

The cyrisks that should be driven by 1 due to the odor should be ■ and 2, but in this invention, the cyrisks U and Yl, which are in a 120° advance phase relationship with the cyrisks V and Z, are
(A gate pulse is also given to m to drive it.

This relationship is shown in FIG. 9a, where it is drawn out and hatched to emphasize that it is provided additionally.

On the other hand, FIG. 8 is for explaining this relationship from a different perspective, and shows the phase (circled) that should operate at the time to.

), the above-mentioned additional pulse is applied to the phase leading by 1200 el, which is indicated by the arrow.

In this way, when the pulse off is released, for the cyrisk in the normal phase order that should be driven, one step is higher than the normal phase.
20°e1. By simultaneously operating the SIRISK in the leading phase, it is possible to obtain an output voltage having characteristics as shown by the vertical line in FIG. 9C.

If you apply Q like this, no matter what time you switch,
The maximum output voltage at that point in time is always available from the converter.

In the above explanation, as shown in Figs. 1 and 2, we have described the case where separate self-exciting converters are provided for the positive and negative polarities of the load current, but as shown in Fig. 3, For self-excited converters with both positive and negative polarities (on the other hand, in the embodiment ζ of FIG. 7, one of the AND gates (for example, 52) is omitted and the current switching command circuit 4 It is only necessary to change the signal led to this by OR-combining it with the other signal of 5 to give the 1-5H signal.

In addition, when this invention is applied, if the output frequency is low, it may become a problem, so the execution determination circuit is of a frequency discrimination type that operates at a frequency higher than the frequency. It may also be made to operate depending on the conditions.

As described above (according to this invention, a common firing angle adjustment/pulse shaping unit is used for at least two self-excited converters connected in antiparallel, or the self-excited converters themselves are In a cycloconverter that can be shared to supply a variable polarity load current to the load, when the polarity of the load current changes, not only the predetermined cycle risk that is actually driven at that time, but also the 1200el
With a simple configuration that only supplies a gate pulse even to a cyrisk driven in a leading phase, it is possible to easily obtain the maximum output voltage that can be output from the converter at that time when the polarity of the load current changes. .

[Brief explanation of drawings]

1 to 3 are schematic configuration diagrams showing an example of a conventional cycloconverter configured with self-excited and separately excited cycloconverters, and FIG. 4 is a block diagram showing a conventional gate pulse supply method. 5 is a circuit diagram showing a schematic configuration of a unit converter, FIG. 6 is a timing diagram for explaining the operation of FIG. 4, FIG. 7 is a block diagram showing an embodiment of the present invention, and FIG. 9 is an explanatory diagram for explaining the operation of FIG. 7, and FIG. 9 is a timing waveform diagram for explaining the operation of FIG. 7. Code explanation, U-Z... Cyrisk, 1...
...Current regulator, 2...Ignition angle adjustment unit,
3...Pulse shaping circuit, 4...Current switching command circuit, 51,52゜73.9...AND circuit, 6...Polarity switch, 71... Execution determination circuit, 72... Monostable multi, 10.7
4...OR circuit.

Claims (1)

[Claims] It consists of a plurality of unit converters including a 3-phase bridge type thyristor self-exciting converter connected to a 13-phase AC power supply and controlled at a leading phase angle with respect to the power supply voltage (with respect to the power supply voltage), each of the polarities of the load current ( Either the attached self-exciting converter is equipped with a common phase angle control unit, or the self-exciting converter itself also has load current polarity (this is shared, and its firing angle adjustment unit has a cyrisk ignition control unit). In a cycloconverter σ that is equipped with a group of flip-flops that shapes the signal into a pulse signal with a width of 1200, when switching the polarity of the load current, the new polarity (
When starting to flow the iron load current, among the unit converters that should start operating at this time, the self-excited converter O should be used at the initial stage of operation. Cyrisk (
1. A method for controlling a cycloconverter, characterized in that the cycloconverter is also energized to provide an additional ignition pulse.