JPS5857005B2 - integrated circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrated circuit device that improves usability by reducing the number of externally supplied power supplies.

Conventional integrated circuit devices are generally referred to as monolithic integrated circuits, in which a plurality of circuit elements are formed on one semiconductor substrate to achieve desired circuit operations by supplying external power.

In this type of integrated circuit, when an improvement in operating speed or an increase in output signal amplitude is required, it is necessary to combine multiple power sources such as a high voltage source, a low voltage source, and a negative power source as external power sources.

For example, in MO8 type integrated circuits, in addition to the +5V power supply provided in normal logic devices, there is also a +12 to +15V high voltage source and -
A negative power supply of 2 to -8V is required from the external circuit.

However, it is not easy to add a power supply to the system configuration, and it becomes extremely difficult to use.

An object of the present invention is to provide an integrated circuit that requires a small number of external power supplies and has excellent operating characteristics.

Another object of the present invention is to provide an MO8 type integrated circuit that achieves high-speed operation with a single external power supply.

The integrated circuit device of the present invention has a functional circuit and an internal power generation circuit on a common semiconductor substrate.

That is, according to the present invention, in an integrated circuit in which a plurality of circuit elements that realize a predetermined circuit function by driving an external power source are provided on a common semiconductor substrate, the integrated circuit oscillates when the external power source is supplied to the inside of the integrated circuit. An integrated circuit is obtained that includes a self-excited oscillation circuit, a Kotscroft circuit that uses the output of the oscillation circuit as input and generates an output voltage of a potential different from the external power supply voltage, and a functional circuit that operates by supplying the output voltage. .

Further, according to the integrated circuit of the present invention, a novel Kotscroft circuit is provided, preferably by using an insulated gate type semiconductor device as the main circuit element.

Since the integrated circuit of the present invention can generate high voltages, negative voltages, etc. necessary for circuit operation inside the integrated circuit, the number of external power supplies can be reduced and usability can be improved.

Furthermore, although the number of external power supplies is reduced, it is possible to perform high-speed operation and large amplitude output similar to conventional multi-power supply type integrated circuits.

Next, in order to better understand the characteristics of the present invention, embodiments of the present invention will be described using figures.

FIG. 1 shows a block diagram of an embodiment of the invention.

This embodiment includes a self-oscillating circuit A, a Kotscroft circuit B, and a functional circuit C inside a chip that is a common semiconductor substrate of an integrated circuit.

Inside the chip, a single power supply vI)I)-GND, an input signal in, and an output signal out are transmitted and received from the outside.

That is, the input signal in is the output signal out of a predetermined circuit operation.
The integrated circuit is connected to the only +5V power supply.

Inside Chitsubu, self-excited oscillation circuit A operates with a single power supply, and a high frequency output f of 10 MHz is sent to Cotscroft circuit B.
supply to.

Kotsukucroft circuit B is powered by an externally supplied power supply vDD.
Functional circuit C generates DC high voltage output vGG and DC negative voltage output VSB of about +12V with -GND and high frequency output f.
to drive.

That is, the original functional circuit C within the chip operates using multiple power supplies.

The negative voltage output VSB is the body bias of a common semiconductor body within the chip and provides body bias to all insulated gate field effect transistors (MOS transistors) within this body simultaneously.

FIG. 2 shows a self-excited oscillation circuit according to an embodiment of the present invention.

In addition to this, a blocking oscillator or an unstable multivibrator may be used as a self-excited oscillator circuit, but here we use a ring oscillator with good output stability, and use an external +5V power supply VDD to generate a transistor. An oscillation effect is produced by the feedback of the odd-numbered inverters using Q1 to Q2n+3, and this is introduced into the output amplifiers BF1 and BF2.

Output amplifiers BF1 and BF2 have mutually complementary high frequency outputs φ.

produces φ.

FIG. 3 shows a Kotscroft circuit according to an embodiment of the present invention.

This circuit consists of a first Kotscroft circuit using capacitive elements C31 to C33 (!: MOS transistors Q3, to Q33), and a second circuit using capacitive elements C3,' to C3≦ and MOS transistors Q3,' to Q3g. Kotsukucroft circuit, capacitive elements C34, C35 and MOS) transistor Q
34 + Q35, the third Kotscroft circuit using the capacitive element C341C35 and the MOS transistor Qs
j + Qs4.

The gate electrodes of the MOS transistors of each Kotscroft circuit are connected to the low potential side with two terminals, and the rectifying diode operation is performed in any number of ways.

In addition, each capacitive element C31 to C35, C31 to C3 has 10
It has a capacitance of about pF.

Therefore, the first and second Kotscroft circuits operate as positive voltage booster circuits, and the third and fourth Kotscroft circuits operate as negative voltage booster circuits.

The input terminals A of the first and third Kotscroft circuits are connected to one output φ of the oscillation circuit shown in FIG. 2, and the reference terminal B is connected to GND.

Similarly, the input terminal A' of the second and fourth Kotscroft circuits
is driven by the other output φ of the oscillation circuit, and the reference terminal B/ is GN
Connect D.

The Kotscroft circuit in this figure uses other MOS transistors Qs6+ Q3j to improve efficiency and stabilize the output voltage.
+ Q37, Q3 child, Q38/Q3K.

Transistors Q3a and Q3; have their drains and gate electrodes connected to the power supply VDD, and their source electrodes are connected to the output sides of input capacitive elements C30 and C3' of the first and second Cockcroft circuits, respectively, to provide input to these capacitive elements. Increase charging efficiency.

Transistor Q371 Q37 has its drain and gate electrodes connected to the outputs of the first and second Cottcroft circuits, and its source electrode coupled to the common high voltage output VGG.

This output■. G has a wiring stray capacitance Co, and smoothes complementary outputs from each transistor.

In addition, the MOS transistor Q38 + Qas has its drain and gate electrodes connected to the negative voltage output VSH, and its source connected to the third
, is connected to the output of the fourth Cottcroft circuit to smooth it together with the stray capacitance C8B.

The Kotsukucroft circuit in this figure has each output VGG +VSH
The ripple rate is low and stable because both outputs are full-wave type.

FIG. 4 shows a power supply stabilizing circuit according to an embodiment of the present invention.
It is included in Kotscroft circuit B in FIG.

The circuit in this figure is the output VG of the Kotsukucroft circuit in Figure 3.
In order to apply a positive load to the voltage transformation of G l vs B, stacked MOS transistors Q4 and Qaa are connected in series, and their output is connected to GND by a transistor whose gate electrode is connected to the power supply VDD, and a MOS transistor Q48 drive the gate electrode.

The drain and source electrodes of transistor Q48 are each connected to the output VGG + GND.

When the potential of the output vGG increases, the transistor Q48 increases the channel conductance and becomes a heavy load on the output VGG, causing the potential to decrease.

A similar load circuit including MOS transistors Q49 to Q5□ is provided from GND to the output VSB side to prevent voltage fluctuations.

FIG. 5 is a partial sectional view of an embodiment of the present invention, showing the ring oscillator output amplifier BF1 and the input capacitive element C3□ of the Kotscroft circuit.

That is, each circuit element is formed on a common P-type semiconductor substrate SB, and generates an oscillation output φ using the only externally supplied power supply VDD-GND, which is transmitted to a capacitive element C31 on the same substrate.
The voltage is transmitted to one electrode, the silicon gate electrode G, and increases the potential of the N-type region of the other electrode introduced into the substrate at the end of the gate electrode.

No electrodes are introduced to the outside of the semiconductor substrate, and the internal potential V
Biased by SB.

According to the embodiment described above, high amplitude signal processing is performed in the functional circuit using the high voltage output VGG, and the junction capacitance of the MOS transistor in the functional circuit is reduced by the body bias, and gate threshold dependence on source potential rise is reduced. Because of this reduction in performance, a high-speed operating MO8 integrated circuit can be obtained despite the integrated circuit being driven by a single external power supply.

In addition, since the number of external power supplies is small, the usability is improved, and the device can be used in an extremely wide range of electronic devices.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a circuit diagram of a ring oscillator used in an embodiment of the invention, and Fig. 3 is a Kotscroft circuit diagram used in an embodiment of the invention. , FIG. 4 is a voltage stabilizing circuit diagram used in an embodiment of the present invention, and FIG. 5 is a partial sectional view of one embodiment of the present invention. In the figure, A is a self-excited oscillation circuit, B is a Kotscroft circuit, and C is
is a functional circuit.

Claims (1)

[Claims] 1. In an integrated circuit in which a plurality of circuit elements that realize a predetermined circuit function using an external power supply are provided on a common semiconductor, an oscillation circuit is provided inside the integrated circuit, and the oscillation output of the oscillation circuit is input and the external power supply voltage is connected to the integrated circuit. 1. An integrated circuit comprising: a circuit that generates positive and negative drive voltages of different potentials; and a multi-power supply type functional circuit that operates by supplying the positive and negative drive voltages.