JPS588007B2 - Coupling device between information processing devices - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an information processing coupling device that can effectively perform initial clear processing.

Conventional coupling devices between information processing devices immediately perform initial clear processing using hardware logic upon receiving a reset signal.

Therefore, all the data that has already been sent from one information processing device to the other information processing device is wasted, and synchronization also occurs, so that when data transfer is to be restarted, it is necessary to start over from the beginning.

The present invention eliminates the above-mentioned drawbacks, and aims to provide a coupling device between information processing devices that performs initial clearing so that data transfer between the information processing devices can be performed effectively. .

Therefore, the coupling device between information processing devices of the present invention is
In a coupling device that exists between a plurality of information processing devices and connects the information processing devices logically and physically, a microprogram-controlled processor detects a reset signal sent from the information processing device and transmits the reset signal to the processor. and a state storage means for storing the state of the route between the coupling device and the information processing device, and the processor is notified by the interrupt that the reset signal has been sent. When this happens, the system is configured to refer to the contents of the state storage means to determine whether to immediately reset the coupling device itself or to temporarily suspend it, and to perform a predetermined process based on the determination result. This is a characteristic feature.

FIG. 1 is a diagram showing an example of a system to which the present invention is applied;
FIG. 2 is a diagram showing another example of a system to which the present invention is applied;
3 is a block diagram of one embodiment of the coupling device of the present invention, and FIGS. 4 and 5 are diagrams for explaining an example of the operation of the coupling device.

In Figure 1, A is the central processing unit on the mask side, B is the central processing unit on the slave side, C is the coupling device, a is the route between central processing unit A and coupling device C, and b is the coupling with central processing unit B. Routes between devices C and D indicate bus controllers, respectively.

In FIG. 1, normal data transfer is performed as follows.

First, central processing unit B writes the start address of data to be transferred, the number of transfer bytes, and a valid flag to coupling device C.

There are two types of valid flags: read and write.

For example, reading by central processing unit A is performed on the condition that the validity flag indicating validity of reading is turned on.

Coupling device C reads data from the memory (not shown) of central processing unit B using DMA (direct memory access function) and transfers it to central processing unit A.

When the number of transferred bytes becomes zero, the coupling device C issues an interrupt to the central processing unit B.

When central processing unit B receives an interrupt, it checks whether there is any more data to be transferred, and if so, it sets the start address of the transferred data and the number of bytes to be transferred in coupling device C, and confirms that the data to be transferred is If not, the coupling device C is notified of this fact.

When the start address and the number of transferred bytes are set in the coupling device C, the data transfer as described above is performed.

When you receive a notification that there is no data to transfer,
Coupling device C notifies central processing unit A of channel end CE and device end DE, and initializes route α.

Similarly, interface b is also initially cleared.

Although the above description relates to data transfer from the central processing unit B side to the central processing unit A, data transfer in the opposite direction is performed in substantially the same manner.

Central processing unit A can write programs to central processing unit B, and can still read the contents of central processing unit B's memory.

When central processing unit A writes a program to central processing unit B, central processing unit A writes WR i TE i PL
The command and control information are sent to the coupling device C.

This control information indicates the start address of the area where the program is stored and the transfer byte length.
After sending the RiTE iPL command, the central processing unit A transfers the WRiTE command and program to the coupling device C.

The coupling device C stores the sent program into the memory of the central processing unit B using DMA.

A memory dump of central processing unit B is also performed in a similar sequence.

When the connection between central processing unit A and central processing unit B is not in operation in the connection shown in FIG. Initialize route a or route b.

This is the same as the conventional initial clear processing.

In FIG. 1, when central processing unit A and central processing unit B are in operation, when a reset signal from central processing unit A is detected, coupling device C performs initial clear processing until route b reaches a steady state. is suspended, and after reaching a steady state, route a is initialized and central processing unit B is notified.

For example, in the case of normal data transfer, the transfer byte length becomes zero, coupling device C issues an interrupt to central processing unit B, and while central processing unit B is processing the interrupt, central processing unit A When the reset signal (for example, selective reset signal) is raised, the coupling device C suspends the initial clear processing until the interrupt processing is completed.

The above selective reset signal is sent, for example, when an error is detected.

When the above-mentioned interrupt processing is completed, the route a is initial cleared and the central processing unit B is notified that the reset signal has been sent.

Then, the internal state of the coupling device C itself is also cleared.

In the connection shown in Figure 1, when a reset signal (operational out signal) from central processing unit B is detected when central processing unit A and central processing unit B are in operation, coupling device C switches route a to the steady state. Initial until
After the clearing process is suspended and the steady state is reached, route b is initialized and central processing unit A is notified that a reset signal has been sent.

The reset signal (operational out signal) from central processing unit B is generated, for example, when the clear key on the panel is operated or when a clear signal is sent on the remote control interface. be.

Then, the internal state of the coupling device C itself is also cleared.

Figure 2 shows a multiple computer system in which a plurality of central processing units are connected to one central processing unit, where A1 to A4 are central processing units on the master side, and C1 to C4 are coupling devices. , a to a indicate the routes between the master side central processing unit and the coupling device, and b1 to b4 indicate the routes between the coupling device and the central processing unit B, respectively.

Each of the central processing units A1 to A4 can independently transfer data to and from the central processing unit B.

When normal data transfer is being performed between central processing unit A1 and central processing unit B using the connection shown in FIG. 2, when central processing unit A2 sends a WRiTE iPL command,
The coupling device C2 outputs a reset signal (operational out), and the above reset signal (operational out) is output to the coupling device CI.
Operational out signal) is input.

The coupling device C1 suspends initial clearing until the routes a and b are in a steady state, and then notifies the central processing unit A1 of the abnormal termination and clears the route a and b.
1 and root b1.

FIG. 3 shows details of the dotted line part in FIG.
1-A and 1-B are bus controllers, 2-A and 2-
B is a reset detection circuit, 3 is a microprocessor for microprogram control, 4 is a control circuit, 5-A and 5-B
indicate state memory circuits, respectively.

Note that the coupling devices C, CI to C4 all have the same configuration.

The state of the route al is stored in the state storage circuit 5-A, and the state of the route b1 is stored in the state storage circuit 5-H.

The status storage circuit 5-A stores, for example, information such as idle, before starting status is sent, during data transfer, or before ending status is sent.

Assuming that central processing unit B outputs a reset signal, this reset signal is input to reset signal detection circuit 2-B via route b1 and bus controller 1-B.

Reset detection circuit B requests an interrupt to microprocessor 3.

When the microprocessor 30 microprogram detects an initial clear interrupt, it stores the state memory circuit 5-
It is determined whether or not to suspend initial clearing by referring to the contents of A and 5-B.

Thereafter, at the timing determined by the above decision,
The control circuit 4 sends necessary signals to the central processing units AI and B to complete the initial clearing.

4 and 5 are diagrams for explaining the operation of the coupling device when a reset signal (operational out signal) is sent from central processing unit B, and FIG.
TE, PL/DUMP, and FIG. 5 show normal conditions.

In FIGS. 4 and 5, "CA mode" means the mode of the coupling device.

"UC" is the unit check. "CE" is the channel.
"DE" means device end, "iNT" means interrupt, and "AcT" means logically/physically connected between the central processing unit on the mask side and the coupling device.

In the figure, "idle" means that the mask side central processing unit A and the coupling device C are not logically/physically connected, and that the coupling device C and the central processing unit B are not logically/physically connected. It means it is not connected.

Referring to FIG. 4, when a reset signal is sent from the central processing unit B during idle time, the coupling device C waits for the next selection and responds with a startup status.

In this case, the status sent is UC.

Regarding the case of WRiTE and iPL. To explain the above operation in more detail, when performing WRiTE and iPL, first a WRiTEiPL command is sent, and then control information such as a memory address and transfer byte length is sent.

Then, the WRiTE command and program are sent.

There is an idle state between the WRiTE, iPL sequence and the WRiTE sequence, and when a reset signal is sent from central processing unit B during this period, coupling device C sends a status UC to central processing unit A side. and not-initializes the internal state.

Not-initialization can be thought of as a state in which the above control information is cleared.

Data transfer between the central processing unit and the coupling device is performed in the following procedure.

Central processing unit A sends a command to coupling device C, and coupling device C transfers the startup status.

If the startup status is all "0", data is transferred.

If the data transfer is completed normally, the coupling device C returns completion statuses CE and DE.

If a reset signal is sent from the central processing unit B before sending the startup status, the coupling device C will change the startup status U.
C is returned and the knot initialization process is performed.

Note that when the central processing unit A side receives the status UC, it issues a sense command and reads the CA mode.

When a reset signal is sent from the central processing unit B during data transfer, the coupling device C waits for the transfer of a predetermined number of bytes of data to be completed, and after the data transfer is completed, the coupling device C sends the termination status CE, DE, UC to the central processing unit. It is sent to the processing device A side and performs knot/initialization processing.

The predetermined number of bytes mentioned above is, for example, 8 bytes in the case of control information transfer, and the number of bytes specified by the control information in the case of program transfer.

If a reset signal is sent from central processing unit B before sending the termination status, the coupling device sends termination status CE+DE+UC to central processing unit A, and
Performs initialization processing.

Referring to FIG. 5, when idle, even if a reset signal is sent from the central processing unit B side, the coupling device does not send out any status.

A reset signal is sent to central processing unit B before sending the startup status.
When the connection device C receives the activation status UC
is sent to the central processing unit A, the transfer control information, etc. are cleared, and the state becomes a not-initialized state.

When central processing unit A reads channel control word CW and is transmitting data, when a reset signal is sent,
Coupling device C immediately sets termination status CE, DE, UC.
is transferred to central processing unit A, and enters a not-initialized state.

In the case of iNT*AcT, the reset signal causes the central processing unit C to reset the interrupt flag.

Note that the iNT-*ACT state occurs, for example, in the following cases.

When central processing unit B sets the memory address and transfer byte length in coupling device C prior to data transfer, central processing unit B requests coupling device C to issue an interrupt request. do.

When the coupling device C issues an interrupt request, the central processing unit B enters the interrupt state and sets the memory address and transfer byte length in the coupling device C.

When the content of the byte counter becomes zero and coupling device C issues an interrupt request to central processing unit B, that is, in the case of iNT-ACT, a reset signal is sent from central processing unit B. , the coupling device C resets the interrupt flag and sets the termination status CE+DE+UC.
is transferred to central processing unit A, and enters a not-initialized state.

It goes without saying that the coupling devices C1 to C4 in FIG. 2 operate in the same manner.

As is clear from the above description, the coupling device between information processing devices of the present invention can (a) effectively transfer data between information processing devices.

(b) Since the operating status between the information processing devices is stored and the initial clearing process is executed by a microprogram, processing for reset signals asynchronously generated from the information processing devices can be performed smoothly and dynamically.

(c) Since initial clearing is performed using a microprogram, the hardware configuration is simplified and upgrades are facilitated.

It has remarkable effects such as

[Brief explanation of the drawing]

FIG. 1 is a diagram showing one example of a system configuration to which the present invention is applied, FIG. 2 is a diagram showing another example of a system configuration to which the present invention is applied, and FIG. 3 is an embodiment of the coupling device of the present invention. The example block diagrams of FIGS. 4 and 5 are diagrams illustrating one example of the operation of the coupling device. A and A1 to A4...Central processing unit on the master side, B...Central processing unit on the slave side, C and C
1 to C4...Coupling device, a and a1 to a4...Route, b and b1 to b4...Route, D...Bus controller, 1-A and 1 −
B...Bus controller, 2-A and 2-B...
... Reset detection circuit, 3 ... Microprocessor under microprogram control, C ... Control circuit, 5-A and 5-B ... State storage circuit.

Claims (1)

[Claims] 1 In a coupling device that exists between a plurality of information processing devices and connects the information processing devices logically and physically, a microprogram-controlled processor and a reset signal sent from the information processing device are detected and transmitted as described above. The processor has reset detection means for notifying the processor by an interrupt, and state storage means for storing the state of the route between the coupling device and the information processing device, and the processor notifies the transmission of the reset signal by the interrupt. When the coupling device is reset, the device is configured to refer to the contents of the state storage means to determine whether to immediately reset the coupling device itself or to temporarily suspend the reset, and to perform predetermined processing based on the determination result. A coupling device between information processing devices, characterized by: