JPS5912210B2 - Tuned frequency automatic control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic tuning frequency control device for a tuner, and more particularly to an automatic tuning frequency control device for a tuner capable of preset tuning and automatic search tuning.

Examples of tuners that use an electronic tuning method include preset tuners that allow preset tuning, and automatic search tuners.

The former has a memory that digitally stores frequency information corresponding to the receiving station in advance, reads specified information from the memory by pressing a preset channel selection button, sets it in a reversible counter, and converts the counted contents of the counter into a D/A (digital After converting to an analog voltage using an analog converter, the actance of the tuning element of the tuning circuit is controlled by this analog voltage to perform preset tuning.

In addition, in a tuner equipped with an auto search tuning function, a constant frequency tarokku pulse generator is installed, and the operation of the reversible counter described above is counted up and down by up and down commands, and the analog voltage based on the counter output is set as the tuning voltage. It is said that

Since such electronic tuners have a so-called open-loop configuration, which is different from a closed-loop configuration such as a PLL (phase-locked loop) synthesizer tuner system, compensation for temperature changes and changes over time is not sufficient.

Examples of conventional compensation methods include detecting deviations in the receiving frequency and controlling the local oscillation frequency, and applying temperature compensation to the power supply circuit of the digital control section for frequency synthesizers to reduce fluctuations in the tuning voltage. We are trying to suppress this as much as possible.

However, this method requires highly accurate parts and has drawbacks such as variations from device to device.

SUMMARY OF THE INVENTION An object of the present invention is to provide a reliable automatic frequency control (AFC) device that eliminates the above-mentioned drawbacks.

The tuner AFC device of the present invention uses, for example, the S-curve output of the detection circuit to detect an out-of-tune state, and also detects deviations in both vertical directions, and controls the counting operation of a reversible counter in response to deviations in each direction. AF generates up and down counting command signals and sends predetermined clock pulses to the reversible counter during the generation period of these counting command signals.
In addition to the C operation, the number of clock pulses generated during the generation period of the counting command signal is counted by another counter, and a control signal is generated when a predetermined value is reached. The present invention is characterized in that the clock pulse is controlled to be sent to the reversible counter only until the time when this control signal is generated, thereby preventing the AFC operation from being drawn into an adjacent station.

Hereinafter, the present invention will be explained using the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and shows an example in which the present invention is applied to an auto-search type voltage synthesizer tuner.

1 indicates an input latch circuit, which includes an up command switch s1,
Down command switch S2 and stop command switch s3
The alternative pressing operation is latched and a corresponding command control signal is sent to the control logic circuit 2.

The control logic circuit 2 is composed of a plurality of logic gates, and controls the sending of counting clock pulses CK to the reversible counter 3 and the presettable reversible counter 4, the sending of up/down command signals for the reversible counter 4, etc. be.

The clock pulse CK is generated by the clock pulse generator 5, inputted to the control logic circuit 2, becomes the counting input of the reversible counter 3 via the AND gate 6, and is also directly sent from the control logic circuit 2 to the counting input of the presettable counter 4. is also applied.

The count output of the reversible counter 3 is applied to a D/A converter 8 via a pulse synthesizer 7 and output as a tuning voltage.

The presettable reversible counter 4 is connected to the preset input terminal A by the preset command signal F from the input latch circuit 1.
A preset is loaded in accordance with the state of rN-DIN, and when the number of clock pulses to the tarock manual input CK reaches the preset value, the output terminals AOUT to DOUT are all set to a low level.

A NOR gate 9 is provided to output this output AOUT-DOUT by four people, and a D-FF 10 is set so that all the outputs AOUT-DOUT are at a low level.
is now closed.

Further, an amplifier 11 is provided in which an output according to the so-called S curve characteristic of an FM detection circuit (not shown) is applied between input terminals, and this amplifier 11 is connected to an operational amplifier OP1,
It consists of resistors R1 to R6 and capacitors C1 and C2, and generates an amplified output A having a DC level depending on the detuning state.

This DC output A is input to the next stage window comparator 12, but this comparator 12 is connected to the operational amplifier OP.
The divider outputs v1 and v2 (vl>v2) of the voltage divider resistors R7 to R9 are used as upper and lower reference voltages of the comparator.

Therefore, if the detuning state deviates significantly in the positive direction, the amplifier OP
When the output B of the amplifier oP3 changes to a low level, and conversely, the output B of the amplifier oP3 changes to a low level.

The output B of the amplifier oP2 directly serves as an up/down command signal for the presettable counter 4, and is also input to the control logic circuit 2 and serves as an up/down command signal for the reversible counter 3.

In addition, these comparison outputs B and C are two human-powered AND gates 13.
0 input and the output of this gate 13 is the other ANDN-
The gate has a power of 140.

Further, when detuning, a muting signal is generated to remove unpleasant noise during detuning and tuning, and this muting signal is passed through an operational amplifier op4.

After inversion and amplification by an amplifier 15 consisting of resistors R16+R17 and an inverter 1, the AND gate 14 is operated independently.

The output E of the gate 14 is used as a so-called stop signal indicating that synchronization has been achieved, and is applied to the control logic circuit 2 to stop sending out the clock signal CK.

The operation of FIG. 1 will be explained with reference to the waveform diagram of FIG. 2.

In both figures, the same reference numerals indicate waveforms of equivalent parts.

Since the output A of the amplifier 11 is a so-called S-curve whose DC level varies depending on the degree of detuning, by appropriately setting the reference voltages v1 and v2 of the window comparator 12, the comparator outputs B and C are as shown in FIG. As shown in B and C, output B indicates a shift in the positive direction and output C indicates a shift in the negative direction.

In addition, the inverted signal of the muting signal is at a low level when not in tune and in an extremely large detuned state where both outputs B and C are low and there is no bell, and is at a high level otherwise, so the output E of the gate 14 is at a high level. The level is high only when the straight line portion of the S curve A is in the range of vl and V2, and the other levels are low.

Therefore, it can be seen that this output E can be used as a stop signal indicating tuning.

When the automatic search is performed and the tuning is established and the stop signal E is generated, the transmission of the clock signal CK to the counter 3 is stopped, the search is stopped, and the automatic channel selection is completed.

If detuning subsequently occurs due to some factor, the comparator outputs B and C change depending on the degree and direction of the detuning.

For example, if there is a shift in the positive direction, the comparator output B becomes a low level, so if a down-count command is issued using this low-level output, the reversible counter 3 can perform a down-count operation.

At this time, since the stop signal E is naturally at a low level, the tarlock signal CK is sent from the control logic circuit 2 via the AND gate 6, and the reversible counter starts counting down.

Therefore, since the S-curve output A gradually decreases toward the tuning point, when it falls below the level v1, the stop signal E is generated and the transmission of the tarok pulse CK is stopped.
This means that you are in sync.

At this time, if an adjacent station with a strong electric field is extremely close, there is a possibility that the station will be drawn into the adjacent station, so in order to prevent this, the preset value of the presettable counter 4 is set to (1, 0, 0, 0, etc.). ), the clock signal CK from the control logic circuit 2 is counted, and in the above example, the clock signal CK is counted down, and when the count reaches (0, 0, 0° 0), the output of the NOR gate 9 is The level becomes high, setting the flip-flop 10 and thereby closing the AND gate 6.

Therefore, the clock input to the reversible counter 3 is stopped, and regardless of tuning or detuning, the AFC operation is stopped and pull-in to an adjacent station can be prevented.

The presettable counter 4 is preset by a command F from the input latch circuit 1 during the search operation, and the flip-flop 10 is also reset.

At this time, the content of the input terminal AIM DIN of the counter 4 is preset loaded and is 8'' in this example, but it is of course possible to set it arbitrarily.

When the stop signal E is generated, the preset command signal F disappears.

If the detuning is in the negative direction, the comparator output B is at a high level and the stop signal E is at a low level, but an up command signal is output from the control logic circuit 2, and the reversible counter 3 starts counting up, and the S curve The output will rise towards the tuning point.

At the same time, the presettable counter 4 also counts up, and when the count reaches "8", the flip-flop 1
By setting the flag to 0, the gate 6 is closed and the AFC operation is forcibly stopped, thereby making it possible to prevent draw-in to an adjacent station.

According to the present invention, since AFC is possible digitally, it is not necessary to provide a temperature compensation circuit or the like with high precision, and it is easy to integrate the circuit.

Furthermore, since the operating range of the AFC can be arbitrarily set by presetting the presettable counter, there is no possibility of being erroneously drawn into an adjacent station with a strong electric field.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a waveform diagram illustrating the operation of the circuit of FIG. 1. Explanation of the symbols of the main parts, 2... Control logic circuit, Total... Reversible counter, 4... Presettable counter, 5... Clock pulse generation! , 6,13゜1
4...And gate, 12...Window comparator.

Claims (1)

[Claims] 1. An automatic tuning frequency control device for a tuner that has a reversible counter that can freely count up and down, and controls the tuning frequency of a tuning circuit according to the count contents of this reversible counter, and detects in which direction the tuning is out of tune. counting command signal generating means for generating up and down counting command signals for controlling the counting operation of the reversible counter in response to the out-of-tune state; means for counting the number of occurrences and generating a control signal when a predetermined value is reached; and a clock for sending the clock pulse to the reversible counter from the time when the up and down counting command signal is generated until the time when the control signal is generated. A tuned frequency automatic control device including pulse sending means.