JPS5914798B2 - coin inspection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is directed to a coin testing device that utilizes a programmable memory that is simple and relatively inexpensive to implement.

In the device according to the invention a signal is generated which is a function of the characteristics of the coin under test.

The value of the signal (eg, voltage, current, frequency, phase or time period) is compared to the acceptable value of the true coin stored in the programmable memory. If the value of the signal is within a certain range relative to the predetermined value of a true coin of acceptable denomination, an output signal is generated indicating that the tested coin has passed the test. The output signal may also indicate the denomination of the coin determined by the test. The present invention is characterized by what kind of coin test signal data is written into the program memory.

First, a connection is made such that the memory can record signal values indicative of the characteristics of the coin under test. A coin (or a specially manufactured coin replica) that produces a standard signal value for the test being performed is then placed into the coin testing device, which generates and records the coin signal value. 30 Thus, with several denominations of such standard coins, the memory is loaded with standard values for each of the coin denominations to be tested on the coin testing device.

The memory is then connected to allow a 75 comparison of the value stored in the loaded memory and the value generated by testing the coin. As a result, even if each coin testing device has different operating characteristics, the optimum standard value for each coin testing device is recorded in the memory, and highly accurate test results can be expected. In this way, there are other ways to write optimal standard values into individual memories of the coin testing device. For example, a ROM (read-only memory) board that already stores values corresponding to the signal values generated when a standard coin or coin replica is inserted into the coin testing device is selected from among several ROM boards. choose,
The ROM board may be attached to a coin testing device.
Even in that case, the data stored in memory (
The standard value) was selected as the one most suitable for the operating characteristics of the coin testing device. Hereinafter, the present invention will be described with reference to the drawings and some embodiments.

DESCRIPTION OF THE EMBODIMENTS An apparatus 1 according to an embodiment of the invention illustrated in FIG.
0 includes a sensor 20 adjacent the coin passageway 30, a coin test circuit 40 associated with the sensor 20, a programmable memory 50, and a comparator 60.

The device 10 further comprises means making it possible to compare the values stored in the memory 50 and the values obtained by the sensor;
The value of the signal from the coin test circuit 40 when the switching means 80 including the test control circuit 70, the switching means 80, and the memory load control means 90 is activated is determined by the comparator 60.
While passing through, the signal from coin test circuit 40 is compared to the value stored in memory 50. In this case, switching means 80 controls the flow of the signal from sensor 20 to the comparator. Alternatively, the switching means may be placed between the memory 50 and the comparator, or at both inputs of the comparator 60. Switching means 80 is controlled by test control circuit 70 to ensure that the comparison is made at the appropriate time. Control circuit 70 receives direct signals from sensor 20, coin test circuit 40
or from a separate coin presence/absence sensor (not shown). To load memory 50 in accordance with the present invention, load switch means 90 transfers a signal value from sensor 20 or test circuit 40 to memory 50 when the load switch means is energized, for example by a signal on input lead 92. I have to.

Device 10 can be constructed with all-digital circuitry or a combination of digital and analog circuitry.

In this embodiment, the configuration is mainly digital, and the sensor 2
The analog signal output from 0 is converted into a digital signal by the coin testing device 40. Switching means 80 and 90 are constituted by AND gates, etc., and comparator 60 is a digital comparator such as that employed in peak extraction circuit 301, which will be described later. If analog circuitry is used with digital memory, the output of memory 50 is converted to an analog signal by a converter, for example part of comparator 60. In this case comparator 60 is a conventional analog comparison circuit. The load switch means 90 or comparator 60 may then include an analog-to-digital converter. Device 210 of FIG. 2 uses some of the same circuitry as device 10 of FIG.

Coin sensor 220, coin passageway 230, coin test circuit 240, memory 250, and comparator 260 perform the same basic functions as their counterparts in device 10 of FIG. Second
In the illustrated apparatus 210, a peak extraction circuit 275 is used to select the values stored in memory 250.
When memory 250 is loaded, load switching means 290 is energized by a signal on lead 292 so that the value of the output of peak extraction circuit 275 can be loaded into memory 250. When testing a coin, the output of peak extraction circuit 275 is provided to comparator 260 and stored in memory 250.
is compared with the contents of

If the output of peak extraction circuit 275 produces a value between the limits stored in memory 259 for a true coin of an allowed denomination, comparator 260 has been tested as a coin of that denomination. Generates a signal indicating provisional determination of the coin. Alternatively, a memory device including a maximum value identification system such as that shown in FIG. 5 may be used during coin testing, and something like peak extraction circuit 275 would not then be required. As in the case of device 10 of FIG.
10 may be implemented by substantially all digital circuitry or by a combination of analog and digital circuitry.

A digital peak extraction circuit 301 is shown in FIG.

The main components are a pulse generator 310 and a pulse counter 32.
means for counting the number of pulses during a period of time consisting of zero;
a register 340 storing the number of the highest previous count;
A comparator 350 that compares the counted value with the number stored in the register 340, and the counter 320 to the register 340.
means 360 for transferring numerical values to. The output of variable frequency generator 370 is applied to one of the inputs of AND gate 312.

The frequency of the generator 3r0 is determined by its interaction with the magnetic field of the associated sensor coil and the coin to be tested. For example, variable frequency generator 370 is an oscillator connected to a coin sensor coil located along the coin track. When the coin approaches the sensor coil, the inductance of that coil changes. Therefore, the oscillation frequency of the oscillator changes depending on whether the coin is close to the sensor coil or not. The characteristics of the coin are detected by examining the degree of change in this oscillation frequency. The other input of gate 312 is connected to the output of a pulse generator 310, which pulse generator 310 is connected to the output of a pulse generator 310 for a certain precise time period T as shown in FIG. An output signal such as waveform 410 having a time of t1 is generated. This time period T. -tl is repeated in waveform 410. The function of gate 312 is that the output pulses from variable frequency generator 370 are output for a time period T. -t1 is caused to flow to the trigger input 322 of the counter 320 for, for example, 1 millisecond. Time period T. - At time t1, at the end of t1, a change in the state of the output of the pulse generator 310 is detected by the variable frequency generator 3.
70 to the counter 320 via the AND gate 312
Cut off the flow of pulses to. But the next time period T, -T
During 2, the output of pulse generator 310 is connected to AND gate 3
92 is opened to allow three pulses from clock generator 390 to flow to pulse distributor 330. Pulse distributor 330 directs a first pulse onto lead 331, a second pulse onto lead 332, and a third pulse onto lead 333. Waveform 431 shown in FIG.
432 and 433 are signal waveforms generated on leads 331, 332, and 333.

Comparator 350 compares the count value in counter 320 and the value stored in register 340.

Register 340 may have been loaded with a value using the procedure described below, or may have been reset to zero (or some initial value) after completion of a previous coin test. If the count value in the counter 320 is at time T, the register 34
If greater than a number within 0, the output of comparator 350 produces a signal on lead 352. ° When the first pulse 431 on lead 331 and the signal from comparator 350 on lead 352 are simultaneously applied to AND gate 354,
The output signal from gate 354 is output from flip-flop 356.
Set.

If the count of counter 320 is less than the value stored in register 340, there will be no signal from comparator 350 on lead 352 and flip-flop 356 will not be set. When a second pulse 432 on lead 322 is applied to each of AND gate groups 360 simultaneously with the signal from the Q output of flip-flop 356 being set, the count in counter 320 is transferred to register 340 and The counted value is stored instead of the numerical value stored there.

If the count value of counter 320 is less than the value in register 340 and flip-flop white 356 is not set when second pulse 432 occurs, AND gate group 360 is not opened and the count value in counter 320 is will not be transferred to register 340 and the value previously stored in register 340 will remain unchanged. When a third pulse 433 occurs on lead 333, it resets counter 320 and flip-flop 356 in preparation for the next counting cycle (test cycle) beginning at time T2.

That is, some predetermined time period T. - l coin test cycles are performed during T2. This test cycle is then repeated. A predetermined time period T in a test cycle. -T, the number of pulses from the variable frequency generator 370 is counted by the counter 320, and if the count value is greater than the value previously stored in the register 340, the value in the register 340 is updated with the count value. It is being updated. Therefore, if the pulse frequency from variable frequency generator 370 increases over time, the number in register 340 will be updated with a new count value every test cycle. If the pulse frequency then decreases, the value in register 340 is not updated and the previously stored value is maintained. From this, the frequency at which the pulse frequency of the variable frequency generator 370 is highest is determined as the time period T. - It is stored in the register 340 as the count value at t1. That is, the peak frequency of the variable frequency is extracted. As previously mentioned, the peak frequency of variable frequency generator 370 is dependent on the characteristics of the coin under test interacting with the magnetic field of the generator 370 coil. In FIG.
50 and stored therein, and when in comparison mode, is provided to comparator 260 for use in comparison with the value previously stored in memory 250. Another embodiment of the invention is shown in FIG. The device is designed for three denominations, eg, 5 cents, 10 cents, and 25 cents. 1st along coin track 531,
Second and third coin sensors 511, 512 and 51
4 is placed. These are coils wound around a magnetic core, which generate a magnetic field in the vicinity, and when a coin arrives in that magnetic field, they interact, and the arrival of the coin is detected by changing the inductance value of the coil. First and third coin sensor coils 511 and 514 connected to oscillator circuits 521 and 524 generate high frequency (HF) magnetic fields to check the dimensions of the coin. However, the first and third coils 511 and 514 have different structures, and the nature of their interaction with the coin is different. Oscillation circuit 5
A second coin sensor coil 512 connected to 22 generates a low frequency (LF) magnetic field to examine the material of the coin. All the coins inserted into the coin hopper 520 roll on the coin track 531 and pass through the three coin sensors 5.
It passes near 11, 512 and 514.

Each coin is deemed authentic if it satisfies predetermined test criteria in each of these three test circuits. In normal operation, the coin is in the magnetic field of coin sensor coil 511 for about 65 milliseconds and in the magnetic field of coin sensor coil 514 for about 40 milliseconds. During these time periods, the coin, by interaction with the magnetic field, shifts the oscillation frequency of the oscillator associated with coils 511 and 514 from its nominal idling frequency to a frequency dependent on the characteristics of the coils. The frequency used to determine the coin's authenticity is generated by an oscillator 52 when the coin passes.
1 or 524 is the maximum (peak) frequency to shift. If the peak frequency does not fall within a predetermined frequency band, the coin is not considered genuine. Sensor coil 512 and its LF test circuit 522 generate a pulse when a coin passes through the magnetic field of sensor coil 512.

LF test circuit 522 has one output for each of the three denominations. A single pulse on one of the three outputs of LF test circuit 522 determines that the coin is acceptable. This pulse is generated after it is detected that the coin has arrived at the first sensor 511 and before it is detected that the coin has left the third sensor 514. 3 from LF test circuit 522
The absence of a pulse on any of the two outputs or the presence of a pulse on more than one output indicates that the coin is not genuine for that denomination. Here, the specific contents of the test circuit 522 will not be discussed any further. The frequencies of oscillators 521 and 524 are alternately 1
Measured by 0 bit counter 580.

A pulse signal with a pulse width of 1 millisecond is generated by a time period pulse generator 540 constructed from a flip-flop, which signals are applied alternately to AND gates 531 and 534, and the outputs of oscillators 521 and 524 are input to a counter 58.
0 alternately. During this pulse time period,
Comparator 560 compares the contents of the 10-bit counter with a value previously stored in programmable ROM 55O. What is stored in ROM55O is the limit value for determining authenticity.

There is a set of allowable frequency limits for the oscillator 521;
There is another set for oscillator 524. Examples of addresses for data associated with oscillators 521 and 524 are shown in FIGS. 6A and 6B, along with shift curves 6a and 6b of the oscillation frequency upon passage of a quarter coin. Figures 6A and 6B
In each of the figures, the vertical axis is frequency, and the shaded area indicates the band of frequency values that are allowable for the outputs of oscillators 521 and 524.

In each figure, three shaded areas are shown for three types of denominations. Permissible frequency limit data relating to oscillators 521 and 524 is stored in the address values shown in FIG. 6A and on the left side of FIG. The most significant bit of address information accessing memory 550 is the Q of time period pulse generator 540.
given by the output. That is, when the most significant bit of the address is 0, the data for the oscillator 521 shown in FIG. 6A is
When 1, data for the oscillator 524 shown in FIG. 6B is accessed. As mentioned above, data for oscillators 521 and 524 will be accessed alternately. ROM55
The lower 3 bits of the address information for reading O are 2
two 3-bit counters or address registers 551 and 5
54. Register 551 specifies the address for reading data for oscillator 521, and
54 designates an address for reading data for the oscillator 524. For each repeated test cycle, each register is set to 00 by a signal on lead 558 from control logic 590.
It is reset to 0. ROM55O address 0000
and 1000 each store a coin arrival frequency value that is higher than the idle frequency of oscillator 521 or 524 and lower than the lower limit frequency for allowed coins. Addresses 0111 and 1111 are not used and are recognized by the device as addresses indicating unacceptable coins. Figure time Tal:. For each Tb, the presence of a coin is the sensor coil 5.
11 and 514 indicate the time periods detected.
Taking the case of counting pulses from the first oscillator 521 as an example, the coin arrival frequency value stored at address 0000 at the beginning of the counting period is given to the comparator 560 from the ROM 55O.

At this time, the pulse count value of the counter 580 is address 00.
When the frequency is greater than the frequency stored in 00, the comparator 56
0 generates an output pulse, which output pulse is sent to generator 54.
AND gate 555 at the same time as the oscillator switching signal from 0
is given to address register 551, inputting one pulse to address register 551 and stepping its output to 001. The output of address register 551 is the Q of time period pulse generator 540.
When the signal from the output is received by AND gate 552, it is directed through that gate to ROM 55O. When comparator 560 detects that the count value in 10-bit counter 580 exceeds the value stored in the addressed portion of ROM 55O, address register 551
advances by 1 and selects the next address from ROM 55O.

The numbers stored in ROM 55O correspond to the lower and upper frequencies for true coins of each allowed denomination. Therefore, when the coin passes through the magnetic field of the sensor coil 511, the frequency generated by the oscillator 521 increases through the level set in the ROM 55O,
Address register 551 will ultimately advance its count to the address corresponding to the next limit level frequency above the maximum frequency counted by ten bit counter 580. If this level is the upper limit of the frequency band associated with the true coin, then the address in the address register at the end of the pulse width time period will change to the level at which the frequency corresponds to the true coin of that amount. It is determined that the tested coin is genuine. On the other hand, if the address in that register is that of the lower limit for the true coin, it indicates that the maximum frequency did not exceed the lower limit and the tested coin should be rejected. This determination is made by control logic circuit 590. That is, in the test using the sensor 511 shown in FIG. 6A and the test using the sensor 514 shown in FIG. 6B, the maximum frequency (peaks of curves 6a and 6b) falls within the shaded area, regardless of the denomination of a genuine coin. , and the address register will have an address corresponding to the upper limit of the shaded area where the peak is located. If the contents of address register 551 are 110
If so, it can be determined that it is a genuine 25 cent coin.
The operation of the energizing AND gate 556 of the other address register 55 and the AND gate 553 at its output is similar to that of the address register 551, AND gate 555, and AND gate 552 described above.
As shown in FIG. 6B, a 25 cent coin is determined to be genuine when the contents of register 554 are 100. During a predetermined non-test period after address registers 551 and 554 have been reset by a signal from control logic 590, the signal from pulse generator 540 is reset to R before the start of the next test period.
Return the OM55O address to 0000 and 1000. Control logic 590 includes timing signals from time period pulse generator 540, address information for ongoing comparisons from address registers 551 and 554, and comparator 560.
For example, the comparison results from the LF circuit 522 and the coin test results from the LF circuit 522 are received.

Logic circuit 590 determines the acceptability of the coin being tested if a satisfactory result was obtained for each test, each test indicating that the coin was of the same denomination and the test results were received in a predetermined sequence. and generates a signal indicating the amount. Control logic circuit 590 also generates reset signals for address registers 551 and 554. The contents of registers 551 and 554 both indicate the address of ROM 55O that stores the upper limit value for 25 cent coins, and the signal from test circuit 522 also outputs the face value of 25 cent coins. determined to be a true 25 cent coin. In this example, the information from the sensor is RO
A sequential comparison is made with the information in M, but the information from the sensor is stored in ROM at several different addresses.
can be compared simultaneously with information stored in

The method described below is particularly effective when the lower limit of one allowed denomination is lower than the upper limit of another denomination and there is overlap in the allowed value bands. In the embodiment shown in FIG. 5, the count value in the counter 580 as the test result indicating the characteristics of the coin is
It is not connected to load into OM55O.

The maintainer of this device has several ROM boards pre-stored with data sets regarding true coins of multiple denominations. The data sets stored on these ROM boards differ slightly from one ROM board to another. The maintenance manager inserts a standard coin or a coin replica of the characteristic into this device and measures the maximum count value of the counter 580. Based on this measured value, the maintenance manager selects a ROM board loaded with the optimum data from among several ROM boards loaded with data sets and installs it in the device. This makes it possible to test coins with high precision using a ROM loaded with data optimal for each device. In coin testing, it is an effective method to compare sensor output information when a coin is present at the sensor with information immediately before or after the coin arrives at the sensor.

For example, the difference or ratio between the sensor output when a coin is present in the sensor and the sensor output immediately before the coin arrives at the sensor is determined, and the acceptability of the coin is determined based on the value of this difference or ratio.

This mitigates the effects of shifts due to drift in the sensor oscillator's idle frequency or passive effects on the time period pulse width. FIG. 7 shows an embodiment of the apparatus as described above.

Sensor coils 611 and 613 are connected to high frequency oscillators 621 and 623. In normal operation, the coin will be in the magnetic field of sensor coil 611 for 65 milliseconds and in the magnetic field of sensor coin 613 for 40 milliseconds. During this time period, the coin shifts the oscillation frequency of the oscillator from the idle frequency to a higher one. Each coin denomination (eg, 5 cents, 10 cents, 25 cents) has a predetermined allowable frequency band in each of sensor coils 611 and 613. Determining a coin's authenticity relies on the peak oscillation frequency shift. If this frequency shift does not fall within the permissible frequency band, the coin under test is rejected. The low frequency coin sensor coil 612 consists of a pair of concentrically wound coils, each coin being attached to the walls on both sides of the coin track 631. The coin test circuit 622 connected to this sensor 612 is
Each of the three outputs corresponds to each of the three types of denominations. When the test results in one of the three outputs producing a single pulse, the coin being tested is determined to be of the denomination corresponding to that output. Oscillators 621 and 62
The frequency of 3 is measured by a 10-bit counter 680.

Each oscillator alternately connects AND gates 631 and 633 and 0R
It is connected through gate 635 to a counter 680, which counts the frequency for a time period, eg, one millisecond, from a time period generator flip-flop 640. Oscillator 621
Numerical values corresponding to the idling frequencies of and 623 are stored in two registers 650 and 670, respectively, as reference values.

These reference values shall be determined 300 milliseconds after power is applied to the device or after an acceptable signal is generated by a test that does not depend on these reference values (e.g. a test with low frequency).
After 00 milliseconds, the signal generated by the management circuit 690 is stored in the register. That is, the counter 68 immediately before the coin arrives at the sensor 611 and the sensor 613
The contents of 0 are stored in registers 650 and 670, respectively. When it is detected that a coin has arrived at the sensors 611 and 613, the contents of the counter 680 are calculated by adding the contents of the previously accumulated registers 650 and 670 and the adder 6.
A difference is taken at 60, and the difference is stored in some numerical data stored in memory 695 and in address counters 651 and 65.
The comparator 660 compares the signals one after another under address control of No. 3. Contents of registers 650 and 670 and counter 63
The contents of 0 are periodically transferred to adder 684 via multiplexer 682.

Adder 684 adds the value in counter 680 and register 65
0 determines the difference from the number within 670. At the end of each one millisecond coin test period, the output of adder 684 is compared in comparator 660 with a value previously stored in programmable memory 695.

The address of the numerical data read from the memory 695 to the comparator 660 is determined by two 3-bit address counters 651.
and 653. Address counter 651 is associated with a test period for oscillator 621 and address counter 653 is associated with a test period for oscillator 623. When the output of adder 684 becomes larger than the value in memory 695, 3-bit counter 651 or 65
3 advances to the next address by one. The address from counter 651 or 653 is provided to memory 695 by multiplexer 655 and decoder 651. The numbers stored in the memory 695 are the upper and lower limits of the frequency difference in a true coin, which are for each denomination and are comprised of a detection device consisting of a sensor 611 and an oscillator 621 and a sensor 613 and an oscillator 623. and the detection device.

Therefore, when a coin passes through the magnetic field of sensor coil 611, the frequency of oscillator 621 will be higher than the frequency it would be if no coin was present in the sensor (i.e., the idle frequency), and the frequency difference is set in memory 695. The associated 3-bit address counter 651 advances to the address corresponding to the next frequency difference level greater than the peak frequency difference. If this address corresponds to the upper limit of the frequency difference band for the true coin, then the peak of the tested frequency difference is within the tolerance band and the tested coin is determined to be genuine. but,
If this address is towards the lower limit, the coin under test (or should be rejected) detects the presence of the coin and generates a signal corresponding to the coin's arrival and departure from the sensor coil magnetic field. To do this, the output of adder 684 is 1
Monitored at the end of the millisecond test period.

At this time, the address input of memory 695 is reset to 000 and a comparison is made. Memory 695 00
The number stored at the 0 address corresponds to some deviation from the idle frequency, and at least a deviation of the adder output relative to that number means that a coin is present in the sensor. The determination of whether the coin is genuine is made when the coin leaves sensor 613.

The management circuit 690 generates a signal indicating a genuine coin only if: 1 When the 3-bit address counter 651 associated with the first sensor 611 has a valid address (upper limit of the tolerance band) for a certain face value, 2
When the 3-bit address counter 653 associated with the third sensor 613 has a valid address for that denomination, and when three single pulses are generated from the test circuit 622 only on the output for that denomination.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of one embodiment according to the present invention, FIG. 2 is a block diagram showing the configuration of another embodiment according to the present invention, and FIG. 3 is a peak extraction circuit diagram. ,
4 is a diagram showing signal waveforms generated in the circuit of FIG. 3, FIG. 5 is a circuit diagram of still another embodiment of the present invention, and FIG. 6A and FIG. FIG. 7 is a diagram showing signal waveforms for explaining the operation of the circuit, and FIG. 7 is a circuit diagram of still another improved embodiment of the present invention. Explanation of symbols of main parts, sensor means...-20
,220,511,514,611,612,613,
Memory means...50,250,550,695
, comparison means...60,260,560,660
.

Claims (1)

[Claims] 1 sensor means for testing the physical properties of the coin and generating a signal that is a function thereof; digital memory means capable of programmably storing reference values for coin testing for genuine coins of a predetermined denomination; The signal from the sensor means during the coin test is compared with the reference value from the memory means, and when the signal value matches the reference value within a predetermined tolerance range, the coin being tested is determined to be true. a comparison means for generating a signal indicating that the reference value is programmably stored in the memory means, and the reference value is a signal value obtained by testing a standard coin in the sensor means. .