JPS5914938B2 - PCM signal error correction method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an error correction method for PCM signals.

When transmitting PCM signals, the pulse train may be damaged depending on the conditions of the transmission path.

The present invention provides a new circuit that can restore an almost complete pulse train from the remaining pulse waveform even in such a case. As an example of PCM signal transmission,
For example, an example will be described in which a PCM signal is extracted from a film on which image signals, audio signals, and other information signals are recorded.

When reproducing PCM signals from a film on which PCM signals are recorded, errors occur due to dust attached to the film.

This error is characterized by a unidirectional error from 1 to 0 (white to black on the film). In order to reduce this error as much as possible, for example, in the case of audio signals, the time ratio of high level parts is small, so that
Methods such as adopting a decimal code format are being considered. On the other hand, as a method for correcting code errors, the code error is usually detected first, and then, if the location of the code error can be identified based on the detection result, code error correction is performed. Such code errors generally occur with almost equal probability in both directions, from 1 to o and from o to 1, so the procedure for correcting code errors is usually complicated.

Therefore, in the present invention, the code error to be corrected is 1
Since the direction is limited to only one direction from to o, code errors can be detected and corrected relatively easily. In other words, code errors are detected by comparing the input and output of the shift register, and the detected output is used as a control signal to forcibly set the shift register to change from o to 1.
Code error correction is performed by converting to . - of the reproduced PCM signal when there is dust on the film
There are some cases as shown by the solid line in Figure 1A.

The dotted line in FIG. 1A indicates a portion of the signal that was originally present but was erased by dust. (b) is 1
If one bit is completely obliterated by garbage, (mouth)
and ←→ are cases where a part of one bit is erased. In the shift register, if the signal in FIG. 1A is written using the clock pulse shown in FIG. 1B, the level of the signal in FIG. 1A at the timing of the rising edge of the clock pulse will be written. Therefore, the output from the first register has the waveform shown in Figure 1C, and no pulse waveform appears in any of the cases of (-1), times, and (/J), resulting in an error.Error in the PCM signal of the present invention The correction method is to supply a PCM signal whose signal waveform has been partially damaged to a serial input terminal of a shift register in which at least the first stage can be set by a control signal, and to convert the output of the first stage of the shift register into a signal whose polarity is inverted. , said PC
The error caused by partial damage to the signal waveform of the PCM signal is corrected by logically multiplying the M signal with a signal delayed for a certain period of time, and setting the first stage of the shift register using the logical product output as the control signal. It is characterized by the following. The present invention will be explained below with reference to the drawings.

FIG. 2 is a block diagram showing the structure of an embodiment of the PCM signal error correction method according to the present invention.

A scanning light spot of a cathode ray tube (hereinafter referred to as CRT) 1 for flying spots is imaged by a lens 2 onto a film 3 on which a binary signal has been recorded, and the light transmitted through the film 3 is received by a photomultiplier tube 4. Performs photoelectric conversion. The motor 7 connected to the capstan 6 receives the signal detected from the output of the photomultiplier tube 4 by the vertical position error detection circuit 5 using the method described in the previously proposed Japanese Patent Application No. 48-41315 filed by the applicant.
It is also supplied to the vertical deflection coil 8 to control the running of the film 3 and to track it. In this case, film 3
The output of the photomultiplier tube 4 becomes as shown in FIG. 1A due to dust etc. adhering to the photomultiplier tube 4. This output is applied to shift register 9 and then to shift register 10. These shift registers 9 and 10 are integrated, but among them, the first stage, which can be set by a control signal, is separately shown as shift register 9. Therefore,
It is assumed that the first stage of the shift register used here has a set function.

A horizontal synchronizing pulse is supplied to the terminal 11, and the clock pulse generation circuit 12 generates a lock pulse in synchronization with the horizontal synchronizing signal as shown in FIG. 1B, which has a constant frequency relationship with it and has the bit frequency of the PCM signal. Let me,
These clock pulses are transferred to shift registers 9 and 10.
The clock pulse is supplied to the 4-pass supply terminal CP.

The output of the first stage of shift register 9 (FIG. 1C) is applied to the polarity inversion circuit 13 to obtain a signal as shown in FIG. 1E. The same signal as the input signal of the first stage of the shift register 9 is sent to the delay circuit 14.
In addition to this, a signal with a waveform as shown in FIG. 1D is obtained by delaying the signal by a time equal to 1% of one bit.

The output of the polarity inversion circuit 13 and the output of the delay circuit 14 are connected by AN.
In addition to the D circuit 15, these logical products are taken to obtain a signal having a waveform as shown in FIG. 1F. Then, the above AND circuit 1
By applying the output of 5 to the set terminal Set of the first stage 9 of the shift register, the output of the photomultiplier tube 4, which is applied to the input terminal of the first stage 9 of the shift register, may be damaged by dust, etc., and the clock pulse and timing Even if it is not set due to mismatch, the first stage 9 of the shift register is forcibly set by a signal having the waveform shown in FIG. 1F. In the case described above, since there is no signal at all in the part A of FIG. 1A from the beginning, the first stage 9 of the shift register cannot be forcibly set, and in this case, the signal cannot be restored.

However, as the shift registers 9 and 10 step sequentially in response to clock pulses from the clock pulse generation circuit 12, as shown in FIG. register 9
, 10. In this way, by extracting the parallel outputs of each of the shift registers 9 and 10 and applying them to the DA converter 16, an almost perfect continuous signal decoded from the terminal 17 can be obtained. As described above, the present invention sets the first shift register by AND outputting a signal obtained by delaying the input of the shift register in the form of a PCM signal by a certain period of time and a signal obtained by inverting the polarity of the output of the first shift register. Even if a signal is damaged, if some waveform of the damaged signal remains, the signal can be almost completely restored.

Note that in the above example, a CRT is used to display PCM on a film.
Although an example in which a signal is damaged by dust when reproducing a signal has been described, the method of the present invention can also be applied to a general case in which a PCM signal is damaged by noise in a PCM signal transmission path. Of course.

[Brief explanation of the drawing]

FIG. 1 is a signal waveform diagram for explaining the PCM signal error correction method according to the present invention, and FIG. 2 is a block diagram showing an example of a configuration for implementing the method of the present invention. 1...Cathode ray tube for flying spots, 2...
...Lens, 3...Film, 4...
... Photomultiplier tube, 5 ... Vertical position error detection circuit, 6 ... Capstan, 7 ... Motor, 8 ... Vertical deflection coil, 9 ,10...
...Shift register, 11...Horizontal synchronization pulse supply terminal, 12...Clock pulse generation circuit,
13...Polarity inversion circuit, 14...Delay circuit, 15...AND circuit, 16...
DA converter, 17...Decoded signal output terminal.

Claims (1)

[Claims] 1. A PCM signal whose signal waveform has been partially damaged is supplied to a serial input terminal of a shift register in which at least the first stage can be set by a control signal, and a signal obtained by inverting the polarity of the output of the first stage of the shift register and the PCM The signal is logically ANDed with a signal delayed for a certain period of time, and the logical product output is used as the control signal to set the first stage of the shift register to correct errors caused by partial damage to the signal waveform of the PCM signal. An error correction method for PCM signals characterized by the following.