JPS5917622B2 - Transistor inverter control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control method for a conduction width controlled (PWM) transistor inverter, and particularly aims to provide a control method suitable for using a transistor inverter with a high frequency amplifier.

Generally, when a transistor inverter is used as an amplifier, if the amplification is low frequency (50Hz to 100Hz), the operating frequency, that is, the base signal of the main transistor whose pulse width is controlled, is used in the drive circuit of the main switching transistor. In this case, the conduction width of the main transistor is controlled by the base signal obtained by rectifying the secondary current of the transformer, and the conduction width of the main transistor is controlled through the output transformer of the inverter. This is done by shaping the waveform of the resulting pulse width modulated AC output using a filter or the like.

In the case of 5-way high frequency amplification (2KHz to 5KHz),
It is necessary to form it so that it responds to the fundamental frequency from 20 K]-]z to 50 KHz.

Therefore, considering the storage time of the main transistor for these high frequencies, the drive transistor is transformer-coupled in a so-called push-pull type in the drive circuit in order to perform switching operation by reverse biasing the main transistor. The main transistor is controlled by the obtained ON and OFF pulse signals.

However, in this transformer coupling method, the ratio of the ON and OFF signals, that is, the pulse width of the ON signal, is reduced to 1.
If it is expanded to more than /2, the voltage of the off signal (reverse voltage) must be made high (to prevent biased excitation of the transformer), which will only complicate the circuit or cause problems such as destroying the drive transistor. Therefore, in reality, the above ratio can only be used at 1/2 or less.

This means that the control range of the conduction width of the main transistor is 50%.
Because of the following, there are drawbacks such as a large filter for shaping the waveform of the AC output obtained via the output transformer.

The present invention constructs an inverter by using a unit body in which a plurality of switching transistors are connected with their respective emitters and collectors in common (parallel) as one main transistor, and the base signal is divided and alternately applied to the transistors of each unit body. This invention provides a control method that can control the conduction width of the main transistor from 0% to 100% by applying a voltage.The present invention will be explained in detail below with reference to the drawings.

35 Fig. 1 is a circuit diagram of a bridge type transistor inverter to which the present invention is applied, and Fig. 2 is a block diagram of a drive circuit. They are connected in parallel to form unit bodies Trl to Tr4, and the unit bodies Trl and Tr4 and Tr2 and Tr3 form a pair to perform an inverter operation.

T9 is an output transformer, L and C are an inductor and a capacitor forming a waveform shaping circuit (low-pass filter), and D
is a drive circuit for the switching transistors Q1 to Q8, as shown in FIG. 2, which includes an amplifier AMP that amplifies the AC input (signal), a rectifier REC that rectifies this output, a circuit DS for determining whether the output is positive or negative, and a basic oscillator. (Internal clock) 0S
C1 Flip-flop circuit FFl Triangular wave comparison pulse generator CPl Pulse discriminating circuit PDSl Said discriminating circuit PD
It is comprised of amplifiers Ampl to Amp8 for amplifying the outputs of the amplifiers Ampl to Amp8, respectively, and transformers T1 to T8 for supplying the respective outputs of the amplifiers Ampl to Amp8 to corresponding switching transistors Q1 to Q8. Next, the operation will be explained using the operation waveform diagram of each part shown in FIG.

First, Fig. 3a shows the input signal waveform of the drive circuit D, b shows the clock signal waveform of the basic oscillator 0SC which oscillates at a frequency more than twice the input signal (six times in the figure), and C and c' show the flip-flop circuit. The output signal waveform of the FF, d is the output signal waveform of the comparison pulse oscillator CP, and E and e' are the output signal waveforms of the positive/negative discrimination circuit DS.
and input signals via transformers T1 to T8 (Fig. 3a)
During the half cycle (positive), the unit bodies Trl and Tr4 operate, and during the other half cycle (negative), the unit bodies Tr2 and T
r3 operates in pairs.

The switching transistors Q1 to Q8 of the unit bodies Trl to Tr4 operate alternately.

Now, in the positive half cycle of the input signal, the unit Trl
Focusing on, first, in the pulse separation circuit PDS, the comparison pulse (Fig. 3 d) and the output (0) of the rectifier REC are compared (
3f) to form a signal such as g. By logically (ANDing) this signal g, the output signal c of the flip-flop FF, and the positive pulse signal e of the positive/negative discrimination circuit DS, a signal as shown in FIG.
1 and the base of the switching transistor Q1 via the transformer T1. Further, by applying the logic outputs (signals G, d and Eq) (FIG. 3, 1) to the switching transistor Q2 via the transformer T2, the transistors Ql and Q2 are alternately turned ON.

Also, in the positive half cycle of the human power signal, the unit body Tr4
In the pulse discriminator circuit PDS, the logic outputs of the output signal c of the flip-flop circuit FF and the output signal e of the positive/negative discrimination circuit DS (L in FIG. 3), and the logic outputs of the same signals c' and e (M in FIG. 3). ) are applied to switching transistors Q7 and Q8 via transformers T7 and T8, respectively.

On the other hand, in the negative half cycle of the input signal (Fig. 3a), focusing on the unit Tr2, as with the unit Trl, the comparison output (Fig. 3g), the output c of the FF, and the negative of the positive/negative discrimination circuit DS. A logic output of the pulse signal e' (Fig. 3 j) and a logic output of the same signals G, d, and e' (Fig. 3 k) are formed, and these are connected to amplifiers Amp3 and Amp 4 and transformers T3 and T4, respectively. to switching transistors Q3 and Q4. Also, in the negative half cycle of the human power signal, the unit body Tr
The switching transistors Q3 and Q4 of No. 3 are alternately made conductive by the logical output signals (N and O in FIG. 3) of the outputs C and c' of the flip-flop circuit FF and the output pulse e' of the positive/negative discrimination circuit DS. Therefore, the combined output of these units can be obtained at the output transformer T9 of the bridge inverter as shown in FIG. 3P.

Note that FIG. 3 Q shows the output (amplified) waveform of the inverter.

That is, according to the present invention, the conduction width of each unit constituting the main transistor of the inverter can be controlled from 0% to 100% in the positive or negative half cycle of the input signal, so the output (power) is large. At the same time, the waveform shaping circuit can be miniaturized, and the input signal can be amplified with high accuracy.

As is clear from the above description, the present invention is particularly suitable when a transistor inverter is used as a high frequency amplifier.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of a bridge type transistor inverter to which the present invention is applied, Figure 2 is a block diagram of a drive circuit, and Figure 3 is a block diagram of a drive circuit.
The figure is an operation waveform diagram of each part.

Claims (1)

[Claims] 1 In a control method for a transistor inverter in which the conduction width of a transistor is controlled by a pulse width signal having a frequency at least twice that of an input signal, the inverter is constructed by using a plurality of transistors connected in parallel as a unit. A control method for a transistor inverter, characterized in that the pulse width signal is divided according to the number of transistors of the unit body and supplied to each transistor, and the pulse width is controlled by the combined width.