JPH0140524B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to an AC power supply device.

Conventionally, in this type of AC power supply device, the eighth
As shown in the figure and FIGS. 9a to 9c, the output voltage e'1 of the high frequency power supply circuit 1' is pulse width controlled and controlled every half period of the voltage e'1 by a polarity switching circuit 2' with a pulse width control function. An output voltage e'2 was obtained by switching the polarity, and the waveform of the voltage e'2 was shaped by a waveform shaping filter 3', thereby obtaining a low frequency sine wave voltage e'3. here,
Since the voltage e'2 is pulse width modulated, low-order harmonic components can be removed and the waveform shaping filter 3' can be made smaller and lighter. Since pulse width control is performed every cycle, increasing the frequency of voltage e'1 has the disadvantage that a very complicated control circuit 4' is required to perform pulse width control with high accuracy.

The present invention aims to provide an AC power supply device that eliminates the above-mentioned drawbacks.

The AC power supply device of the present invention will be explained below with reference to the drawings.

First, the operating principle of the AC power supply device of the present invention will be briefly explained with reference to FIGS. 1a to d and 2a and 2b. Figure 1a shows a square wave AC voltage with an average value of zero; if it is rectified in the positive direction, a DC voltage with an average value of +E as shown in Figure 1b is obtained, and if it is rectified in the negative direction, a DC voltage with an average value of +E is obtained. The average value as shown in Figure 1c is -E
A DC voltage of . Here, as shown in FIG. 1d, the period of the DC voltage shown in FIG. 1b is T ₀ ,
The period of the AC voltage shown in Figure 1a is (T ₁ - _{T 0} )
If a voltage with period T ₁ is generated, the average value will be E·T ₀ /T ₁ . In other words, the average value of the voltage in FIG. 1d can take a value from zero to +E by appropriately changing the value of T ₀ /T ₁ . Therefore, the first
If the polarity of the waveform in figure d is reversed every cycle, the second
An alternating current voltage as shown in Figure a is obtained. Figure 2a
As is clearer, the average value of the previous half cycle is E2T ₀ /T ₂ and the average value of the second half cycle is -E2T ₀ /T ₂ , and when passed through a low-pass filter, the result is as shown in Figure 2b. A sinusoidal voltage with a period T ₂ is obtained.

The present invention generates the above-mentioned alternating current voltage, further controls the pulse width to suppress lower harmonics, and thereby achieves a smaller and lighter waveform shaping filter.

In FIGS. 3 to 5, reference numeral 1 denotes a high frequency power supply circuit, which is connected to subsequent circuits through a series circuit including a polarity switching circuit 2 and a waveform shaping filter 3. In FIG.

It should be noted that the waveform shaping filter 3 does not necessarily have to be provided inside the AC power supply, but may be inserted before the load, and can be omitted, and is not an essential component of the present invention. .

Reference numeral 4 denotes a control circuit inserted between the high frequency power supply circuit 1 and the polarity switching circuit 2, which operates the polarity switching circuit 2 at an appropriate cycle according to the output voltage _e1 of the high frequency power supply circuit 1. 5 is the control circuit 4
The clip circuit generates a signal Q _T that extracts only the positive region of the output voltage e ₁ of the high frequency power supply circuit 1. 6 is a pulse width modulation signal generation circuit of the control circuit, which is a circuit that generates a pattern signal that is a reference for how to modulate the pulse width;
From the signal Q _T , two signals Q _a with different pulse widths,
Create Q _b . Reference numeral 7 denotes a logic circuit of the control circuit 4, which generates appropriate signals Q ₁ and Q ₂ for operating the polarity switching circuit 2 from the signals Q _T , Q _a , and Q _b .

S ₁₁ , S ₁₂ , S ₂₁ , and S ₂₂ are the first to fourth control switches of the polarity switching circuit 2, which are arranged on each side of the bridge, and the first and third control switches S ₁₁ ,
The connection point of S ₂₁ and the second and fourth control switches S ₁₂ ,
The connection point of S ₂₂ is connected to the output end of the high frequency power supply circuit 1, and the connection point of the first and fourth control switches S ₁₁ and S ₂₂ is connected to the second and third control switches S ₁₂ and S ₂₁ . The point is connected to the input terminal of a filter 3 for waveform shaping. Tr ₁₁ , Tr ₁₂ , Tr ₂₁ , Tr ₂₂ are the first
The first to fourth transistors of the control switches S ₁₁ , S ₁₂ , S ₂₁ , S ₂₂ connect the control switches S 11 , S 12 , S 21 , S ₂₂ through diodes whose collectors are in opposite directions, respectively.
At both ends of S ₁₂ , S ₂₁ , S ₂₂ , control switches S ₁₁ , S ₁₂ , S ₂₁ ,
Connected to both ends of S ₂₂ . l ₁₁ , l ₁₂ , l ₂₁ , l ₂₂ are the first to fourth transistors Tr ₁₁ , Tr ₁₂ , respectively.
The first to fourth coils inserted between the base and emitter of Tr ₂₁ and Tr ₂₂ .
l ₁₁ and l ₁₂ are arranged on the secondary side of the first transformer T ₁ , and third and fourth coils l ₂₁ and l ₂₂ are arranged on the secondary side of the second transformer T ₂ . 1. Second transistor
Tr ₁₁ , Tr ₁₂ and the third and fourth transistors Tr ₂₁ ,
Tr ₂₂ are made conductive at the same time. AMP ₁ , AMP ₂
are first and second amplifier circuits inserted between the primary coils of the first and second transformers T ₁ and T ₂ and the output terminal of the logic circuit 7 of the control circuit 4, respectively; 7
The output signals Q ₁ and Q ₂ are amplified and applied to the primary coils of the first and second transformers T ₁ and T ₂ , respectively.

FF is a flip-flop of the logic circuit 7,
It is connected to the clip circuit 5, and generates a signal _Qc obtained by frequency-dividing the output signal _QT of the clip circuit 5. NAND ₁ is a first NAND circuit, the first input terminal of which is connected to the clip circuit 5, the second and third input terminals of which are connected to the pulse width modulation signal generation circuit 6, and three signals Q _T , Q _a , and Q _b . NAND ₂ is a second NAND circuit, the first input terminal of which is connected to the clip circuit 5 via the first inverter INV ₁ , and the second input terminal connected to the clip circuit 5 via the second inverter INV ₂ . The input terminal of is directly connected to the pulse width modulation signal generation circuit 6, and a negative AND is performed between the three signals _T , _a , and _Qb . NAND ₃ is a third NAND circuit in which the first input terminal is connected to the output terminal of the flip-flop FF, and the second input terminal is directly connected to the output terminal of the flip-flop FF.
The input terminal of is connected to the pulse width modulation signal generation circuit 6 via the third inverter INV ₃ , and a negative AND is performed between the three signals Q _c , Q _a , and _b . NAND ₄ is a fourth NAND circuit, whose first input terminal is connected to the output terminal of the flip-flop FF via the fourth inverter INV ₄ , and whose second and third input terminals are connected to the second and third input terminals, respectively. Inverter INV ₂ ,
It is connected to the pulse width modulation signal generation circuit 6 via INV ₃ , and performs a negative AND operation between the three signals _c , _a , and _b . D ₁ to _{D 4} are first to fourth diodes, which are respectively inserted between the constant voltage source V _cc and the output ends of the first to fourth NAND circuits NAND ₁ to NAND ₄ , and their anode ends are said first amplifier circuit through a fifth inverter INV ₅
It is connected to the input end of AMP ₁ and directly connected to the input end of the second amplifier circuit AMP ₂ .

The operation of the AC power supply device of the present invention will now be described in detail. The output voltage _e1 of the high frequency power supply circuit 1 shown in FIG. 6a is applied to the clip circuit 5 of the control circuit 4.
Obtain a rectangular wave signal Q _T as shown in Figure b. The square wave signal Q _T is applied to the flip-flop FF of the logic circuit 7.
The square wave signal shown in FIG. 6c is divided by
It is assumed that Q _c . Further, the rectangular wave signal Q _T is a signal Q a having the same period as the period of the low frequency AC output e ₃ finally formed in the pulse width modulation signal generation circuit 6 _.
and a predetermined pulse width modulation signal Q _b (sixth
(See figures d, e, j). Signals Q _T , Q _a , Q _b , Q _c are transmitted from the first to fourth NAND circuits NAND ₁ to NAND of the logic circuit 7.
NAND ₄ , first to fourth inverters INV ₁ to
INV ₄ and first to fourth diodes D ₁ to D ₄
The signal shown in Figure 6g is processed as appropriate by
The signal Q ₂ is further converted into the signal Q ₁ shown in FIG. 6f by the fifth inverter INV ₅ . Specifically, when signal Q _b is at L level, that is, mode A (first mode), signals Q ₁ and Q ₂ have the same waveform as signals Q _c and _c , respectively, and when signal Q _b is at H level, Q _a is H
When the level is mode B (second mode), the signal
Q ₁ and Q ₂ have the same waveforms as signals Q _T and _T , respectively. When signal Q _b is at H level and signal Q _a is at L level, that is, in mode C (third mode), signals Q ₁ and Q ₂ are The signals Q _T and Q _T have the same waveforms, respectively (Fig. 6 f,
(see g, h).

The signal _Q1 is transmitted to the first and second control switches via the first amplifier circuit _AMP1 and the first transformer _T1 .
The signal Q 2 is applied to the bases of the transistors Tr _{11 and} Tr ₁₂ of S ₁₁ and S 12, and the signal Q ₂ is applied to the second amplifier circuit.
AMP ₂ and the transistors Tr 21 _and Tr ₂₂ of the third and fourth control switches S ₂₁ and S ₂₂ via the second transformer T ₂
given on the basis of. Here, since there is a relationship of Q ₁ = ₂ between the signals Q ₁ and Q ₂ , the first and second control switches S ₁₁ and S ₁₂ and the third and fourth control switches
There is no electrical conduction between S ₂₁ and S ₂₂ . Due to the conducting operation of the first to fourth control switches S ₁₁ , S ₁₂ , S ₂₁ and S ₂₂ , the input voltage e ₁ to the polarity switching circuit 2 changes to the sixth
It is applied to the waveform shaping filter ₃ as a voltage e2 having a waveform as shown in FIG. 6, and is converted into a voltage _e3 having a waveform as shown in FIG.

In the above, the output signal Q _b of the pulse width modulation signal generation circuit 6 consists of a pulse train of a constant pulse width ratio at a constant phase interval during a half period of the low frequency AC output _e3 , and consists of (i) a triangular wave and a staircase wave. (ii) generation by counting pulses using a digital circuit, etc.

In addition, the component voltages of voltage e ₂ corresponding to mode A are as shown in Fig. 7 a and b in addition to the waveform shown in Fig. 6 i.
It may be an alternating current voltage with the waveforms shown respectively in . In addition, the component voltage of voltage e ₂ corresponding to mode B may be a positive DC voltage, and the component voltage of voltage e ₂ corresponding to mode C may be a negative DC voltage. However, the periods of mode A and mode B of the voltage e ₂ alternately arranged during the half cycle of the low frequency AC output e ₃ are arranged in an appropriate ratio, and the periods of mode A and mode B alternately arranged during the next half cycle. and Mode C periods are also arranged in proportion to the previous period.

The control switches S ₁₁ , S ₁₂ , S ₂₁ , and S ₂₂ are not limited to the above-mentioned circuits, but may be ones that can simply control in both directions, and other semiconductor devices (such as GTO) may be used.

As described above, the AC power supply device of the present invention includes a high-frequency power supply circuit that generates an AC voltage with a constant cycle, and a plurality of control switches, which switch the polarity of the output voltage of the high-frequency power supply circuit and transmit it to a subsequent stage. A first mode in which a switching circuit and a control switch of the polarity switching circuit are controlled so that the output voltage of the polarity switching circuit is an AC voltage with a lower frequency than the output voltage of the high frequency power supply circuit, and a first mode in which the output voltage is a positive DC voltage. 2
(b) Since the control circuit is not required to operate at high speed, the configuration of the control circuit can be changed. It can be simplified. In other words, in the past, pulse width control and polarity switching were performed every half cycle of the output of the high frequency power supply circuit, so the operation timing of pulse width control required a much finer resolution than the cycle of the output of the high frequency power supply circuit. Therefore, the control circuit had to become complicated in order to increase the speed, but since the present invention only switches the polarity of the output of the high frequency power supply circuit, the maximum value of the frequency of the signal handled by the control circuit is high frequency. The frequency is the same as the output frequency of the power supply circuit, and therefore the control circuit is not required to be faster than the conventional one, so the configuration can be simplified.

(b) Contrary to (a) above, if the simplification of the control circuit is sacrificed to some extent, the frequency of the high-frequency power supply circuit can be significantly increased, and transformers etc. can be made smaller and lighter. Noise can also be achieved by setting the frequency above the audible frequency (upper limit is about 20KHz).

(c) Since pulse width modulation can be easily performed, higher harmonics can be reduced.

(d) Since harmonics can be reduced, the waveform shaping filter connected to the latter stage of the polarity switching circuit can be made smaller and lighter.

There are other effects.

[Brief explanation of drawings]

1 and 2 are diagrams explaining the principle of the AC power supply device of the present invention, Figures 3 to 5 are illustrations of the same embodiment, Figures 6 and 7 are diagrams explaining the same operation, and Figures 8 and 9 are The figure shows a conventional example. 1...High frequency power supply circuit, 2...Polarity switching circuit,
3... Filter, 4... Control circuit, 5... Clip circuit, 6... Pulse width modulation signal generation circuit, 7...
...Logic circuit, AMP ₁ , AMP ₂ ...Amplification circuit, D ₁ ...
D ₄ ...Diode, FF...Flip-flop,
INV ₁ to _{INV 5} ...Inverter, _l11 , _l12 , _l21 , _l22
...Coil, NAND ₁ ~ NAND ₄ ...NAND circuit,
S ₁₁ , S ₁₂ , S ₂₁ , S ₂₂ ... control switch, T ₁ , T ₂ ...
...Transformer, _Tr11 , _Tr12 , _Tr21 , _Tr22 ...Transistor.

Claims (1)

[Claims] 1. A high frequency power supply circuit that generates an alternating current voltage of a constant period, a polarity switching circuit including a plurality of control switches that switches the polarity of the output voltage of the high frequency power supply circuit and transmits it to a subsequent stage, and a control switch for the polarity switching circuit. A first mode in which the output voltage of the polarity switching circuit is an AC voltage with a lower frequency than the output voltage of the high frequency power supply circuit, a second mode in which the output voltage is a positive DC voltage, and a second mode in which the output voltage is a negative DC voltage. 1. An AC power supply device comprising: a control circuit for converting the voltage into an AC voltage in which three modes are alternately repeated.