JPS5920198B2 - Testing methods for electronic components - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a test method for ensuring the permissible variation range of various signal components added to electronic components such as bubble memories and LSIs.

Electronic components such as bubble memories and LSIs operate in response to various inputs, but these inputs are subject to fluctuations, so it is necessary to check whether the components operate normally even if the input fluctuates to what extent. However, it is necessary to ensure a tolerance for variation.

For example, in the specifications for a gate with bubble memory, the gate input signal ranges from a minimum of 0 degrees to a maximum of 1 degree for 4 phases.
The conditions are that it operates normally even if the pulse width varies from a minimum of 100 onoseconds to a maximum of 200 nanoseconds, and a current value of 00 degrees varies from a minimum of 100 mA to a maximum of 200 mA. In this case, the conventional method to test that the bubble memory gate operates normally under the conditions is to first fix the phase to the minimum 0 degrees, and then set the pulse width and current value to the maximum values in the specifications. The method is to measure by changing it to the minimum value, then fixing the phase to, for example, 5 degrees, changing the pulse width and current value again in the same way, and then changing the phase again and repeating the same measurement procedure. It was on. However, this test method only suppresses two points, the maximum value and the minimum value, and there remains concern about whether it will be in an intermediate state. However, if a test is performed by selecting the phase and pulse width current values between the minimum and maximum values in order to check intermediate states, the number of measurement points becomes extremely large, and the combinations thereof become enormous. In addition, there are many bubble memory gates, so if you consider the combinations among them, the number of combinations becomes astronomical, and it is therefore practically impossible to conduct a complete test. . FIG. 1 is a diagram explaining the procedure for testing bubble memory.

a is a part of the test plan that shows the combinations of each test element (input signal component), and the variables of each test element have a minimum value of "
1", the standard value is represented by "O", and the maximum value is represented by "+". In the figure, -d shows the outline of three variables "1", "O", and [+] regarding the phase, pulse width, and current value, respectively. Based on the schedule shown in Figure A, the test method for the five gates of the bubble memory will be explained. First, in test 1, only the phase of the signal applied to the bubble generator Gen is set to a value of "1". The pulse width and current value are each set to the value "O", and the signals applied to all other gates, that is, the divider Sptl, the eraser Annl, the input transfer gate Tr-1n, and the output transfer gate Tr-0ut, are in phase. , pulse width, and current value are both set to "0". In this state, it is tested whether the bubble memory operates normally, and then the process moves to test 2.
In test 2, the signals applied to this gate and other gates are the same as in test 1, except that the pulse width of the signal applied to the bubble generator Gen is "1".
0" state. In the same way, all combinations are set digitally by computer control, etc., and tests are conducted.In this way, only 3 combinations are set for each test element.
The drawback is that even if you select points and perform a single test, the number of combinations will be quite large, which will take the maximum amount of time for the test. By measuring only two or three points for each test element, the operating state of electronic components at intermediate values between these values must be estimated, and therefore even electronic components that have passed the test may not be sold on the market. Failures may occur after the system is actually put into operation.

This is because if each test element is combined with a certain specific value, it may work normally with that combination but not with other combinations. Although it may be known to some extent from experience which combination of values of each test element is most likely to cause malfunction, and therefore is the worst combination with the narrowest operating margin, in LSI memories etc., the combinations are extremely difficult. It's frustrating that it's hard to understand because there are so many people. If the worst combination is known, it is of course possible to take measures to incorporate that combination into the test plan in advance, but if this is not known, it is difficult to do anything. The present invention was made to eliminate the drawbacks that could not be solved by conventional testing methods, and allows for efficient and extremely quick combinations of all test conditions for electronic components, ensuring that even the worst combinations are not omitted. The purpose of this invention is to provide a test method that can perform wall tests.

That is, the present invention provides a test method that guarantees the permissible variation range of various input signal components, such as gate pulse phase, pulse width, current value, and drive magnetic field strength, which are applied to electronic components. and providing a continuous wave oscillator that operates independently, and operating the plurality of oscillators asynchronously with each other to asynchronously and periodically change a plurality of the signal components between the maximum value and the minimum value of the range, This method is characterized by obtaining arbitrary combinations of values of various signal components and applying the combinations to electronic components, which will be described in detail below with reference to the drawings. Fig. 2 is a diagram explaining the state in which various signal components are changed periodically, where a indicates a change in the phase of a pulse waveform, and the pulse waveform indicated by a thick line undergoes a phase change by a circuit described later. It periodically fluctuates between a minimum value (Min) and a maximum value (Max) as indicated by diagonal lines.

Figure b shows the change in pulse width, which is asynchronous with the phase change of the pulse waveform, and shows the smallest width (Min) and the widest width (Min).
Max). Figure c shows the current change, which also fluctuates periodically between the minimum value (Mln) and the maximum value (Max) and asynchronously with other things such as the phase. In this way, the three signal components are varied completely asynchronously and periodically and are input to the gate. Therefore, as shown in Figure d, the pulse signal SG applied to the gate changes its shape and position at any moment within the maximum value (Max) of amplitude and phase change, which is within the required test range. It includes all possible combinations of phase, pulse width, and current value. child. The reason why the fluctuations of each signal component were not synchronized is that if they were synchronized, for example, the pulse width for a certain phase would always be fixed at a constant value, making it impossible to realize all combinations. Similarly, the signals SG applied to each gate are asynchronous with each other. In this way, the entrances to each gate will include all possible combinations based on the same principle, making it possible to perform complete tests including checks for mutual interference. In the above description, for convenience, the case where there are three input signal components has been described, but in the case of a bubble memory, for example, the drive magnetic field is also an input signal component. In this case, all four gates are varied asynchronously, and the gates are also not synchronized. Then, in this state, the bias magnetic field is changed continuously, and the operation is performed.
By finding the threshold for non-operation, an operating margin characteristic curve that includes all combinations of input conditions can be obtained. Next, an example of a method for periodically and asynchronously varying each signal component will be explained based on FIG.

In the same figure, a shows a circuit that periodically changes the pulse width, M] is a monomultipipulator, R,, R2, and C are resistors and capacitors that constitute the time control elements of the monomultiplier, and 0SC is a sine wave, a triangular wave, etc. This is an oscillator that oscillates continuous waves. One end of the resistor R1 is connected to the +5 DC power supply, and the output of the oscillator 0SC is applied to the connection point P of the resistors R, R2. In this circuit, when the output pulse of the gate pulse generation circuit of the bubble memory or the pulse Sg obtained by signal processing such as phase shift is applied to the trigger pulse input terminal 1N, a rectangular wave pulse Sg of a constant width is output from the output terminal 0UT.
2 is output, but the pulse width of this pulse Sg2 is determined by the time constant, which is the product of the resistors R, R2 and the capacitor C, and the power supply voltage, which is a constant voltage of +5V and the oscillator 0.
Since it is the sum of the voltage from the SC that changes, for example, in a triangular wave shape, the pulse width of the output pulse Sg2 changes widely around a constant width as shown in the figure. This pulse width change is of course synchronized with the output of the oscillator 0SC, and the oscillator 0SC is asynchronous with the trigger pulse Sg, and its frequency is several tens to several hundred Hz, and the trigger pulse Sg,
Since the frequency is extremely low compared to the frequency in the K[-1z or Ml-1z range, from the output terminal 0UT, an extremely large number of square wave pulses Sg2 whose pulse width changes continuously and periodically
is output. FIG. 3b shows a circuit for outputting pulses whose phase and pulse width vary independently and periodically.

This is a combination of two circuits similar to those shown in Figure a. That is, M2 is the second mono-multivibrator, R3,
R4 and C2 are resistors and capacitors corresponding to R, , R2 and C. Output pulse Sg of this circuit
3 will explain the principle of varying the phase and pulse width with reference to FIG. A trigger pulse Sg is applied to the input terminal 1N in Fig. 3b,
However, when a triangular wave for modulation is applied to the terminal P, a pulse Sg2 whose pulse width periodically fluctuates as described above is generated at the output terminal of the mono multivibrator M.
FIG. 4a shows in an exaggerated manner the situation in which this pulse Sg2 changes in pulse width. When pulse Sg2 is input to the second mono-multivibrator M2 to trigger it, and a triangular wave similar to terminal P is applied to the connection point P2 of resistors R3 and R4, the output terminal 0U of mono-multivibrator M2
At T, a pulse Sg3 whose phase and width are periodically changed as shown in FIG. 4b is obtained. That is, since the second mono-multivibrator M2 is triggered by the falling edge of the pulse Sg2, its output pulse Sg3 has a phase shift φ, φ2 corresponding to the pulse width of the pulse Sg2, and that pulse width is applied to the terminal P2. W,,W2 depending on the amplitude of the triangular wave
It fluctuates. The oscillators outputting the triangular waves applied to the terminals P, , P2 each operate independently, so that the phase and pulse width variations are asynchronous with each other and with the input signal Sg. Next, Fig. 3c shows a circuit that periodically changes the gate current value, and connects the terminal P3 to the output side of the high impedance constant current driver D which outputs a rectangular wave pulse via an impedance converter that converts it to a high impedance. Input triangular wave current from .

Then, the two types of current are superimposed, and a pulse current Sg4 whose amplitude fluctuates as shown is output from the output terminal 0UT. This amplitude, that is, the period of fluctuation of the current value, naturally matches the synchronization of the input triangular wave. Finally, d in the same figure shows a circuit that periodically varies the magnitude of the driving magnetic field of the bubble memory, and E is a control power supply that generates an output voltage by amplifying the signal input to the voltage control terminal P4. .
Therefore, when a triangular wave is input to this control terminal, a voltage that fluctuates in the form of a triangular wave appears on the output side of the control power supply E, and this is used as the power supply voltage to the driver D2 for the drive coil.
When applied, a current Sg5 whose amplitude changes in response to the voltage fluctuation is obtained. Here, the frequency of the triangular wave current output by the driver D2 is much higher than the frequency of the triangular wave at the terminal P4, and both are asynchronous. If two such circuits are provided to obtain two 5-triangular wave currents Sg5 with a 90° phase shift and these are passed through the X and Y drive coils, a rotating magnetic field whose strength periodically fluctuates can be obtained. By the method described above, the values of each input signal component are varied periodically and asynchronously with each other, and an extremely large number of combinations are obtained, thereby controlling the electronic component.

As explained in Figure 3a, etc., the frequency of the input signal Sg, is extremely high compared to the modulation signal applied to the terminals P, , P2, etc., so the modulation signal pulses during one cycle. A large number of pulses are obtained whose width, phase, etc. are varied over their entire range of variation. Therefore, all combinations can be obtained in about one cycle of the modulation signal, so the test can be completed in an extremely short time. Of course, the amplitude of the modulating signal is selected in accordance with the required range of variation of the test element. Furthermore, a continuous wave such as a triangular wave or a sine wave is used as the modulation signal, which allows the test elements to be varied continuously, resulting in an extremely large number of combinations. In the actual test, instead of varying all of the input signal components, only a part of them may be varied, and the others may be fixed or take several values sequentially.

As explained in detail above, the test method of the present invention changes the values of each input signal component periodically and asynchronously to obtain all combinations of the values of the signal components, so testing including the worst combination is possible. Operation tests can be performed under the following conditions:
The operating margin guarantee for electronic components becomes extremely complete.

What's more, this type of complete testing can be performed in an extremely short time compared to conventional methods, in just one cycle, making it possible to significantly shorten testing time and ultimately improve product reliability. I have a lot to contribute.

[Brief explanation of drawings]

Figure 1 is a diagram explaining the conventional testing method for electronic components, in which a is a test plan, b-d are the phases to be measured, respectively.
FIG. 3 is a waveform diagram illustrating pulse width and current value.

Claims (1)

[Claims] 1 In a test method that guarantees the permissible variation range of various input signal components such as gate pulse phase, pulse width, current value, and drive magnetic field strength that are applied to electronic components, each of the above-mentioned signal components is a continuous wave oscillator that operates in the range, and operates the plurality of oscillators asynchronously with each other to asynchronously and periodically change a plurality of the signal components between the maximum value and the minimum value of the range, thereby generating various signal components. A method for testing electronic components, comprising obtaining an arbitrary combination of values of and applying that combination to an electronic component.