JPS5920289B2 - Interpolation receiving device for momentary audio interruption - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides an interpolation reception system for instantaneous audio interruptions, in which when an audio signal with an instantaneous interruption during transmission is received, the noise generated at the instantaneous interruption is removed and the audio signal is interpolated. Regarding equipment.

FIG. 1 shows a block diagram of a circuit configuration of a conventional interpolation receiving device during instantaneous interruption.

FIG. 1 shows an example in which the input signal to the input terminal 1 is an analog modulated signal such as FM. The wooden sword terminal 1 is connected to an amplification demodulation circuit 3 and a momentary interruption detection circuit 4. Further, the amplification and demodulation circuit 3 outputs the demodulated signal X to the PCM encoder 5. The PCM encoder outputs a signal encoded with
The instantaneous interruption and recovery from the instantaneous interruption are detected from the input signal (for example, using the received electric field strength, etc.), and a signal Z indicating this is output to the interpolation circuit 8 and the switch 9. The delay memory circuit 6 is P
It is input from the CM encoder 5 and the interpolation circuit 8 and output to the pitch period detection circuit T and the interpolation circuit 8. Pitch period detection circuit T
detects a pitch period or no period, and outputs this information V to the interpolation circuit 8. The interpolation circuit 8 is a pitch period detection circuit T
It inputs the signal V from the delay storage circuit 6 and the storage signal from the delay storage circuit 6, and outputs the signal Y to the switch 9. This switch 9 separates the signals X and Y and outputs them to the PCM decoder 10.
The PCM decoder receives input from switch 9 and outputs to output terminal 2. Next, the operation of the circuit shown in FIG. 1 will be explained. An analog modulated signal such as FM inputted to the input terminal 1 is demodulated by the amplification/demodulation circuit 3 and applied to the PCM encoder.
The PCM encoder encodes the demodulated signal X and outputs it to the storage circuit 6 and switch 9. The instantaneous interruption detection circuit 4 detects the instantaneous interruption and recovery from the instantaneous interruption from the power fluctuation of the input analog modulation signal, etc., and outputs this detection signal to the interpolation circuit 8 and the switch 9.
This delay storage circuit 6 stores the input signal from the PCM encoder 5 with a delay of approximately To time (for example, 30 msec), and stores the input signal from the PCM encoder 5 with a delay of approximately T1
It is output to the pitch cycle detection circuit 7 for each cycle. This pitch cycle detection circuit 7 detects the presence or absence of a pitch cycle in the current input signal from the past signal delayed and stored in the delay memory circuit 6 every T cycles, and if there is a pitch cycle, detects the pitch cycle. The detected pitch period or non-periodic information is output to the interpolation circuit 8. This interpolation circuit 8 inputs a signal Z inputted from the instantaneous interruption detection circuit 5 indicating the moment of instantaneous interruption, and when this signal V indicates a pitch period, outputs the pitch period to the delay storage circuit 6. Then, from this delay memory circuit 6, the memory contents from the time of the instantaneous interruption to the time before the pitch period are inputted.
Then, the interpolation circuit 8 repeats the stored contents starting from the oldest one at pitch intervals until the momentary interruption is recovered, and outputs it to the switch 9. On the other hand, when the signal V indicates no period, the interpolation circuit 8 outputs T2 (for example, 2 msec) to the delay storage circuit 6,
The memory contents of T2 hours before the moment of the instantaneous interruption are input from the delay memory circuit 6, and the stored contents are repeated in the T2 period starting from the oldest until the instantaneous interruption is recovered, and the signal Y is sent to the switch 9.
Output to.

The switch 9 connects the PCM decoder 10 and the interpolation circuit 8 while the signal Z indicates a momentary interruption, and connects the PCM decoder 10 and the PCM decoder 5 while the signal Z does not indicate an instantaneous interruption. As described above, while there is no instantaneous interruption, the signal demodulated by the amplification/demodulation circuit 4 is PCM code-decoded and output to the output terminal 3, while the signal from the moment of instantaneous interruption to before the pitch period is old. The signals are sequentially output via switch 9 to the PCM decoder every pitch period.

In addition, if the signal has no period at the moment of momentary interruption, T
The signals up to 2 hours ago are sent to the PC via Switch 9 in the order of oldest signals.
It is repeatedly output to the M decoder 10 every T2 period. PC
Since the M decoder simply decodes the signal input via the switch 9, an audio signal from which momentary interruption noise has been removed is outputted to the output terminal 2 at the moment of an interruption. Figure 2 shows the signals of each part of this circuit. However, in FIG. 2, X is the output of the amplification/demodulation circuit 3, Z is the output of the instantaneous interruption detection circuit 4, Y is the output of the interpolation circuit 8, W is the output of the PCM decoder 10, P is the pitch period, and BR indicates the period of momentary interruption. However, the conventional circuit shown in FIG. 1 requires a pitch period detection circuit and a TO time delay storage capacity, which has the disadvantage of increasing the size of the circuit configuration. Therefore, the present invention aims to improve the above-mentioned drawbacks of the prior art, and its purpose is to provide a momentary power failure interpolation receiving device using a simplified circuit. Interpolation is performed based on the sample values of .

Examples will be described below with reference to the drawings. Figure 3 shows part 1 of the present invention.
FIG. 3 is a block diagram of the circuit configuration of the embodiment.

This example shows an example in which the input signal to the input terminal 1 is a signal obtained by analog modulating an audio signal using FM or the like. In the figure, 1 is an input signal terminal, 2 is an output signal terminal, and 11 is an amplification/demodulation circuit (which demodulates an audio signal modulated by AM, FM, etc.), which inputs from 1 and outputs to 13. 13 is A/
A D converter (either linear PCM, 4 non-linear PCM, etc.) is inputted from 11 and outputted to 14 and 16.

17 is a D/A converter compatible with A/D conversion;
It is input from and output to output terminal 2.

12 is a momentary interruption detection circuit, which receives input from input terminal 1 and outputs 1
Output to 4 and 16.

14 is a storage circuit that stores the value of one sampling interval and outputs it with a delay of one sampling time;
4. Input from momentary interruption detection circuit 12 and output to 15.

15 is an interpolation circuit, which receives input from the memory circuit 14 and
is output to 16.

16 is a switch, which inputs the signal from the A/D converter 13 and the instantaneous interruption detection circuit 12 and outputs it to the D/A converter 17.

Also, E, A, B, C, and D are 11, 13, 14, and 1, respectively.
5 and 12 output signals. Next, the operation of the circuit shown in FIG. 3 will be explained.

The analog modulated signal such as FM input to input terminal 1 is
It is demodulated into an analog audio signal by the amplification and demodulation circuit 11, and A
/D converter 13. A/D converter 13 converts the audio signal into a PCM signal and sends it to storage circuit 14 and switch 1.
Output to 6. The instantaneous interruption detection circuit 12 detects instantaneous interruptions and recovery from instantaneous interruptions from power fluctuations of the input analog modulated signal, and outputs the detection signals to the storage circuit 14 and the switch 16.
Assume that there is no instantaneous interruption. At this time, the memory circuit 14
The output signal of converter 13 is stored. Switch 16 is A/
The output signal A of the D conversion circuit 13 is output to the D/A conversion circuit 17, and the D/A converter 17 demodulates the output signal of the A/D converter 13 into an analog audio signal and outputs it to the output terminal 2.
Suppose now that an instantaneous interruption occurs in the input signal.

At this time, the instantaneous interruption detection circuit 15 detects the instantaneous interruption and outputs this instantaneous interruption signal D to the storage circuit 14 and the switch 16. Upon receiving the instantaneous interruption signal D, the storage circuit 14 stops storing the output signal A of the A/D conversion circuit 13, writes and stores the interpolator output signal C, and interpolates the signal B. Output to circuit 15. The interpolation circuit 15 linearly transforms the input signal B by performing one digital operation. That is, the input signal is α
Multiply, add or subtract by δ, and output. Therefore,
The output signal c! of the interpolation circuit 15! '1tc=α·B±δ (Soil is changed depending on each sampling time. For example, + is repeated for each sampling cycle. δ is small compared to the input power range). In this example, consider the case where α=0.9 and δ−0. At this time, the switch 16 receives the instantaneous interruption signal D and outputs the interpolation signal C to the D/A converter 17. D/
The A converter 17 interpolates the audio signal based on the interpolation signal C and outputs the interpolated audio signal. Therefore, within the instantaneous interruption time, C=α·B+δ or C=α·B−δ is output. When the momentary interruption recovers,
The instantaneous interruption detection circuit 12 detects when the instantaneous interruption has been recovered, and outputs this information D to the storage circuit 14 and the switch 16. At this time, the memory circuit 14 and the switch 16 return to the state before pulsation, and demodulate and output a signal A obtained by A/D converting the received signal. As described above, since interpolation is performed during the instantaneous interruption time based on one sample value, this is particularly effective when the instantaneous interruption period is short, and the circuit scale can be significantly reduced.

Furthermore, since the level of the interpolation signal decreases over time, interpolation noise can be reduced even during long-term interruptions or voice pauses. FIG. 4 shows the signals of this circuit described above. FIG. 5 particularly shows an enlarged view of the output signal portion during the instantaneous interruption time. In FIGS. 4 and 5, E is the output of the amplification/demodulation circuit 11, D is the output of the instantaneous interruption detection circuit 12, D is the output of the instantaneous interruption detection circuit 12, BR is the instantaneous interruption period, and w is D/A. The output of the conversion circuit 17, T, indicates the sampling period. A in Figure 5
, indicates that the amplitude is X at the sample value just before the momentary interruption, and A
2 is the first sample value after the instantaneous interruption, and the amplitude is α. , and the amplitude of the second sample value A2 during the momentary interruption is α・(αx)−
It becomes α2x. FIG. 6 shows another configuration example of the present invention, in which the input signals are FM, . An analog modulated signal such as AM, and A
A /D converter is one embodiment of a differential encoder (ΔM, DPCM, etc.). In the figure, 1 is an input signal terminal, 2 is an output signal terminal, and 18 is an amplification/demodulation circuit (which demodulates an audio signal modulated by AM, FM, etc.), which inputs from 1 and outputs to 20.

20 is an A/D converter (here, the case where a ΔM encoder is used) is inputted from 1 and outputted to 22.

23 is a D/A converter facing the A/D converter 20, which inputs the signal from 22 and outputs it to the output terminal 2.

Reference numeral 19 denotes a momentary interruption detection circuit, which inputs the signal from the input terminal 1 and outputs it to the switch 22.

21 is an interpolation circuit, which outputs to the switch 22.

22 is a switch which receives input from the A/D converter 20, interpolation circuit 21, and instantaneous interruption detection circuit 19 and outputs it to the D/A converter 23.

Next, the operation of the circuit shown in FIG. 6 will be explained.

An analog modulated signal such as FM input to the input terminal 1 is demodulated into an analog audio signal by the amplification and demodulation circuit 18, and then
It is output to the D converter 20. The A/D converter 20 converts the audio signal into a ΔM signal and outputs it to the switch 22. The instantaneous interruption detection circuit 19 detects instantaneous interruptions and recovery from instantaneous interruptions from power fluctuations of the input analog modulated signal, and outputs this detection signal to the switch 22. Assume that there is no interruption at this moment.

The switch 22 outputs the output signal of the A/D conversion circuit 20 to the D/A conversion circuit 23, and the D/A converter 23 demodulates the output signal of the A/D converter 20 into an analog audio signal and outputs it to the output terminal 2. Output. Next, assume that a momentary interruption occurs in the input signal.

At this time, the instantaneous interruption detection circuit 19 detects the instantaneous interruption and outputs this instantaneous interruption signal D to the switch 22. The interpolation circuit 21 outputs 1 and -1 indicating one quantization step of the difference signal (ΔM) at every sampling period. (In this example, a circuit that alternately outputs 1 and -1 is taken as an example.)
In response to this, the output signal is switched to the input signal from the interpolation circuit 21 and outputted to the D/A converter 23. The D/A converter 23 demodulates the output signal of the switch 16 into an input analog signal and outputs the input analog signal. When the instantaneous interruption recovers, the instantaneous interruption detection circuit detects recovery from the instantaneous interruption and transmits this information to the switch.

The switch converts the output of the A/D converter 20 into the D/A converter 23.
Output to. Therefore, the output signal during the instantaneous interruption time becomes as shown in FIG. Here, ρ is the △M integration time constant, and δ is the △M quantization step. In this embodiment, a configuration in which interpolation is performed using the △M encoded signal has been described, but instead of △M, the DPCM code The same thing can be done using .

FIG. 8 is a block diagram of a circuit configuration of still another embodiment of the present invention. This example is an example of a circuit configuration in which the input signal to the input terminal 1 is a signal obtained by PCM encoding an audio signal and modulating it with PM or the like. In this figure, 1 is an input signal terminal, 2 is an output signal terminal, and 24 is an amplification/demodulation circuit (FM.
PCM (nonlinear PCM) is a signal obtained by modulating a PCM signal with AM, etc.
Either CM or linear PCM is fine))
input from 1 and output to 28.

29 is a D/A converter (decoder compatible with the PCM encoding method) which inputs the signal from 28 and outputs it to the output terminal 2.

25 is an instantaneous interruption detection circuit which inputs from 1 and outputs to 26 and 28.

26 is a storage circuit (having a storage capacity of one sample value) which receives input from the amplification/demodulation circuits 24 and 26 and the instantaneous interruption detection circuit 25;
Output to.

27 is an interpolation circuit which manually inputs the data from the memory circuit and outputs it to 26 and 28.

28 is a switch that inputs from 24, 27, and 25 and outputs to 29.

Also, symbols K, L, M, and N in this figure are 25, 26, and 27, respectively.
, 24. Next, the operation of the circuit shown in FIG. 8 will be explained. A modulated signal such as FM inputted to the input terminal 1 is demodulated into a PCM signal by the amplification/demodulation circuit 24 and outputted to the storage circuit 13 and the switch 28 . The A/D converter converts the audio signal into a PCM signal and outputs it to the storage circuit 13 and switch 16. The instantaneous interruption detection circuit 15 detects instantaneous interruptions and recovery from instantaneous interruptions from power fluctuations of the input analog modulated signal, and outputs this detection signal to the storage circuit 26 and the switch 28. Assume that there is no instantaneous interruption.

At this time, the memory circuit 13 stores the output PC of the amplification and demodulation circuit 24.
Store the M signal. The switch 28 outputs the output signal N of the amplification/demodulation circuit 24 to the D/A conversion circuit 29, and the D/A converter demodulates the output signal of the A/D converter into an analog audio signal and outputs it to the output terminal 2. . Suppose now that an instantaneous interruption occurs in the input signal.

At this time, the instantaneous interruption detection circuit 25 detects an instantaneous interruption and outputs this information to the memory circuit 26 and switch 28. At this time, the memory circuit 26 receives the instantaneous interruption signal K, stops storing the output signal of the amplification/demodulation circuit 24, inputs the interpolator output signal M, stores it in memory, and outputs the signal L. do. The interpolation circuit 27 digitally multiplies the input signal L by ♂, adds or subtracts the signal by ♂, and outputs the resultant signal. Therefore, the output signal M of the interpolation circuit is N=♂Mf (d is changed depending on each sampling time point. For example, + and - are repeated at each sampling period. D is small compared to the input card dynamics range). .
). At this time, the switch 28 switches in response to the instantaneous interruption signal K and outputs the interpolated signal M to the D/A converter 29.

Therefore, within the instantaneous interruption time, M=♂・L+g or M=♂・
L-ge is output. When the momentary interruption is recovered, the momentary interruption detection circuit 25 detects recovery from the momentary interruption and outputs this information K to the storage circuit 26 and the switch 28.

At this time, the memory circuit 26 and the switch 28 return to the state before the momentary interruption, and the signal N obtained by amplifying and demodulating the received signal is transferred to the switch 2.
8. Demodulate into an analog signal via the D/A conversion circuit 29 and output. As mentioned above, this circuit demodulates the received PCM signal as it is to obtain the audio signal when there is no instantaneous interruption, and when there is an instantaneous interruption, it performs interpolation based on the sample value stored in the memory circuit. It is possible to suppress noise and obtain audio signals.

The difference between this example and the example shown in Fig. 3 is that the circuit shown in Fig. 3 transmits an analog audio signal and performs PCM encoding and interpolation on the receiving side, whereas in this example, the analog audio signal is encode, P
The point is that a CM signal is transmitted and interpolation is performed on the receiving side based on this PCM signal.

Instead of interpolating the demodulated audio signal using a differentially encoded signal on the receiving side as in the application example shown in Fig. 6, the transmitted signal is received by performing differentially encoding on the transmitting side as in the PCM described above. The present invention can also be implemented with a circuit configuration that performs interpolation using signals. Note that ±δ (±δ″) is the amount necessary for simplifying the circuit in the case of a △M encoder, and in the case of a △M encoder, it is a 1-bit signal, and generally +δ for 1 of △M , △M
-1 corresponds to one δ and is decoded.

There is no logical problem in interpolating 0 instead of ±δ in the △M decoder during momentary interruption, but an analog circuit that outputs 0 instead of ±δ only in case of momentary interruption is added to the △M decoder. However, it is easy to add a digital circuit to the ΔM decoder for alternately outputting ±δ during momentary interruptions. Therefore, the interpolation circuit according to the present invention is configured to repeatedly output +/-[delta] at each sampling period. As described above, according to the present invention, interpolation during the instantaneous interruption time of the received audio signal is performed based only on the previous sampled coded signal or without depending on the sampled coded signal. Since interpolation is performed, the circuit scale can be significantly reduced, which has the advantage of being economical.Furthermore, interpolation can be easily performed even when the instantaneous interruption length spans a plurality of bits.

In particular, in the present invention, since the level of the interpolation signal decreases over time, interpolation noise can be reduced even during a long momentary interruption or pause period of the voice.

[Brief explanation of drawings]

Figure 1 is a circuit configuration diagram of a conventional interpolation receiving device during momentary interruptions;
1 is an operating waveform diagram of the device shown in FIG. 1, FIG. 3 is a circuit configuration diagram of an embodiment of the instantaneous power failure interpolation receiving device according to the present invention, FIG. 4 is an operating waveform diagram of the device shown in FIG. 3, and FIG. The figure is a partially enlarged view of FIG. 4, FIG. 6 is a circuit diagram of another embodiment of the momentary interruption interpolation receiving device according to the present invention, FIG. 1 is an example of the output signal of the device of FIG. 6, and FIG. FIG. 8 is a circuit configuration diagram of still another embodiment of the instantaneous interruption interpolation receiving device according to the present invention. 1...Input terminal, 2...Output terminal, 3
......Amplification demodulation circuit, 4...Momentary interruption detection circuit, 5...PCM encoder, 6...Delay storage circuit, 7...・Pitch detection circuit, 8...
...Interpolation circuit, 9...Switch, 10...
...PCM decoder, 11...Amplification demodulation circuit, 1
2... Momentary power failure detection circuit, 13... A/D
Converter, 14... Memory circuit, 15...
Interpolation circuit, 16... Switch, 17...
・D/A converter, 18...1 amplification demodulation circuit, 19
...Momentary power failure detection circuit, 20...A/D converter, 21...Interpolation circuit, 22...Switch, 23... D/A converter, 24...
...Amplification demodulation circuit, 25...Momentary interruption detection circuit, 2
6... Memory circuit, 27... Interpolation circuit,
28...Switch, 29...D/A converter.

Claims (1)

[Scope of Claims] 1. An instantaneous interruption interpolation receiving device in voice communication, comprising: an instantaneous interruption detection circuit that detects when an instantaneous interruption occurs in a signal and when the instantaneous interruption is recovered; a means for sampling and encoding an audio signal; circuit and
a storage circuit that stores the output of the encoded signal in non-momentary interruptions and the output of the interpolation circuit in accordance with the output of the instantaneous interruption detection circuit for one sampling period, and outputs the stored signal to the interpolation circuit; a switch that selects the encoded signal when there is no momentary interruption according to the output of the momentary interruption detection circuit and selects the output of the interpolation circuit when there is an instantaneous interruption; and means for demodulating the output of the switch; is C=α・B±δ C: Output B of the interpolation circuit; Input α of the interpolation circuit; Constant δ of 0<α<1; Constant ± that is small compared to the input dynamic range; ± is repeated every sampling period What is claimed is: 1. A voice interpolation reception device for instantaneous voice interruptions, characterized in that a sample value before an instantaneous interruption of an input signal is subjected to linear transformation and outputted.