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JPS592176B2 - Assembly method of power semiconductor device - Google Patents
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JPS592176B2 - Assembly method of power semiconductor device - Google Patents

Assembly method of power semiconductor device

Info

Publication number
JPS592176B2
JPS592176B2 JP53113481A JP11348178A JPS592176B2 JP S592176 B2 JPS592176 B2 JP S592176B2 JP 53113481 A JP53113481 A JP 53113481A JP 11348178 A JP11348178 A JP 11348178A JP S592176 B2 JPS592176 B2 JP S592176B2
Authority
JP
Japan
Prior art keywords
semiconductor chip
semiconductor device
power semiconductor
assembly method
header
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53113481A
Other languages
Japanese (ja)
Other versions
JPS5539682A (en
Inventor
一義 後藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP53113481A priority Critical patent/JPS592176B2/en
Publication of JPS5539682A publication Critical patent/JPS5539682A/en
Publication of JPS592176B2 publication Critical patent/JPS592176B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/381Auxiliary members

Landscapes

  • Die Bonding (AREA)
  • Dicing (AREA)

Description

【発明の詳細な説明】 本発明は電力用半導体装置の組立方法に関する。[Detailed description of the invention] The present invention relates to a method for assembling a power semiconductor device.

従来電力用半導体装置は第1図に示す如くヘッダー1上
にモリブデン板2を介して半導体チップ3を半田等のろ
う材4で固着して組立ていた。斯る構造では大面積の半
導体チップ3とヘッダー10との熱膨脹係数の差をモリ
ブデン板2で軽減している。しかしモリブデン板2は非
常に高価であり省くことが望ましい。本発明は斯点に鑑
みてなされたものであV、モリブデン板を除去した電力
用半導体装置の組立方法を提供するものである。
Conventionally, a power semiconductor device has been assembled by fixing a semiconductor chip 3 on a header 1 via a molybdenum plate 2 with a brazing material 4 such as solder, as shown in FIG. In this structure, the molybdenum plate 2 reduces the difference in coefficient of thermal expansion between the large-area semiconductor chip 3 and the header 10. However, the molybdenum plate 2 is very expensive and it is desirable to omit it. The present invention has been made in view of this point, and provides a method for assembling a power semiconductor device in which the molybdenum plate is removed.

以下に本発明の一実施例を第2図乃至第4図を参照して
詳述する。本発明に用いる半導体チップ10の上面図を
第2図に示す。半導体チップ10ぱ4個の分割パターン
11・・・11を有しておわ、各パターン11・・・1
1の境界を分割できる構造となつている。各分割パター
ン11・・・11は熱膨脹係数の差からすると一辺7−
以下であることが望ましい。斯る半導体チップ10は第
3図に示される如く、ヘッダー12上に半田等のろう材
13で固着される。
An embodiment of the present invention will be described in detail below with reference to FIGS. 2 to 4. FIG. 2 shows a top view of the semiconductor chip 10 used in the present invention. The semiconductor chip 10 has four divided patterns 11...11, each pattern 11...1.
The structure is such that the boundaries of 1 can be divided. Each division pattern 11...11 has one side of 7-
The following is desirable. As shown in FIG. 3, such a semiconductor chip 10 is fixed onto a header 12 with a brazing material 13 such as solder.

この際充分に徐冷を行いシリコンとヘッダー゛12との
熱膨脹係数の差により生ずるストレスを吸収させなけれ
ばならない。然る後第4図に示すj如く回転する薄いダ
イヤモンドホィール等によつて半導体チップ10の各分
割パターン11・・・11の境界上に半導体チップ10
を分割する切り溝14を形成し、半導体チップ10を各
分割バター゛ン11・・・11に従つて複数に分割する
。更に前述したろう付けの際のストレスを除去するため
に洗’浄後再加熱し、各分割パターン11・・・11毎
に外部リードとの電気的接続を行う。以上に詳述した如
く本発明に依れば大面積の半導体チップを複数個に分割
するため、性能上は大電力を扱え、熱的ストレスを考え
ると小面積であるのであまわ問題とならないのである。
At this time, sufficient slow cooling must be performed to absorb the stress caused by the difference in thermal expansion coefficients between the silicon and the header 12. After that, the semiconductor chip 10 is placed on the boundary of each divided pattern 11...11 of the semiconductor chip 10 by a rotating thin diamond wheel or the like as shown in FIG.
A kerf 14 is formed to divide the semiconductor chip 10 into a plurality of pieces according to the dividing patterns 11 . . . 11 . Furthermore, in order to remove the stress during brazing described above, it is reheated after cleaning, and electrical connections with external leads are made for each divided pattern 11...11. As detailed above, according to the present invention, a large-area semiconductor chip is divided into multiple pieces, so in terms of performance, it can handle a large amount of power, and when considering thermal stress, it is not a problem because the area is small. be.

従つて熱的ストレスを軽減できることによりモリプテン
板が不要となク大巾な価格低下ができる。
Therefore, by being able to reduce thermal stress, a molypten board is no longer necessary, resulting in a significant price reduction.

【図面の簡単な説明】[Brief explanation of drawings]

第1図ぱ従来例を説明する断面図、第2図は本発明に用
いる半導体チップを説明する上面図、第3図及び第4図
ぱ本発明を説明する断面図である。 10は半導体チップ、11は分割パターン、12はヘッ
ダー、13ぱろう材、14は切り溝である。
FIG. 1 is a sectional view illustrating a conventional example, FIG. 2 is a top view illustrating a semiconductor chip used in the present invention, and FIGS. 3 and 4 are sectional views illustrating the present invention. 10 is a semiconductor chip, 11 is a division pattern, 12 is a header, 13 is a wax material, and 14 is a cut groove.

Claims (1)

【特許請求の範囲】[Claims] 1 複数の分割パターンを有する半導体チップをヘッダ
ー上にろう付した後前記半導体チップを分割パターンに
従つて切り溝で複数に分割し、各分割パターンに外部リ
ードとの電気的接続を行うことを特徴とする電力用半導
体装置の組立方法。
1. A semiconductor chip having a plurality of division patterns is brazed onto a header, and then the semiconductor chip is divided into a plurality of parts by grooves according to the division patterns, and each division pattern is electrically connected to an external lead. A method for assembling a power semiconductor device.
JP53113481A 1978-09-12 1978-09-12 Assembly method of power semiconductor device Expired JPS592176B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53113481A JPS592176B2 (en) 1978-09-12 1978-09-12 Assembly method of power semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53113481A JPS592176B2 (en) 1978-09-12 1978-09-12 Assembly method of power semiconductor device

Publications (2)

Publication Number Publication Date
JPS5539682A JPS5539682A (en) 1980-03-19
JPS592176B2 true JPS592176B2 (en) 1984-01-17

Family

ID=14613367

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53113481A Expired JPS592176B2 (en) 1978-09-12 1978-09-12 Assembly method of power semiconductor device

Country Status (1)

Country Link
JP (1) JPS592176B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS577148A (en) * 1980-06-16 1982-01-14 Mitsubishi Electric Corp Semiconductor module
US4615070A (en) * 1984-08-27 1986-10-07 Tennant Company Sweeper with speed control for brush and vacuum fan
JPH088765Y2 (en) * 1989-09-09 1996-03-13 株式会社ササキコーポレーション Floor washer
JP2529843Y2 (en) * 1990-09-26 1997-03-19 アマノ株式会社 Traveling cleaning truck

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4881769U (en) * 1971-12-29 1973-10-05

Also Published As

Publication number Publication date
JPS5539682A (en) 1980-03-19

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