JPS5928315B2 - vertical deflection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a vertical deflection circuit suitable for cathode ray tube display devices such as television receiver computers.

FIG. 1 is a circuit diagram showing a conventional vertical deflection circuit, and FIG. 2 is a voltage waveform diagram of its main parts.

Reference numeral 1 denotes a switching transistor which is turned on and off by an input pulse shown in FIG. 2A applied to the input terminal A.

The transistor 2 constitutes a constant current circuit together with the resistors 3, 4, 5 and the diode 10, and generates a sawtooth wave voltage shown in FIG. 2B across the capacitor 6. This is amplified by a differential amplifier 7, and a sawtooth wave current is passed through the vertical deflection coil 8 of the cathode ray tube. Here, 9 is a current feedback resistor, which feeds back the voltage across both ends shown in FIG. There is. In other words, due to the frequency characteristics of the differential amplifier 7, the sawtooth wave current flowing through the deflection yoke 8 has a gentler slope in the latter half, as shown in Figure 2C, and the phenomenon in which the upper part of the screen of the cathode ray tube is extended and the lower part is contracted is caused by I can't avoid it. For this purpose, the voltage generated across the resistor 9 is fed back to distort the input voltage of the differential amplifier 7 as shown in FIG. 2B, and the current flowing through the deflection yoke 8 is As shown in C, it is made to be vertically symmetrical. The reason why the current is curved with respect to the straight line A is because of the S-curve correction. Such conventional circuits have the following drawbacks. When the input impedance of the differential amplifier 7 is low, linearity deteriorates more at the end of scanning than at the start of scanning (the waveform becomes duller) due to the time constant caused by the capacitor 6 and this input impedance. Since the differential amplifier 7 has nonlinear distortion inherent in the amplifier, the deterioration in linearity of the sawtooth waveform is further increased.

In order to correct these non-linear distortions, an old band is applied to the transistor 7 via the resistor 5, and the input waveform of the differential amplifier 7 is corrected so that it has a distortion opposite to the above-mentioned non-linear distortion. Ru. However, the lower the input impedance of the differential amplifier T and the greater the nonlinear distortion, the greater the amount of positive feedback and the easier it is to oscillate.

Therefore, if an amplifier with high input impedance and low nonlinear distortion is used as the differential amplifier 7, the above positive feedback will result in the upper part of the screen (the first half of the vertical scanning period) and the lower part of the screen (the second half of the vertical scanning period). Appropriate S-curve correction cannot be performed for both. This is because the positive feedback has the effect of shrinking the upper part of the screen and stretching the lower part of the screen. For example, if the amount of positive feedback is determined so that an appropriate S-shaped correction is performed at the upper part of the screen, the lower part of the screen will be stretched too much. The purpose of the present invention is to eliminate the above-mentioned drawbacks of the prior art,
An object of the present invention is to provide a vertical deflection circuit capable of correcting the elongation of the upper part of a screen, which is a problem when using a differential amplifier with good performance. An emitter follower circuit is added to a sawtooth wave voltage generation circuit consisting of a transistor and a capacitor that operates as a constant current source during vertical scanning to increase the output impedance, and a resistor is also added to the collector to generate a voltage and a constant current source. The VBE compensating diode of the base bias circuit of the transistor is used to correct only the first half of the vertical scanning return interval.

The present invention will be explained below with reference to FIGS. 3 and 4.

FIG. 3 is a circuit diagram showing an embodiment of the present invention, and FIG. 4 is a voltage waveform diagram of the main part thereof. Transistor 2 is resistor 3,
4, 5 and a bias circuit including a temperature compensation diode 10 for VBE, constitute a constant current circuit.

Further, a constant driving voltage is supplied to the terminal B. A capacitor 6 for generating a sawtooth voltage is connected between the collector of the transistor 2 and ground, and a switching diode 13 is connected between the collector and the signal input terminal A. The pulse shown in FIG. 4A is input to input terminal A,
A sawtooth wave voltage shown in FIG. 4B is generated at the collector of transistor 2. This voltage is input to the differential amplifier 7 via the transistor 11 which operates as an emitter follower. Since the transistor 11 operates as an emitter follower, it acts as a high input impedance element and blunts the sawtooth waveform in the latter half of the vertical scanning period to the extent that proper S-shaped correction is applied in the latter half of the vertical scanning period without positive feedback correction. The fourth voltage generated in the collector resistor 13 connected between the collector of the transistor 11 and the power supply terminal B
The sawtooth wave voltage of Figure C is fed back to the cathode of diode 10 through capacitor 14. Since the capacitor 14 acts as a battery, the latter half of the collector potential of the transistor 11 is actually cut off by the clamping action of the diode 10, resulting in a voltage waveform as shown in FIG. 4C.
Therefore, the base potential of the transistor 2 is modulated by the sawtooth voltage only in the first half of the scanning period, that is, positive feedback is performed only in the first half of the scanning return period, and the potential of the capacitor 6 is changed during the scanning period as shown in FIG. The slope in the first half is gentle. The input waveform of the differential amplifier 7 is also the same waveform, and works to suppress the growth of the first half of the screen, that is, the bottom part, and has no effect on the second half, that is, the bottom part of the screen. As is clear from the above explanation, the present invention has a simple configuration and can suppress only the expansion of the upper part of the screen without having anything to do with the lower part of the screen. Therefore, the feedback factor of the differential amplifier is increased and the vertical deflection circuit is It is possible to eliminate the problem of inappropriate S-shaped correction at the bottom of the screen (screen stretching) when attempting to improve stability. Further, since the emitter follower circuit is provided, there is no problem even when the input impedance of the differential amplifier 7 is low. Further, the amount of correction can also be arbitrarily adjusted by changing the value of the collector resistor 13.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing a conventional vertical deflection circuit, Figure 2A,
B and C are waveform diagrams showing the voltage waveforms of the main parts, FIG. 3 is a circuit diagram showing an embodiment of the vertical deflection circuit according to the present invention, and FIGS. FIG. 2: Constant current source transistor, 3, 4, 5: Bias resistor of transistor 2, 10: Transistor 2VBE temperature compensation diode-11: Emitter follower transistor, 13: Collector resistor, 14: Coupling capacitor.

Claims (1)

[Claims] 1 A current source transistor, a sawtooth wave generating capacitor connected to the collector of this transistor, a base bias circuit consisting of a resistor and a diode connected to the base of this transistor, and a vertical deflection coil are connected. an amplifier, an emitter follower transistor that supplies the sawtooth voltage generated in the capacitor to the amplifier, a collector resistor provided at the collector of the emitter follower transistor, and a connection point between the resistor and the diode of the base bias circuit; and a capacitor connected between the collector and the emitter-follower transistor.