JPH078009B2 - Vertical deflection correction circuit - Google Patents
Vertical deflection correction circuitInfo
- Publication number
- JPH078009B2 JPH078009B2 JP60191726A JP19172685A JPH078009B2 JP H078009 B2 JPH078009 B2 JP H078009B2 JP 60191726 A JP60191726 A JP 60191726A JP 19172685 A JP19172685 A JP 19172685A JP H078009 B2 JPH078009 B2 JP H078009B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- sine wave
- wave signal
- vertical deflection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
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- Video Image Reproduction Devices For Color Tv Systems (AREA)
- Details Of Television Scanning (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明はビデオプロジェクタ等に使用して好適な垂直偏
向補正回路に関する。The present invention relates to a vertical deflection correction circuit suitable for use in a video projector or the like.
本発明はビデオプロジェクタ等に使用して好適な垂直偏
向補正回路に於いて、垂直周期のサイン波信号を画面中
央部に対応する零クロス点の傾斜が略零となるように波
形整形し、その後に前半部と後半部とに分割し、夫々利
得調整して画面の前半部及び後半部のＳ字補正信号を得
る様にし、良好なＳ字補正ができる様にすると共に画面
中央部での横線の発生がなくなる様にしたものである。The present invention, in a vertical deflection correction circuit suitable for use in a video projector or the like, shapes a waveform of a sine wave signal of a vertical cycle so that the slope of a zero cross point corresponding to the center of the screen becomes substantially zero, and thereafter It is divided into the first half and the second half, and gain adjustments are performed respectively to obtain S-shaped correction signals of the first half and the second half of the screen so that good S-shaped correction can be performed and a horizontal line at the center of the screen can be obtained. Is to eliminate the occurrence of.
先に３管式のカラープロジェクタが市販されている。斯
るカラープロジェクタの垂直方向のＳ字補正信号として
従来サイン波が利得調整されて使用されていたが、第６
図に示す如く、映像画面（１）に於いて、その前半部の
補正量ａと後半部の補正量ｂとが、それぞれの対応位置
に於いて相異する場合が屡々あり、従来第７図に示す如
くこの前半部と後半部の補正量を変える様にしたものが
提案されている。即ち第７図に於いて、（２）は第８図
Ａに示す如き垂直周期Ｖの信号を発振する垂直周期発振
器を示し、この垂直周期発振器（２）の出力信号を鋸歯
状波発生回路（３）に供給し、この鋸歯状波発生回路
（３）の出力側に第８図Ｂに示す如き垂直周期Ｖの鋸歯
状波信号を得る。この第７図に於いてはこの鋸歯状波発
生回路（３）の出力側に得られる鋸歯状波信号を夫々利
得調整器（4R），（4G）及び（4B）を介して３管式のカ
ラープロジェクタを構成する赤、緑及び青陰極線管（5
R），（5G）及び（5B）の夫々の垂直偏向コイル（6
R），（6G）及び（6B）に画サイズ調整信号として供給
する。この場合利得調整器（4R），（4G）及び（4B）の
夫々の利得を調整することにより夫々の陰極線管（5
R），（5G）及び（5B）の夫々の画サイズを調整するこ
とができる。またこの鋸歯状波発生回路（３）の出力の
鋸歯状波信号を積分回路（７）に供給し、この積分回路
（７）の出力側に第８図Ｃに示す如き垂直周期のパラボ
ラ信号を得、このパラボラ信号を積分回路（８）に供給
し、この積分回路（８）の出力側に第８図Ｄに示す如き
垂直周期のサイン波信号を得、このサイン波信号をこの
サイン波信号の前半部（第８図Ｅ）及び後半部（第８図
Ｆ）に分割する分割回路（９）に供給し、この分割回路
（９）の前半部出力端子（9a）に得られる第８図Ｅに示
す如きサイン波前半信号を利得制御器（10R），（10G）
及び（10B）を夫々介して赤、緑及び青陰極線管（5
R），（5G）及び（5B）の夫々の垂直偏向コイル（6
R），（6G）及び（6B）に夫々供給し、また分割回路
（９）の後半部出力端子（9b）に得られる第８図Ｆに示
す如きサイン波後半信号を利得調整器（11R），（11G）
及び（11B）を夫々介してこの陰極線管（5R），（5G）
及び（5B）の夫々の垂直偏向コイル（6R），（6G）及び
（6B）に夫々供給する如くする。First, a three-tube type color projector is commercially available. Conventionally, a sine wave has been gain-adjusted and used as an S-shaped correction signal in the vertical direction of such a color projector.
As shown in the figure, in the video screen (1), the correction amount a of the first half portion and the correction amount b of the second half portion are often different at their corresponding positions, which is conventionally shown in FIG. It has been proposed that the correction amounts of the first half and the second half are changed as shown in FIG. That is, in FIG. 7, (2) shows a vertical period oscillator that oscillates a signal having a vertical period V as shown in FIG. 8A. The output signal of this vertical period oscillator (2) is a sawtooth wave generation circuit ( 3), and a sawtooth wave signal having a vertical period V as shown in FIG. 8B is obtained at the output side of the sawtooth wave generation circuit (3). In FIG. 7, the saw-tooth wave signal obtained at the output side of the saw-tooth wave generation circuit (3) is fed into a three-tube type through gain adjusters (4R), (4G) and (4B), respectively. Red, green and blue cathode ray tubes (5
R), (5G) and (5B) vertical deflection coils (6
R), (6G) and (6B) are supplied as image size adjustment signals. In this case, by adjusting the respective gains of the gain adjusters (4R), (4G) and (4B), the respective cathode ray tubes (5
Each image size of R), (5G) and (5B) can be adjusted. Further, the sawtooth wave signal output from the sawtooth wave generation circuit (3) is supplied to the integrator circuit (7), and a parabolic signal having a vertical cycle as shown in FIG. 8C is output to the output side of the integrator circuit (7). Then, this parabolic signal is supplied to the integrating circuit (8), a sine wave signal having a vertical cycle as shown in FIG. 8D is obtained at the output side of the integrating circuit (8), and this sine wave signal is converted to this sine wave signal. 8 which is supplied to a division circuit (9) for dividing the first half portion (FIG. 8E) and the second half portion (FIG. 8F) of the same into the first half output terminal (9a) of this division circuit (9). Gain controller (10R), (10G) for the first half signal of sine wave as shown in E
And (10B) via red, green and blue cathode ray tubes (5
R), (5G) and (5B) vertical deflection coils (6
R), (6G) and (6B), respectively, and the sine wave latter half signal as shown in FIG. 8F obtained at the latter half output terminal (9b) of the dividing circuit (9) as shown in FIG. , (11G)
And cathode ray tubes (5R) and (5G) through (11B), respectively.
And (5B) of the vertical deflection coils (6R), (6G) and (6B), respectively.
斯る第７図に於いては画面（１）の前半部及び後半部の
Ｓ字補正を夫々別々に利得調整器（10R），（10G），
（10B）と（11R），（11G），（11B）とで調整すること
ができるので前半部及び後半部に於いて補正量が相異し
ても良好なＳ字補正を行うことができる。In FIG. 7, the S-shaped corrections of the first half and the second half of the screen (1) are separately adjusted for the gain adjusters (10R), (10G),
Since the adjustment can be made by (10B), (11R), (11G), and (11B), good S-curve correction can be performed even if the correction amounts differ in the first half and the second half.
然しながら斯るこのＳ字補正の為のサイン波信号の分割
点特にこの分割するタイミングが僅かでもずれ例えば分
割回路（９）の出力端子（9a）及び（9b）に得られるサ
イン波前半信号及びサイン波後半信号が第８図Ｇ及びＨ
に示す如くなったときにはこの分割点に対応する画面
（１）上の略中央部に輝度変調による横線が発生する不
都合があった。However, the division point of the sine wave signal for such S-shape correction, especially the timing of the division is slightly deviated, for example, the first half signal of the sine wave and the sine wave obtained at the output terminals (9a) and (9b) of the division circuit (9). The latter half of the wave signal is shown in FIGS.
When it becomes as shown in (1), there is a disadvantage that a horizontal line due to luminance modulation is generated in the substantially central portion on the screen (1) corresponding to this division point.
本発明は斯る点に鑑みＳ字補正信号に依る横線が発生す
ることがないようにすることを目的とする。In view of the above point, the present invention has an object to prevent a horizontal line due to the S-shaped correction signal from being generated.
本発明垂直偏向補正回路は例えば第１図に示す如く垂直
周期のサイン波信号を画面中央部に対応する零クロス点
の傾斜が略零となるように波形整形し、その後にこの前
半部と後半部とに分割し、夫々利得調整して画面の前半
部及び後半部のＳ字補正信号を得るようにしたものであ
る。The vertical deflection correction circuit according to the present invention shapes the waveform of a sine wave signal having a vertical cycle as shown in FIG. 1 so that the slope of the zero cross point corresponding to the center of the screen becomes substantially zero, and thereafter, the first half and the second half. The S-shaped correction signal of the first half and the second half of the screen is obtained by adjusting the gains respectively.
本発明に依ればサイン波信号の画面中央部に対応する零
クロス点の傾斜を略零としているので分割点が僅かにず
れてもその分割点の傾斜は略零であり、この点に於ける
このＳ字補正信号の屈折がなく画面中央部に横線が生ず
ることがない。According to the present invention, since the slope of the zero cross point corresponding to the central portion of the screen of the sine wave signal is set to substantially zero, even if the division point is slightly deviated, the inclination of the division point is substantially zero, and at this point. There is no refraction of the S-shaped correction signal, and no horizontal line is generated in the center of the screen.
以下第１図を参照して本発明垂直偏向補正回路の一実施
例につき説明しよう。この第１図に於いて、第７図に対
応する部分には同一符号を付しその詳細説明は省略す
る。An embodiment of the vertical deflection correction circuit of the present invention will be described below with reference to FIG. In FIG. 1, parts corresponding to those in FIG. 7 are designated by the same reference numerals, and detailed description thereof will be omitted.
この第１図に於いては第３図Ａ（第８図Ｂと同じ）に示
す如き垂直周期の鋸歯状波信号を発生する鋸歯状波発生
回路（３）の出力信号を両波整流回路（12）に供給す
る。この両波整流回路（12）としては第２図Ａに示す如
きオペアンプを使用した全波整流回路（日本電気株式会
社半導体応用技術本部発行「産業用リニアIC1984/198
5」第428頁参照）を使用した。この全波整流回路はダイ
オードD1のカソード波形がVIN≦０の場合 となり、VIN＞０の場合D1がオフとなる為、この電圧は
０となり、この波形とVINを抵抗器R4及びR1を通して、I
C2で電流合成する出力VOUTは第３図Ｂに示す様に鋸歯状
波信号が全波整流された波形となる。この第２図Ａに於
いては抵抗値は R1＝R2＝R3＝R5＝２・R4 の関係とする。In FIG. 1, an output signal of a sawtooth wave generation circuit (3) for generating a sawtooth wave signal having a vertical period as shown in FIG. 3A (same as FIG. 8B) is converted into a double wave rectification circuit ( Supply to 12). As this double-wave rectifier circuit (12), a full-wave rectifier circuit using an operational amplifier as shown in FIG. 2A (issued by NEC Corporation Semiconductor Application Technology Headquarters “Industrial Linear IC 1984/198
5 ”, p. 428) was used. This full-wave rectifier circuit is used when the cathode waveform of diode D 1 is V IN ≤ 0. When V IN > 0, D 1 is turned off, so this voltage becomes 0, and this waveform and V IN are passed through resistors R 4 and R 1 and I
The output V OUT for current synthesis with C 2 has a waveform in which the sawtooth wave signal is full-wave rectified as shown in FIG. 3B. In FIG. 2A, the resistance values are R 1 = R 2 = R 3 = R 5 = 2 · R 4 .
この両波整流回路（12）の第３図Ｂに示す如き全波整流
された鋸歯状波信号を両波整流回路（13）に供給する。
この両波整流回路（13）としては第２図Ｂに示す如く第
２図Ａに示す如き全波整流回路と同様のものを使用す
る。この第２図Ｂと第２図Ａとの相異はIC3の端子に
抵抗器R6及びR7で直流バイアスを加えたことである。こ
れにより第３図Ｃに示す如く出力波形は入力波形に直流
バイアスのシフト分だけ整流されたものである。この場
合、抵抗器R6，R7の値により折り返し幅Ｔが調整でき抵
抗器R8によりこの折り返しのレベルＥが調整できる。こ
の両波整流回路（13）の第３図Ｃに示す如き出力信号を
積分回路（14）に供給する。この場合この積分回路（1
4）の出力側には第３図Ｄに示す如く垂直周期のサイン
波信号の画面中央部に対応する零クロス点の傾斜が略零
のサイン波信号が得られる。この積分回路（14）の出力
側に得られる第３図Ｄに示す如き零クロス点の傾斜が略
零となされたサイン波信号を分割回路（９）に供給し、
この分割回路（９）の出力端子（9a）及び（9b）に得ら
れる画面の前半部及び後半部のＳ字補正信号を得、之等
Ｓ字補正信号を夫々利得調整器（10R），（10G），（10
B）及び（11R），（11G），（11B）を介して夫々利得調
整して陰極線管（5R），（5G），（5B）の垂直偏向コイ
ル（6R），（6G），（6B）に供給する如くする。その他
は従来の３管式カラープロジェクタと同様に構成する。A full-wave rectified sawtooth wave signal as shown in FIG. 3B of the double-wave rectification circuit (12) is supplied to the double-wave rectification circuit (13).
As this double-wave rectification circuit (13), the same full-wave rectification circuit as shown in FIG. 2A is used as shown in FIG. 2B. The difference between FIG. 2B and FIG. 2A is that DC bias is applied to the terminals of IC 3 by resistors R 6 and R 7 . As a result, the output waveform is obtained by rectifying the input waveform by the shift of the DC bias as shown in FIG. 3C. In this case, the folding width T can be adjusted by the values of the resistors R 6 and R 7 , and the folding level E can be adjusted by the resistor R 8 . An output signal of the double wave rectifier circuit (13) as shown in FIG. 3C is supplied to the integrating circuit (14). In this case, this integration circuit (1
At the output side of 4), as shown in FIG. 3D, a sine wave signal having a substantially zero slope at the zero cross point corresponding to the central portion of the screen of the sine wave signal having a vertical period is obtained. The sine wave signal, which is obtained at the output side of the integrator circuit (14) and whose inclination at the zero cross point is substantially zero, is supplied to the divider circuit (9),
The S-shaped correction signals of the first half and the second half of the screen obtained at the output terminals (9a) and (9b) of the dividing circuit (9) are obtained, and the S-shaped correction signals are respectively supplied to the gain adjusters (10R), ( 10G), (10
Vertical deflection coils (6R), (6G), (6B) of cathode ray tubes (5R), (5G), (5B) with gain adjustment via B) and (11R), (11G), (11B) respectively. To be supplied to. Others are configured similarly to the conventional three-tube color projector.
斯る本例に於いては従来と同様に画面（１）の前半部及
び後半部のＳ字補正を夫々別々に利得調整器（10R），
（10G），（10B）と（11R），（11G），（11B）とで調
整するので、この前半部及び後半部に於いて対応点で補
正量が相違しても良好なＳ字補正が出来る。更に本例に
於いては第３図Ｄに示す如くサイン波信号の画面中央部
に対応する零クロス点の傾斜を略零としているので、分
割点に於いてこの分割点が僅かにずれてもその分割点の
傾斜は略零であり、この分割点で屈折することがなく、
この為Ｓ字補正信号により画面中央部に横線が生ずるこ
とがない。In this example, as in the conventional case, the S-shaped correction of the first half and the second half of the screen (1) is separately performed for the gain adjuster (10R),
Since adjustment is made with (10G), (10B) and (11R), (11G), (11B), good S-curve correction can be achieved even if the correction amounts differ in the corresponding points in the first half and the second half. I can. Further, in this example, as shown in FIG. 3D, the slope of the zero cross point corresponding to the center of the screen of the sine wave signal is set to substantially zero, so that even if this division point is slightly deviated at the division point. The inclination of the dividing point is almost zero, and there is no refraction at this dividing point,
Therefore, the S-shaped correction signal does not cause a horizontal line at the center of the screen.
また、第４図は本発明の他の実施例を示す。この第４図
につき説明する第１図及び第７図に対応する部分には同
一符号を付しその詳細説明は省略する。FIG. 4 shows another embodiment of the present invention. Portions corresponding to FIGS. 1 and 7 for explaining FIG. 4 are denoted by the same reference numerals and detailed description thereof will be omitted.
第４図零に於いては積分回路（８）の出力側に得られる
第５図Ａ（第８図Ｄ）に示す如きサイン波信号を両方向
スライス回路（15）及びゲート回路（16）に供給し、こ
のゲート回路（16）の出力側に第５図Ｂに示す如くこの
サイン波信号の画面中央部に対応する零クロス点近傍の
所定幅Ｔだけ抽出し、これを積分回路（17）で積分して
第５図Ｃに示す如きこのＴ期間を周期とし、第５図Ａの
サイン波信号とは零クロス点が逆極性のサイン波信号を
得、この第５図Ｃに、示す如きサイン波信号を加算回路
（18）の一方の入力端子に供給すると共にこの加算回路
（18）の他方の入力端子に積分回路（８）の出力端子に
得られる第５図Ａに示す如きサイン波信号を供給し、こ
の加算回路（18）の出力側に第５図Ｄに示す如く垂直周
期のサイン波信号の画面中央部に対応する零クロス点の
傾斜が略零となる波形信号が得られ、この第５図Ｄに示
す如き波形信号を分割回路（９）に供給し、その他は第
１図と同様に構成する。In FIG. 4, zero, the sine wave signal as shown in FIG. 5A (FIG. 8D) obtained at the output side of the integrating circuit (8) is supplied to the bidirectional slice circuit (15) and the gate circuit (16). Then, as shown in FIG. 5B, a predetermined width T near the zero cross point corresponding to the central portion of the screen of the sine wave signal is extracted at the output side of the gate circuit (16), and this is extracted by the integrating circuit (17). By integrating this T period as shown in FIG. 5C, a sine wave signal whose zero crossing point has a polarity opposite to that of the sine wave signal of FIG. 5A is obtained, and a sine wave signal as shown in FIG. 5C is obtained. A sine wave signal as shown in FIG. 5A which is supplied to the one input terminal of the adder circuit (18) and obtained at the output terminal of the integrator circuit (8) at the other input terminal of the adder circuit (18). Is supplied to the output side of the adder circuit (18), as shown in FIG. A waveform signal in which the slope of the zero cross point corresponding to the central portion is substantially zero is obtained, and the waveform signal as shown in FIG. 5D is supplied to the division circuit (9), and the other configurations are the same as those in FIG. To do.
斯る第４図例に於いても第１図同様の作用効果が得られ
ることは容易に理解できよう。It can be easily understood that the same effects as those of FIG. 1 can be obtained in the example of FIG. 4 as well.
尚上述実施例に於いては本発明をプロジェクタに使用し
た例につき述べたが本発明をモニター等その他の表示装
置に使用できる。また本発明は上述実施例に限らず本発
明の要旨を逸脱することなくその他種々の構成が取り得
ることは勿論である。In the above embodiments, the present invention is applied to the projector, but the present invention can be applied to other display devices such as a monitor. Further, the present invention is not limited to the above-described embodiments, and it goes without saying that various other configurations can be adopted without departing from the gist of the present invention.
本発明に依れば画面（１）の前半部及び後半部のＳ字補
正を夫々別々に調整するので良好なＳ字補正が行われる
と共にサイン波信号の画面中央部に対応する零クロス点
の傾斜を略零としているので分割点の傾斜は略零であ
り、Ｓ字補正信号に屈折がなく画面中央部に横線を生じ
ない利点がある。According to the present invention, since the S-shaped corrections of the first half and the second half of the screen (1) are adjusted separately, good S-shaped correction is performed and the zero cross point corresponding to the center of the screen of the sine wave signal is adjusted. Since the inclination is substantially zero, the inclination at the division point is substantially zero, and there is an advantage that the S-shaped correction signal has no refraction and a horizontal line is not generated in the center of the screen.
第１図は本発明垂直偏向補正回路の一実施例を示す構成
図、第２図は第１図の要部の例を示す接続図、第３図及
び第６図は夫々本発明の説明に供する線図、第４図は本
発明の他の実施例を示す構成図、第５図は第４図の説明
に供する線図、第７図は従来の垂直偏向補正回路の例を
示す構成図、第８図は第７図の説明に供する線図であ
る。 （２）は垂直周期発振器、（３）は鋸歯状波発生回路、
（4R），（4G），（4B），（10R），（10G），（10
B），（11R），（11G）及び（11B）は夫々利得調整器、
（5R），（5G）及び（5B）は夫々陰極線管、（6R），
（6G）及び（6B）は夫々垂直偏向コイル、（９）は分割
回路、（12）及び（13）は夫々両波整流回路、（14）は
積分回路である。FIG. 1 is a block diagram showing an embodiment of the vertical deflection correction circuit of the present invention, FIG. 2 is a connection diagram showing an example of the main part of FIG. 1, and FIGS. 3 and 6 are for explaining the present invention. FIG. 4 is a schematic diagram showing another embodiment of the present invention, FIG. 5 is a schematic diagram for explaining FIG. 4, and FIG. 7 is a schematic diagram showing an example of a conventional vertical deflection correction circuit. , FIG. 8 is a diagram used to explain FIG. 7. (2) is a vertical period oscillator, (3) is a sawtooth wave generation circuit,
(4R), (4G), (4B), (10R), (10G), (10
B), (11R), (11G) and (11B) are gain adjusters,
(5R), (5G) and (5B) are cathode ray tubes, (6R),
(6G) and (6B) are vertical deflection coils, (9) is a dividing circuit, (12) and (13) are double-wave rectification circuits, and (14) is an integrating circuit.
Claims (1)
応する零クロス点の傾斜が略零となるように波形整形す
る波形整形手段と、 該波形整形手段の出力側に得られる零クロス点の傾斜が
略零とされた垂直周期のサイン波信号をその前半部と後
半部とに分割する分割手段と、 該分割手段の出力側に得られる前半部信号及び後半部信
号を夫々利得調整する第１及び第２の利得調整手段とを
有し、 該第１及び第２の利得調整手段の夫々の出力側に得られ
る前半部Ｓ字補正信号及び後半部Ｓ字補正信号により夫
々画面の前半部及び後半部のＳ字補正を行うようにした
ことを特徴とする垂直偏向補正回路。1. A waveform shaping means for shaping a sine wave signal of a vertical cycle so that the slope of a zero cross point corresponding to the center of the screen becomes substantially zero, and a zero cross obtained at the output side of the waveform shaping means. Splitting means for splitting a sine wave signal having a vertical cycle with a point inclination of substantially zero into its first half and second half, and gain adjustment for the first half signal and second half signal respectively obtained at the output side of the dividing means. First and second gain adjusting means, and the first half S-shaped correction signal and the second half S-shaped correction signal obtained at the output side of each of the first and second gain adjusting means A vertical deflection correction circuit characterized by performing S-shaped correction of the first half and the second half.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60191726A JPH078009B2 (en) | 1985-08-30 | 1985-08-30 | Vertical deflection correction circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60191726A JPH078009B2 (en) | 1985-08-30 | 1985-08-30 | Vertical deflection correction circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6251875A JPS6251875A (en) | 1987-03-06 |
| JPH078009B2 true JPH078009B2 (en) | 1995-01-30 |
Family
ID=16279466
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60191726A Expired - Fee Related JPH078009B2 (en) | 1985-08-30 | 1985-08-30 | Vertical deflection correction circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH078009B2 (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5132221A (en) * | 1974-09-13 | 1976-03-18 | Hitachi Ltd | SUICHOKUCHOKUSENSEI HOSEIKAIRO |
| JPS5171019A (en) * | 1974-12-16 | 1976-06-19 | Mitsubishi Electric Corp | HENKOHOSHO SOCHI |
| JPS5928315B2 (en) * | 1979-10-31 | 1984-07-12 | 株式会社日立製作所 | vertical deflection circuit |
-
1985
- 1985-08-30 JP JP60191726A patent/JPH078009B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6251875A (en) | 1987-03-06 |
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| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |