JPS5928874B2 - Electronic clock timing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic timepiece using an up counter.

2. Description of the Related Art Conventionally, electronic watches capable of setting up and down time have used up/down counters in their timekeeping circuits.

However, since up-down counters require about 2.5 times as many logic elements as up-counters, electronic watches with multiple functions such as timers and alarms require up-down counters for each function. The problem is that the number of logic elements increases significantly.

SUMMARY OF THE INVENTION Therefore, the present invention provides an electronic timepiece whose timekeeping means is a counter that has both up and down functions using an up counter and a circuit that generates a predetermined number of pulses.

An embodiment of the present invention will be described below based on the drawings.

Switches 1 and 2 are opened and closed with a slight delay time as the manual rotating body is rotated, and the order of opening and closing differs depending on the direction of rotation.

FIG. 2 shows an example of this.

In the figure, reference numeral 3 denotes a knob, which is fixed to the tip of the shaft 4.

A drum 5 made of an insulating material is fixed to the shaft 4.

Electrodes 6...6 are formed on the outer peripheral surface of the drum 5,
Each electrode 6 . . . 6 is led out to the shaft 4 via an extraction electrode 7 , and a conductive contact piece 8 is in contact with the shaft 4 .

Reference numerals 9 and 10 designate conductive contact pieces, which are disposed so as to be able to come into contact with and separate from the electrodes 6...6, and each contact piece has a different state of contact with the electrodes 6...6.

Here, the contact piece 9 and the electrodes 6...6 constitute the switch 1, and the contact piece 10 and the electrodes 6...6 constitute the switch 2.

Reference numerals 11 and 12 denote chattering removal circuits, which generate pulses from each input signal by removing the influence of chattering.

13 is an up/down discrimination circuit which detects the phase difference between the two systems of input pulses, discriminates whether the contents of the time counter should be up or down, and outputs each instruction signal to the up terminal 13a or the down terminal 13b. occurs.

Reference numeral 14 denotes a detection circuit for detecting the rotational speed of the manual rotating body, and is composed of, for example, a re-trigger type one-shot multi-by-break.
When the speed is higher than the set speed, an output is generated at the terminal 14b.

15 is a crystal oscillator, and this output frequency is determined by a frequency divider 16
, 17, and generates a 1 second signal at its final stage.

18 is a timing switch, and 19 is a chattering removal circuit.

20 is a sexagesimal counter, which measures the minute digit, and 21
is a 24-decimal counter and measures the hour digits.

22 is a detection circuit which detects when the counter 20 counts 59 and produces an output.

Decoder drivers 23 and 24 convert each of their inputs into signals suitable for display on the display device 25.

26 is a differential circuit, 27 to 42 are gate circuits, 43 is an inverter, and 44 to 46 are resistors.

47 and 48 are pulse generation circuits.

49 is a pulse width discrimination circuit 1, which generates a narrow output pulse when a predetermined pulse width is detected.

An example of the pulse generating circuit 47 is shown in FIG.

In the figure, 50 to 56 are flip-flop circuits;
7 is a gate circuit.

The pulse generating circuit 48 generates 23 pulses when receiving a single force pulse, and its configuration is similar to that of the pulse generating circuit 47.

An example of the pulse width discrimination circuit 49 is shown in FIG.
8 to 60 are flip-flop circuits, 61 is a gate circuit, and 62 is an inverter.

Next, the operation will be explained.

Hereinafter, in order to simplify the explanation, a time when a pulse is generated at the terminal 11a earlier than the terminal 12a shown in the first diagram will be referred to as an up-count instruction, and the opposite case will be referred to as a down-count instruction.

To perform timing, the timing switch 18 is closed, the gate circuit 27 is closed, and the gate circuit 28 is opened.

Therefore, a pulse is generated at each terminal 11a112a of the chuckling removal circuits 11 and 12 by rotating the knob 3 shown in the second figure.

Now, it is connected to the terminal 13b of the up/down discrimination circuit 13.
1jj, it 1 n occurs at the terminal 14b of the detection circuit 14.

As a result, the gate circuit 32 opens and the gate circuit 3
6 output pulses are allowed to pass.

Now, the pulse generated at the terminal 12a in FIG.
6, producing 1'' at output terminal 26a.

Therefore, the flip-flop circuit 50 of FIG.

The pulses are supplied to the counter 20 via the gate circuit 57 and the gate circuits 28 and 29 of FIG.

On the other hand, the output pulse of the gate circuit 57 is supplied to the flip-flop circuit 51, and then sequentially to the flip-flop circuit 52.
Trigger ~56.

Terminal P in FIG. When 52 pulses are supplied to , each output Qa, Q of the flip-flop circuit 53゜55.56
5. When Q6 becomes 1'', it 1 n generated in the gate circuit 36 shown in the first diagram resets the flip-flop circuit 50 shown in the third diagram via the gate circuits 32 and 30, and closes the gate circuit 57.

As a result of 52 pulses being supplied to the counter 20 via the terminal P1, its count value becomes 52, which means that it has been counted down by 8.

Thereafter, each time a pulse is generated at the output terminal 26a of the differentiating circuit 26-, the contents of the counter 20 are counted down by eight.

Next, when the rotational speed of the manual rotating body is slower than the set value, it 1 n is generated at the terminal 14a of the detection circuit 14, and the gate circuit 31 is opened.

Therefore, the flip-flop circuits 51 and 52 shown in FIG.
Outputs Qt, Q2, Q4-Q6 of 54-56 are '1''
, that is, when 59 pulses are supplied to the counter 20,
The gate circuit 35 becomes '1'', and the flip-flop circuit 50 of FIG. 3 is reset.

At this time, the counter 20 has counted 59, which means that it has been counted down by ■.

By the way, when counting down, a pulse of 59 or 52 is supplied to the counter 20, so a carry pulse may be generated at the terminal 20a of the counter 20 midway.

If this pulse is supplied to the counter 21, the hour digits will be counted extra.

In this embodiment, in order to avoid this inconvenience, the detection circuit 22
The pulse width generated at the terminal 22a of the terminal P is the pulse width generated at the terminal 22a of the terminal P.

When the width is narrower than the four pulses supplied to the pulse generation circuit 48, the pulse generating circuit 48 is set so that no output is generated.

That is, the content of the counter 20 before correction is temporarily set to 01, the flip-flop circuit 50 is set, and the content of the counter 20 is set to 01.
If 58 pulses are supplied to 0, the content is 59
, and a pulse is generated at the terminal 22a of the detection circuit 22 until the next pulse arrives.

Therefore, one pulse is generated from the gate circuit 61 of FIG. 4, which triggers the flip-flop circuit 58 and inverts its output.

However, when the next pulse is applied, the counter 20 will be 0.
Therefore, the flip-flop circuits 58, 59, and 60 are reset, and no output is generated in the pulse generating circuit 49.

Next, after the flip-flop circuit 50 is set again,
When reset, the contents of the counter 20 become 59,
This state is held until the next flip-flop circuit is set.

During this time, four pulses pass through the gate circuit 61 in FIG.
The frequency of this pulse is preset to satisfy predetermined conditions.

), and the output q3 of the flip-flop circuit 60 becomes 1''.

As a result, the pulse generating circuit 50 operates to generate 23 pulses, and the contents of the counter 21 are counted down by 1.

The pulse width discrimination circuit 49 is connected to a terminal P.

Although the four pulses are supplied to the terminal 22a, it is sufficient that the output is not generated in the flip-flop circuit 60 due to unnecessary pulses generated at the terminal 22a.

When the manual rotating body is rotated in the opposite direction relative to the upper part, the discrimination circuit 1
It 1 n is generated at the terminal 13a of No. 3, and the up-count mode is entered.

One of the gate circuits 33 and 34 is opened depending on the slowness of the rotational speed, and if the rotational speed is slow, the flip-flop circuit 50 is reset every time one pulse is generated, and when it is fast, the flip-flop circuit 50 is reset every eight pulses.

Therefore, counter 20 is incremented according to those pulses.

The above-mentioned time measurement contents of the counters 20 and 21 are shown in the Tecoder 23.
．． It is displayed on the display device 25 via 24.

As described in detail above, the present invention has both up and down functions by configuring an up counter and a logic circuit, so it can be configured with a small number of elements, and can be used for timers, alarms, stopwatches, etc. This is particularly advantageous when a large number of down counters are required.

Particularly in electronic watches that measure time in minute and hour digits, unnecessary up-counter carry outputs that occur during down-counting can be detected by a simple-configuration discrimination circuit.

As a rough counter, it is only an up counter, and the hour and minute digits can be quickly adjusted to A; Tub or DOWN depending on the corrected value.

[Brief explanation of the drawing]

The drawings show one embodiment of the present invention, and FIG. 1 is an electric circuit diagram;
FIG. 2 is an explanatory side view of a portion of FIG. 1, and FIGS. 3 and 4 are electric circuit diagrams each showing a portion of FIG. 1 in detail. 1...Switch, 2...Switch, 1
3... Up/down discrimination circuit, 20...
・Counter, 21... Counter, 22...
...Detection circuit, 47...Pulse generation circuit, 48
...Pulse generation circuit.

Claims (1)

[Claims] 1. An up/down discrimination circuit that generates an up-count or down-count output depending on the manual rotation direction, a first pulse generation circuit that generates a timing pulse that was used for manual rotation operation, and a pulse generation circuit that generates a timing pulse that is higher than the above timing pulse. a second pulse generation circuit that generates a pulse of the same frequency; and a second pulse generation circuit that receives the timing pulse and generates a pulse of the same frequency as the output of the second pulse generation circuit, and outputs the up-count and down-count outputs. a third pulse generating circuit that generates a set number of pulses according to the timing; and a first sexagesimal up counter that receives the output pulses of the third pulse generating circuit when setting the time and counts the minutes digit. , the first up counter is 59
A detection circuit that generates a pulse when counting and stops the same pulse at the next count value, and a detection circuit that generates a pulse when the output pulse of the detection circuit occurs during a period of time equivalent to one cycle of the timing pulse. a fourth pulse generation circuit that generates 23 pulses in response to the detection pulse; and a pulse width discrimination circuit that generates 23 pulses in response to the detection pulse; A timing device for an electronic watch, comprising a gate circuit that selectively allows the output and the output of a fourth pulse generation circuit to pass through, and a second up counter that receives the output of the gate circuit and measures the hour digit.