JPS5936234B2 - electronic clock - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a complementary MOS transistor (hereinafter abbreviated as CMOST) logic circuit which uses a crystal oscillator or the like as a time reference source and has means for dividing the frequency of the oscillator up to a time display device. This relates to a crystal oscillation type electronic clock that uses an electronic circuit, that is, a CMOS integrated circuit (hereinafter referred to as CMOS integrated circuit), in which power is supplied from a battery through a resistor made at the same time as the P-well diffusion in series, and at a voltage lower than the battery voltage. CMOS,
(abbreviated as IC) and reduce power consumption.

The structure of a conventionally used general crystal oscillation type electronic timepiece consists of an oscillating section 1, a frequency dividing section 2, a display driving section 3, and a time display device 4, as shown in FIG. 1, and the power source is a battery 10.
All electronic circuits are supplied with uniform battery voltage power.

In the early stages of development, electronic watches were manufactured by Aluminum Gate CMO.
Since S, IC was used, it was operated with a battery voltage of 1.5V. However, in recent years, with the development of silicon gate CMOS and IC, the threshold voltage has been lowered and is relatively low.
At a frequency of about 0KH2, the battery voltage is 0.5 to 1.0V.
operation is possible. Therefore, in the present invention, a thin P-type impurity region, so-called P - A resistor made by co-diffusion with the Well is connected in series to limit the current, lower the battery voltage, and reduce power consumption.

The configuration of one embodiment of the present invention is shown in FIG.

In the example of the present invention, a voltage dropped by the voltage of the resistor 101 is applied to the oscillation section 1 and the frequency dividing section 2 via the resistor 101 in series on the low potential side of the battery, and the display drive section 3 is directly connected to the battery. Applying voltage. Another feature of the present invention is that a P-type diffused resistor is used as the resistor, which is formed by co-diffusion with a thin P-type impurity region, so-called P-Well, which becomes the N-channel MOST region.

As is well known, the threshold voltages of CMOS and IC for electronic watches are designed to be approximately 0.5V-O.8V. The surface impurity concentration of P-Well at this time is 1×10
16/cBt, and the sheet resistance is 5 to 6 KΩ/mouth. The graph of FIG. 3 shows the relationship between the diffusion resistance R and the threshold voltage Vth, which was actually manufactured in the same process as the impurity diffusion of this P-Well. The dimensions of the resistor mask pattern are 20μ×200μ and the diffusion depth is 10μ. As can be seen from the graph of FIG. 3, as the threshold voltage increases, the value of the resistor R decreases, and as the threshold voltage decreases, the value of the resistor R increases. This result is much better than when a resistor with no change is connected.
This is because when the threshold voltage of an N-channel MOST is small and the amplification degree is large, a large resistance value increases the voltage drop to limit the current flowing through the MOST. This is because when it is small, the resistance value is small, the voltage drop is small, and the current to the MOST is not so restricted. In this way, they
By complementing each other, CMOS can be used even with low power consumption.
The IC is configured to operate. As explained above, by adding the diffused resistor fabricated at the same time as the P-Well impurity region to the electronic circuit through the battery in series, the power consumption can be stably reduced even if the threshold voltage varies. It can be reduced by 30 to 40%, and the effect is very large.

It should be noted that the voltage amplitudes are different, and it is a matter of course that a level adjustment circuit is attached to the connection of the electronic circuit section from a low voltage to a high voltage, if necessary.

[Brief explanation of the drawing]

Figure 1 is a process diagram of a conventional crystal oscillation electronic watch, Figure 2 is a graph showing the relationship between the threshold voltage of an N-channel MOS transistor and the diffused resistor fabricated in the same process as the P-well. The figure is a block diagram of a crystal oscillation type electronic timepiece according to the present invention. 1... Oscillation section, 2... Frequency division section, 3.
...Display drive unit, 4...Time display device,
101... Diffused resistor manufactured in the same process as P-Well.

Claims (1)

[Claims] 1. A crystal oscillation electronic timepiece using a complementary MOS transistor logic circuit that uses a crystal oscillator or the like as a time reference source and has means for dividing the frequency of the oscillator to a time display device, Thin P-type impurity region, so-called P-We, which becomes the N-channel MOS transistor region in a complementary MOS transistor using an N-type substrate
An electronic timepiece characterized in that a power supply voltage is supplied through a resistor formed by co-diffusion with ll in series, and an electronic circuit such as a complementary MOS integrated circuit is operated at a voltage lower than a battery voltage. 2. The electronic timepiece according to claim 1, characterized in that the display drive section is operated using battery voltage as is. 3. The electronic timepiece according to claim 1, characterized in that a part of the display driving section and the frequency dividing section are operated using battery voltage as is.