JPS5940348B2 - TV receiver small screen storage method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a small screen storage method for a television receiver, a so-called picture-in-picture receiver, which can project a small screen of another channel on the television screen using its own device.

Regarding the law, it was developed to write the entire video signal of a small screen so that subtitles and the like on the small screen would not be cut off as in the past. First, a conventional small screen storage method will be explained based on the time chart of FIG.
SB in the figure is image reception. A small screen signal for a small screen image formed by a machine, for example, the first field f,
, second field f2, third field f3...
are sent out sequentially. WT is a writing period signal of the small screen signal SB, and this signal is, for example, a write period signal of the small screen signal SB, which writes the small screen signal SB of only the central portion of the first field fl excluding both end portions to a pair of memories (not shown) in the period W1. Writing is performed while sampling into one A memory, and similarly, during period W2, the small screen signal SB in the center portion of the second field f2 is written into the B memory, the other of the pair of memories (not shown), while being sampled. . RD is a readout period signal of the booth surface signal SB, and this signal, for example, causes the central portion of the first field fl of the small screen signal SB written in the A memory to be read out earlier in the period C. Similarly, in period D, the central portion of the second field f2 of the small screen signal SB written in the B memory is read out earlier. In the conventional small screen storage method described above, for example, in the case of memory A, the period W of the write period signal WT is
1, the central part of the first field f of the small screen signal SB is written, then the central part of this first field fl is read out in the period C of the readout period signal RD, and then the third The central portion of the field f3 is written again in the period W3 of the write period signal WT. However, in the case of this small screen storage method, the writing period W
4. During the reading period A, B, X during W2, W3...
C...Since the beam is also large, for example, period C
Although the end of the period W3 does not overlap with the start of the period W3, it is not possible to make the writing periods W, , W2, W3, etc. larger than a certain extent, and the scores of sports programs, etc.
There was a problem with parts of the display, such as the time display, being missing.

The present invention solves the above-mentioned problems, and first, an embodiment will be described based on FIG. 2.

SB in the figure is the same small screen signal for small screen video as in Figure 1,
WTE is a writing period signal of the small screen signal SB, and this signal is, for example, the small screen signal S in the period WT excluding the portion near the vertical synchronizing signal V1 at both ends of the first field f1.
B is sampled and written into memory A, which will be described later, in one of the pair of memories, and similarly, in period WT2, the small screen signal SB of the part excluding the vertical synchronizing signals Vl and V2 at both ends of the second field F2 is written. is sampled and written into the other B memory (not shown) of the pair of memories. Note that if the write periods WTl, WT2, WT3, etc. are set to 240H, for example, Y during these write periods.
is defined as 22.5H. RDl is small screen signal SB
This signal is, for example, a readout period signal of periods α,
Then, the first field f1 portion of the small screen signal SB written in the A memory is read out at an earlier time.
Similarly, in period β1, the second field F2 portion of the small screen signal SB written in the B memory is read out earlier.

Note that the readout period α, Dl, d2, β, β1, β2 is 240/3=8 when the compression ratio of the small screen is 1/3.
0CH]. Various read period signals RDl, RD2, and RD3 of the small screen signal SB can be considered, but the read period signal RD3 in the case where the write period WT3 and the read periods α1, α2, α3 overlap for the longest time is the period α. It is. In the illustrated case, the latter half of the read period D3 overlaps with the front part WT3 of the write period WT3. In order to solve this problem, in the case shown in the figure, the A memory is divided into a front part and a rear part, for example, the front part is divided into 20H minutes and the rear part is divided into 60H minutes, and during the read period α3, the small screen signal written in the A memory is When reading SB, the front part of A memory [20H]
When the contents of the front part [20H] have been read out, the front part [20H] of memory A is changed to the write mode and the write period WT is 60/3.
=20C. The front part WT3l of [H] is connected to the front part of A memory [20
Write in H. On the other hand, the rear part [60H] of A memory,
When the mode is switched, the front part [20H] of this memory is read out, and when this reading is finished, the rear part [20H] is read out.
60H] to write mode and write period WT.
, the remainder of 180/3=60 [H], that is, the rear WT,
2 to the rear part [60H] of A memory. In other words, each pair of memories is divided into a front part [for example, 20H] and a remaining part [for example, 60H], and when reading of the front part [20H] is finished, this front part [20H] is set to write mode. At the same time, the rear [6
0H] while writing the front part [20H].

In this case, when the writing of the front part [20H] is completed, the reading of the rear part [60H] is completed, so the reading of the rear part [60H] is completed.
0H] to write mode and write. The present invention as described above divides the memory into a front part and a rear part when writing the small screen signal SB to the memory or reading it from the memory, and sets the front part and the rear part to the write mode or the read mode separately. By performing each operation, the entire video signal of the small screen can be written into memory, which solves problems such as subtitles being cut off around the small screen. The block diagram in FIG. 3 is a block diagram embodying the small screen storage method explained in FIG. The synchronization signal SUBAI is a sub-horizontal synchronization signal obtained from the small screen signal SB for small screen video, and these signals SUB/V and SUB/H are the vertical write enable signal, that is, the write period signal WTE of the small screen signal SB. The signals are respectively input to the output signal forming circuit 31.

32 is an oscillation circuit that generates a write clock signal for the small screen signal SB, and 33 is a clock signal W.33 that enables horizontal writing of the small screen signal SB. This circuit is a signal forming circuit that outputs CK, and receives the write period signal WTE and the write clock signal from the oscillation circuit 32, respectively.

34 is random access memory, front and rear memory 35
, 36 address generator, which generates a horizontally writable clock signal W. , 36. For example, when the contents of the small screen signal SB of the front part WT3l of the write period WT3 are being written to the front part 35 of the A memory by inputting and counting CK, the address is specified via the address path ADB.

Further, when this writing is completed, the address is changed to designate an address so that the remaining part of the writing period WT3, that is, the contents of the small screen signal SB of the rear part WT,2, is written in the rear part 36 of the memory. MAlN/V in the figure is the main vertical synchronization signal obtained from the main screen signal for main screen video,
MAlVH is the main horizontal synchronization signal obtained from the above main screen signal, and these signals MAlN/V, MAlN/H
are respectively input to a signal forming circuit 38 which outputs a vertical read enable signal, that is, a read period signal RD of the small screen signal SB.

Note that the signal forming circuit 38 also operates during the read period D3,
A division signal DlV is output that divides β and β3 into the first half and the second half. 39 and 40 are a pair of flip-flops arranged after the signal forming circuit 38, one of which is the flip-flop 39.
inputs the read period signal RD3 to the set terminal S and the division signal D1 to the reset terminal R, respectively, to generate a mode switching signal RU-F for setting the front part 35 of the memory to the write mode or the read mode. is output to this front section 35.

The other flip-flop 40 also receives a read period signal R.
D3 is inputted to the set terminal R through an inverter, and the division signal DIV is inputted to the set terminal S, respectively, and the mode switching signal φ and B for setting the rear part 35 of the memory A to the write mode or the read mode is inputted. , output to this rear part 36. 41 is an oscillation circuit that generates a readout clock signal for the small screen signal SB; 42 is a signal forming circuit that outputs a clock signal R-CK that allows horizontal reading of the small screen signal SB; this circuit is connected to the readout period signal RD3 and the oscillation circuit. The read clock signals from 41 are respectively input.

The address generator 34 inputs and counts the horizontally readable clock signal R-CK, and calculates, for example, the contents of the small screen signal SB in the front part WT of the write period WT3 written in the front part 35 of the A memory. is read out via the OR gate 37, the address is specified via the address bus ADB, and when this readout is completed,
By switching the address, the small screen signal S of the rear part WT32 of the write period WT3 is written to the rear part 36 of the A memory.
The contents of B are addressed to be read via OR gate 37.

In other words, in the confusion shown in FIG. 4, for example, when reading out the small screen signal SB written in the A memory during the read period D3, the front part 35 of the A memory is read out using the mode switching signal I/F. mode, and when the contents of this front part 35 have been read out, the mode switching signal
As a result, the front part 35 of the A memory is changed to the write mode, and the front part WT, , of the write period WT3 is written to the front part 35 of the A memory.

On the other hand, the rear part 36 of the A memory is changed to the read mode by the mode switching signal φ・B, and the rear part 36 is changed to the read mode following the front part 35.
When the contents of the write period WT3 are read out, and this readout is completed, the mode is changed to the write mode using the mode switching signal W-B, and the remainder of the write period WT3, that is, the rear part WT,2 is written to the rear part 36 of the A memory. In addition, the front and rear parts of the memory 35,
Of course, 36 may be a shift register or a random access memory.

[Brief explanation of drawings]

Figure 1 is a time chart explaining the conventional method, Figure 2 is a time chart explaining the method of the present invention, Figure 3 is a block diagram embodying Figure 2, and Figure 4 is explaining Figure 3. This is a time chart.

Claims (1)

[Claims] 1 In a television receiver capable of projecting a small screen on the TV screen, the memory for storing small screen signals for small screen images is divided into a front part and a rear part, and the reading of the small screen signal written in this front part is completed. when the front part is changed to a write mode, and while reading the small screen signal written to the rear part, writing a small screen signal to the front part,
A method for storing a small screen in a television receiver, characterized in that when writing in the front part is completed, the rear part is changed to a write mode and a small screen signal is written in the rear part.