JPS5942904B2 - Pattern defect detection method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pattern defect detection method that can determine defects by comparing and matching feature points of a pattern to be matched with feature point dictionary data corresponding to the pattern.

Conventionally, as a method for detecting defects in a pattern, a method is generally used in which defects are detected by comparing scanning information of a pattern and original information.

In this case, the amount of original information data becomes enormous, and a large capacity memory and processing device are required. Furthermore, when the allowable amount of variation in pattern position is large, it is difficult to apply such a method of detection by comparison and matching.On the other hand, the present applicant has proposed a new method that can reduce the amount of information in pattern defect detection.

In other words, only information on feature points such as inflection points is prepared as dictionary data, and the inflection point information detected from the pattern is compared with the dictionary data to identify only inflection points that are not in the dictionary data as defects. It is determined that This made it possible to significantly reduce the capacity of memory and processing equipment. However, the actual pattern is often misaligned with the reference position indicated by the dictionary data, and the starting point of scanning by the light beam is often misaligned with respect to the origin of the dictionary data.

Therefore, there is a difference between the detected inflection point information and the dictionary data, and a normal pattern is determined to be a defective pattern. In view of the above points, an object of the present invention is to provide a pattern defect detection method that enables accurate detection of defects by setting a tolerance range for positional deviation between detected inflection point information and dictionary data. be.

In order to achieve the above object, the pattern defect detection method of the present invention is a pattern defect detection method in which a defect is determined by comparing and matching feature points of a pattern to be matched with feature point dictionary data corresponding to the pattern. Whether or not the feature point indicated by the dictionary data exists within a certain range around the feature point, or the feature point of the matched pattern exists within a certain range around the feature point indicated by the dictionary data. The principle and embodiments of the present invention will be described in detail below.

The principle of the present invention is to two-dimensionally restore the neighborhood area of the feature point from the feature point dictionary data, set the two-dimensional neighborhood area of the feature point extracted from the pattern to be matched, and set the corresponding area. Defects are determined based on the presence or absence of feature points. FIGS. 1A and 1B show the comparison and matching areas of the dictionary data a and the pattern to be matched b, respectively, and the size of the comparison and matching area represents the permissible positional deviation range of the point to be matched.

If the center of the comparison area A1 is P1 in the dictionary data in Figure a, and the center of the matched pattern comparison area A2 in Figure b is P2, then the cases where the matched pattern is considered defective are as follows. .

(1) A case where a feature point exists in the center P1 of the dictionary data comparison area A1 and no feature point exists in the corresponding matched pattern comparison area A2, that is, a case where the pattern corresponding to the dictionary data is missing. .

This is called the first defect. (2) A case where a feature point exists in the center P2 of the matched pattern comparison area A2 and no feature point exists in the corresponding dictionary data comparison area A1, that is, a case where an unnecessary pattern exists in the matched pattern. .

This is called the second defect. Therefore, both defect patterns can be easily detected by calculating the logical sum of the first and second defects.

In this case, two-dimensionalization of the feature point dictionary data and the region near the feature points of the pattern to be matched can be easily realized using a shift register matrix.

That is, the pattern to be verified is scanned with a light beam, and is sequentially written at a predetermined resolution into a shift register matrix capable of accommodating the data of the scanning line within the above-mentioned allowable range as a comparison area for the pattern to be verified. Similarly, a shift register matrix of corresponding feature point dictionary data is prepared. Sending each data to both shift register matrices will be equivalent to sequentially moving the data at the center along the scanning line, so if a feature point comes to the center of one shift register matrix, it will be sent to the other. The above-described first and second defect patterns can be detected by calculating the logical sum of each row and each column of the shift register matrix and detecting the presence or absence of a feature point. FIG. 2 is an explanatory diagram of an embodiment of the defect pattern detection method based on the above-mentioned principle when the second defect, that is, an unnecessary pattern exists.

In the figure, an optical system 1 scans a pattern to be matched with a light beam, and outputs a scanning address and an inflection point signal to a feature point such as an inflection point.

Position information X', Y'11 of the scanning address is input to the counter 2. On the other hand, positional information X, Y of the inflection point dictionary address stored in the central processing unit (CPU) and further stored in the temporary buffer memory 3 is also input to the counter 4. The outputs from the counters 2 and 4 are input to the comparator 5, where the inflection point dictionary addresses X, Y and the scanning addresses X', Y? Compare and if they match, “1” – if they don’t match, “0”
" is output and inputted to the input end of the shift register matrix 6 along with the shift clock from the optical system 1. The shift register matrix 6 has a comparison area of, for example, 5 x 5 bits, and a comparison area of 5 x 5 bits is located at the center P1 in FIG. On the other hand, a 2-bit wide positional deviation tolerance area is provided around the periphery.The signal lines in each row and each column are commonly connected to a 5×5 bit 0R circuit 7.
The output is inverted and becomes one input of the AND circuit 9. The shift register matrix 8 corresponding to the shift clock matrix 6 has, for example, a 3.times.3 bit comparison area.

For this purpose, it is sufficient to detect when the inflection point comes to the center P2 as shown in FIG. 1b, so there is no need for 5×5 bits. This P2
The bit output corresponding to the position is used as the other input of the AND circuit 9, and when the inflection point signal comes to the P2 position, "1" indicating the inflection point is placed in any of the 5 x 5 bit range of the shift register matrix 6. The presence of ゛ indicates a normal pattern, and positional deviation within this range is allowed. In this case, the output of the 5 x 5 bit 0R circuit 7 becomes ``゜1'', which is inverted and output to the AND circuit 9. On the other hand, if there is no inflection point within the 5 x 5 bit range of shift register matrix 6, this indicates an abnormal pattern and P2 is turned off.
It can be seen that the inflection point signal is due to an unnecessary pattern, that is, a defect. In this case, the 5×5 bit 0R circuit 7
Since the output becomes "0" and is inverted, the AND circuit 9 is turned on.The output of the AND circuit 9 is then given to the defective address output circuit 11.On the other hand, the address corresponding to the P2 position of the shift register matrix 8 Since is an address before the current scanning address, it is corrected by the correction circuit 10' by 1 ΔX1 - ΔY from the scanning addresses X', Y, and is encoded by the encoder 10 as defective addresses R, Y, and sent to the defective address output circuit. 11. This defect address output is taken out to the outside by the ON signal of the AND circuit 9, and the position of the defect can be displayed.The above embodiment has described the detection of the second defect mentioned above. 1st
Next, a case will be described in which both the first defect and the second defect are detected.

FIG. 3 is an embodiment for detecting both the first and second defects.

The difference from Fig. 2 is that the shift register matrix 8 is
A 5x5 bit shift register matrix 8a is used, a 5x5 bit OR circuit 12 is connected to this matrix 8a, the output of the OR circuit 12 and the output from the center bit P1 of the matrix 6 are input to an AND circuit 9b, and the The point is that the outputs of the circuits 9a and 9a are input to the defective address output circuit 11 via the 0R circuit 13. 5×5
The bit matrix 8a is configured such that information within the permissible positional deviation range can be inputted to the center bit P2 as described above.

To explain the operation, detection of the second defect is performed in the same manner as described above, and is inputted to the defect address circuit 11 via the OR circuit 13. To explain the detection of the first defect, the output of the central bit P1 is used as one input of the AND circuit 9b, and the output from the 0R circuit 12 is inverted and used as the other input of the AND circuit 9b. Therefore, when there is an inflection point signal in the center bit P1, if there is no inflection point signal in the matrix 8a, the center bit P1 will output "1", and the output "0" from the 0R circuit 12 will be "0". Therefore, the AND circuit 9b outputs "1". The output from the AND circuit 9b is input to the defective address circuit 11 via the 0R circuit 13. This makes it possible to detect the first defect. Here, if there is an inflection point signal in the matrix 8a, the output from the 0R circuit 12 is "1", which is inverted and becomes "O" and input to the AND circuit 9b, so the output from the 0R circuit is "40". ” becomes. Therefore, it is determined to be a normal pattern. As mentioned above, according to Figure 3, the first and second
It becomes possible to detect both defects.

As explained above, according to the present invention, it is possible to determine whether or not there are minutiae points indicated by dictionary data within a certain range around the minutiae points of a pattern to be matched, or whether there are minutiae points around the minutiae points indicated by dictionary data. It is detected whether or not a feature point of the pattern to be matched exists within a certain range, and if it does not exist, the corresponding feature point or the lack of the pattern is determined to be a defect.

As a result, pattern defects can be effectively detected even when there is a predetermined variation in pattern position, etc., with a small amount of information and by providing a certain range around the feature points of the pattern to be matched or dictionary data.

[Brief explanation of the drawing]

A and b in FIG. 1 are explanatory diagrams of the principle of the present invention, FIG. 2 is an explanatory diagram showing the configuration of an embodiment of the invention, and FIG. 3 is an explanatory diagram showing another embodiment of the invention. Inside, 1 is the optical system, 2 and 4 are counters, 3 is buffer memory, 5 is comparator, 6 and 8a
is a 5×5 bit shift register matrix, γ,12
8 is a 3×3 bit shift register matrix, 9 is an AND circuit, 10 is an encoder, and 11 is a defective address output circuit.

Claims (1)

[Scope of Claims] 1. In a pattern defect detection method in which a defect is determined by comparing and matching feature points of a pattern to be matched with feature point dictionary data corresponding to the pattern, a light beam is scanned over the pattern to be matched to obtain a scanning address. and an optical system that outputs feature point signals.
a first input to which scanning address position information from the optical system is input;
and a second counter into which feature point dictionary address position information of the pattern to be matched corresponding to the scanning of the optical system is input, and the contents of the first counter and the contents of the second counter are compared. a comparator that generates an output when there is a match; a first shift register matrix that is made up of a plurality of matrices and is sequentially shifted row by row in synchronization with scanning in the optical system, and the output from the comparator is written to the input terminal; an OR circuit that outputs the logical sum of signals in a certain range around the center in the first shift register matrix; a second shift register matrix into which a feature point signal is written to an input end; a gate circuit which outputs a signal at the center of the second shift register matrix when no output is generated from the OR circuit; and a scanning address of the optical system. A pattern defect characterized by comprising means for encoding position information with a time delay corresponding to the time difference between the input end and the center of the second shift register matrix and outputting it when the output of the gate circuit is generated. Detection method. 2. In a pattern defect detection method that determines defects by comparing and matching feature points of a pattern to be matched and feature point dictionary data corresponding to the pattern, the pattern to be matched is scanned with a light beam and a scanning address and a feature point signal are output. an optical system; a first counter into which scanning address position information from the optical system is input; and a second counter into which feature point dictionary address position information of a matched pattern corresponding to the scanning of the optical system is input; , a comparator that compares the contents of the first counter and the contents of the second counter and generates an output when they match;
a first shift register matrix consisting of a plurality of matrices, in which each row is shifted in synchronization with the scanning in the optical system, and the output from the comparator is written to the input terminal; and the periphery of the center of the first shift register matrix. a first OR circuit that outputs a logical sum of signals in a certain range;
a second shift register matrix consisting of a plurality of matrices, which is sequentially shifted row by row in synchronization with scanning in the optical system, and in which feature point signals in the optical system are written to input terminals; and a center in the second shift register matrix. a second OR circuit that outputs a logical sum of signals in a certain range around the gate; and a first gate that outputs a signal at the center of the second shift register matrix when no output is generated from the first OR circuit. a second gate circuit that outputs a signal at the center of the first shift register matrix when no output is generated from the second OR circuit;
scanning address position information of the optical system is encoded with a time delay corresponding to the time difference between the input end and the center of the second shift register matrix;
1. A pattern defect detection method, comprising means for outputting when an output from a gate circuit occurs.