JPS5949638B2 - Dimming smoke detector - Google Patents
Dimming smoke detectorInfo
- Publication number
- JPS5949638B2 JPS5949638B2 JP13994076A JP13994076A JPS5949638B2 JP S5949638 B2 JPS5949638 B2 JP S5949638B2 JP 13994076 A JP13994076 A JP 13994076A JP 13994076 A JP13994076 A JP 13994076A JP S5949638 B2 JPS5949638 B2 JP S5949638B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- light
- circuit
- level
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000779 smoke Substances 0.000 title claims description 33
- 239000003990 capacitor Substances 0.000 claims description 21
- 238000001514 detection method Methods 0.000 claims description 13
- 230000003287 optical effect Effects 0.000 claims description 7
- 230000002238 attenuated effect Effects 0.000 claims description 3
- 101000590575 Takifugu rubripes Putative protein 2 Proteins 0.000 description 12
- 238000010586 diagram Methods 0.000 description 8
- 230000007423 decrease Effects 0.000 description 5
- 101150090280 MOS1 gene Proteins 0.000 description 4
- 101100401568 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) MIC10 gene Proteins 0.000 description 4
- 101100139089 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) PUT3 gene Proteins 0.000 description 4
- 101150054213 PUT1 gene Proteins 0.000 description 3
- 238000007599 discharging Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000032683 aging Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 2
- 101100461812 Arabidopsis thaliana NUP96 gene Proteins 0.000 description 1
- 102100030393 G-patch domain and KOW motifs-containing protein Human genes 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052982 molybdenum disulfide Inorganic materials 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 108091008695 photoreceptors Proteins 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/17—Systems in which incident light is modified in accordance with the properties of the material investigated
- G01N21/47—Scattering, i.e. diffuse reflection
- G01N21/49—Scattering, i.e. diffuse reflection within a body or fluid
- G01N21/53—Scattering, i.e. diffuse reflection within a body or fluid within a flowing fluid, e.g. smoke
- G01N21/534—Scattering, i.e. diffuse reflection within a body or fluid within a flowing fluid, e.g. smoke by measuring transmission alone, i.e. determining opacity
Landscapes
- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Biochemistry (AREA)
- General Health & Medical Sciences (AREA)
- General Physics & Mathematics (AREA)
- Immunology (AREA)
- Pathology (AREA)
- Fire-Detection Mechanisms (AREA)
- Investigating Or Analysing Materials By Optical Means (AREA)
Description
【発明の詳細な説明】
この発明は発光素子と受光素子を対向して配置した光路
に煙が侵入して生じる光の減衰量を検出して警報を発す
る減光式煙感知器にお(・て、自動平衡回路を設けた感
知器に関するもので、自動平衡作用により回路の汚れや
、回路素子の温度による変化、経年劣化等ドリフトの影
響を除去することを目的としたものである。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a dimming type smoke detector that issues an alarm by detecting the amount of light attenuation caused by smoke entering an optical path in which a light emitting element and a light receiving element are arranged facing each other. The invention relates to a sensor equipped with an automatic balancing circuit, and its purpose is to eliminate the effects of circuit contamination, changes due to temperature of circuit elements, and drift such as aging deterioration through automatic balancing.
減光式(光透過減衰式)煙感知器は光路を介して送受光
素子を対向して配置し、その間の光減衰量が5〜15%
/m減少したとき受信器に警報信号を発信するようにな
つている。Attenuation type (light transmission attenuation type) smoke detectors have light transmitting and receiving elements facing each other via an optical path, and the amount of light attenuation between them is 5 to 15%.
/m decreases, an alarm signal is sent to the receiver.
しかるに発光素子ぱ長寿命と高い電気−光変換能率が要
求されており、一般に赤外線発光ダイオードをパルス発
光させる方法がとられているが、使用温度範囲(一10
0〜+50℃)で±25%位変化する上、長期間に亘る
と70%位の光量に変化する。さらに光学系の汚れが加
わると50%位減衰する。本発明は増巾された受光出力
パルス電圧の100%レベルと一定減圧レベル(以下8
5%レベルとする)をそれぞれアノードに加圧した2個
のプログラマブルユニジャンクシヨントランジスタ(以
下PUTと略称)を用いたレベル比較回路と、常時ぱ前
記出力パルス電圧の85%レベルと同じ電圧の直流電圧
を保持しこの保持電圧が低下すると前記85%レベル加
圧のPUT出力パルスでコンデンサを充電して昇圧しこ
の上昇電圧が保持電圧を越えるとコンデンサを放電して
PUTのゲートを制御することでレベル比較回路との間
で自動平衡作用を行ないかつコンデンサの充電レートと
放電レートを異にするようにしたアナログ電圧保持回路
とを主要回路とし、さらに煙感知による比較出力なしの
状態から設定時間後に警報を発するようにしたタイマー
回路を設けると共に常時の消費電力を極力小さくするよ
うに回路を構成したものである。以下本発明の実施例に
ついて図面と共に説明すると、第1図は本発明減光式煙
感知器の全体の構成を示すブロック図でPGぱパルス発
生器、LDはパルス発生器PGで発生するパルスで駆動
されてパルス光を発生する発光ダイオード、RDは光路
を介して発光ダイオードLDと1:1で対向しパルス光
を受光して光を電気に変換する受光ダイオード、AMぱ
受光ダイオードRDの出力を増巾する受光増巾器、LC
Yは受光増巾器AMの出力電圧100%レベルの比較回
路、LC2は同じく85%レベルの比較回路、VHはレ
ベル比較回路LC2との間で自動平衡作用を行なうアナ
ログ電圧保持回路、Tはタイマー回路、SWはタイマー
回路Tの出力によつてサイリスタをトリカーし線路端を
短絡して警報信号を発生させるスイツチ回路である。However, light-emitting devices are required to have a long life and high electrical-to-optical conversion efficiency, and a method of emitting pulsed light from an infrared light emitting diode is generally used;
0 to +50°C), and the amount of light changes by about 70% over a long period of time. Furthermore, if the optical system is contaminated, the light will be attenuated by about 50%. The present invention is based on the 100% level of the amplified light receiving output pulse voltage and the constant reduced pressure level (hereinafter referred to as 8
A level comparator circuit using two programmable unijunction transistors (hereinafter referred to as PUT) whose anodes are pressurized with a voltage of 5% level), and a DC voltage of the same voltage as the 85% level of the output pulse voltage that is always applied. When the voltage is held and this holding voltage drops, the capacitor is charged and boosted by the PUT output pulse of the 85% level pressurization, and when this increased voltage exceeds the holding voltage, the capacitor is discharged and the PUT gate is controlled. The main circuit is an analog voltage holding circuit that performs automatic balancing with the level comparison circuit and sets the charging rate and discharge rate of the capacitor to be different. A timer circuit is provided to issue an alarm, and the circuit is configured to minimize power consumption at all times. Embodiments of the present invention will be described below with reference to the drawings. Fig. 1 is a block diagram showing the overall configuration of the attenuation type smoke detector of the present invention, where LD is a pulse generated by a PG pulse generator, and LD is a pulse generated by a pulse generator PG. A light-emitting diode (RD) that is driven to generate pulsed light is a light-receiving diode that faces the light-emitting diode LD (1:1) via an optical path and receives the pulsed light and converts the light into electricity. Receiving light intensifier, LC
Y is a comparison circuit for the 100% level of the output voltage of the light receiving amplifier AM, LC2 is a comparison circuit for the 85% level, VH is an analog voltage holding circuit that performs automatic balancing with the level comparison circuit LC2, and T is a timer. The circuit SW is a switch circuit that triggers a thyristor using the output of the timer circuit T to short-circuit the line ends and generate an alarm signal.
なお線路端子は2端子で常時は中央より回路動作のため
のみの電流を回路に供給している。第2図に本発明の要
部を表わした具体的回路の1例を示す。Note that there are two line terminals, and current only for circuit operation is always supplied to the circuit from the center. FIG. 2 shows an example of a specific circuit representing the main part of the present invention.
パルス発生器PGij.PNPNスイツチ素子とLC直
列共振回路で構成され、大電流ピーク値の得られる周知
のパルス発生器で発生パルスにより発光ダイオードLD
から例えば赤外線のパルス光1を発光させる。パルス光
1は対向する受光ダイオードRDで受光されて電気パル
スに変換され、受光増巾器AMで増巾される。受光増巾
器AMはC−MOS(相補形メタルオキサイド半導体素
子)を用いて消費電力を少くしたリニアー増巾器で受光
ダイオードRDに流れる光電流パルスを増巾して電圧v
の正パルスを出力する。点線で囲んだプロツクLCは第
1図のレベル比較回路LCl,LC2が混成されている
レベル比較回路でトランジスタPUTlのアノード(A
)には受光増巾器AMの出力電圧のレベルを抵抗R1で
減圧させた85%レベルの電圧が加圧され、トランジス
タPUT2のアノードには100%レベルの電圧が加圧
される。アナログ電圧保持回路VHはMOS形電界効果
トランジスタMOSl,C−MOS増巾回路を構成する
電界効果トランジスタMOS2,MOS3およびコンデ
ンサCl.抵抗R2,R3等からなる。Pulse generator PGij. A well-known pulse generator that is composed of a PNPN switch element and an LC series resonant circuit and can obtain a large current peak value generates pulses to drive the light emitting diode LD.
For example, infrared pulsed light 1 is emitted from the light source. The pulsed light 1 is received by the opposing light receiving diode RD, converted into an electric pulse, and amplified by the light receiving amplifier AM. The light receiving amplifier AM is a linear amplifier that uses C-MOS (complementary metal oxide semiconductor device) to reduce power consumption, and amplifies the photocurrent pulse flowing through the light receiving diode RD to increase the voltage v.
outputs a positive pulse of The block LC surrounded by a dotted line is a level comparison circuit in which the level comparison circuits LCl and LC2 shown in FIG.
) is applied with an 85% level voltage obtained by reducing the level of the output voltage of the light receiving amplifier AM by a resistor R1, and a 100% level voltage is applied to the anode of the transistor PUT2. The analog voltage holding circuit VH includes a MOS field effect transistor MOS1, field effect transistors MOS2 and MOS3 constituting a C-MOS amplifier circuit, and a capacitor Cl. It consists of resistors R2, R3, etc.
トランジスタMOSlのゲート(qはレベル比較回路L
CのトランジスタPUTlのカソード(5)に連なり、
またC−MOS増巾回路の出力側はそれぞれ抵抗R4,
R5を介してトランジスタPUTl,PUT2のゲート
(Qに連つていてレベル比較回路LCとアナログ電圧保
持回路VH間の自動平衡回路を構成している。而して電
圧保持回路VHの電圧保持作用はコンデンサC1の充放
電に依存し、コンデンサC1はトランジスタMOSlの
ゲートが0Nになつたとき抵抗R2を通して一定のレー
ト(1%/秒以下)で充電され、放電はC−MOSを通
して5〜10%/時のレートで行なわれる。なお抵抗R
3は消費電流を制限するためのものである。タイマー回
路Tは時間設定の時定数回路を構成するコンデンサC2
と抵抗R6、コンデンサC2の放電回路を構成するトラ
ンジスタPUT3およびTr、トランジスタPUT3の
導通を規制するゲート(Qの電圧を設定するための抵抗
R7,R8等からなつており、スイツチ回路SWはサイ
リスタSCRおよび雑音防止用の抵抗R9、コンデンサ
C3等からなつている。Gate of transistor MOS1 (q is level comparison circuit L
Connected to the cathode (5) of the transistor PUTl of C,
Also, the output side of the C-MOS amplification circuit is resistor R4,
It is connected to the gates (Q) of transistors PUTl and PUT2 via R5, and constitutes an automatic balancing circuit between the level comparison circuit LC and the analog voltage holding circuit VH.Thus, the voltage holding function of the voltage holding circuit VH is as follows. Depending on the charging and discharging of capacitor C1, capacitor C1 is charged at a constant rate (less than 1%/sec) through resistor R2 when the gate of transistor MOS1 becomes 0N, and discharged at a constant rate (less than 1%/sec) through C-MOS. The resistance R
3 is for limiting current consumption. The timer circuit T is a capacitor C2 that constitutes a time constant circuit for time setting.
and resistor R6, transistors PUT3 and Tr that constitute the discharge circuit of capacitor C2, resistors R7 and R8 for setting the voltage of the gate (Q) that regulates the conduction of transistor PUT3, and the switch circuit SW is composed of thyristor SCR. It also consists of a resistor R9, a capacitor C3, etc. for noise prevention.
また整流器RFは線路を介して中央から送電される電源
電流を整流し抵抗RlOを通してVなる電圧の直流電源
を回路に供給している。なおコンデンサC3は整流波の
平滑用である。つぎに回路の動作について説明すると、
レベル比較回路LCには受光増巾器AMから振巾vのパ
ルス電圧が入力し、トランジスタPUTlのアノードに
はレベル85%Vのパルス電圧が印加され、トランジス
タPUT2のアノードにはレベル100%Vのパルス電
圧が印加される。Further, the rectifier RF rectifies the power supply current transmitted from the center via the line, and supplies DC power at a voltage of V to the circuit through the resistor RlO. Note that the capacitor C3 is for smoothing the rectified wave. Next, we will explain the operation of the circuit.
A pulse voltage with an amplitude v is input from the light receiving amplifier AM to the level comparison circuit LC, a pulse voltage with a level 85% V is applied to the anode of the transistor PUT1, and a pulse voltage with a level 100% V is applied to the anode of the transistor PUT2. A pulse voltage is applied.
一方アナログ電圧保持回路VHの出力電圧は上記85%
Vと同じレベルの直流電圧を保持するようになつており
、この直流電圧はコンデンサC1の5〜10%/時のレ
ートでの放電に伴つて低下し、従つてトラツジスタPU
Tlのゲート電圧も下がるから85%Vのアノード電圧
の方が高くなると、トランジスタPUTlは導通してカ
ソード(ト)から電圧保持回路VHのトランジスタMO
Slのゲート(6)にパルスが送出される。第3図はト
ランジスタPUTlの動作時における電圧波形図でアノ
ード電圧がゲート電圧より高くなるとカソード出力電圧
が発生する。図示のようにカソード出力電圧はカソード
回路のインピーダンスが高いため浮遊容量で位相が遅れ
る。なおアノード電圧がゲート電圧より小さいときはカ
ソードの出力はない。トランジスタMOSlのゲートに
上記カソード出力電圧が印加されると、トランジスタM
OSlを通るコンデンサC1の充電回路が構成されて、
コンデンサC1がさきに述べたレートで充電され、保持
電圧のレベルを回復する。On the other hand, the output voltage of the analog voltage holding circuit VH is 85% of the above
V, and this DC voltage decreases as capacitor C1 discharges at a rate of 5-10%/hour, thus reducing transistor PU.
Since the gate voltage of Tl also decreases, when the anode voltage of 85% V becomes higher, the transistor PUTl becomes conductive and the voltage is transferred from the cathode (T) to the transistor MO of the voltage holding circuit VH.
A pulse is sent to the gate (6) of Sl. FIG. 3 is a voltage waveform diagram when the transistor PUT1 is in operation, and when the anode voltage becomes higher than the gate voltage, a cathode output voltage is generated. As shown in the figure, the phase of the cathode output voltage is delayed due to stray capacitance due to the high impedance of the cathode circuit. Note that when the anode voltage is lower than the gate voltage, there is no output from the cathode. When the above cathode output voltage is applied to the gate of the transistor MOS1, the transistor M
A charging circuit for capacitor C1 passing through OSl is configured,
Capacitor C1 is charged at the previously mentioned rate to restore the holding voltage level.
このようにしてトランジスタPUTlと電圧保持回路と
の間で保持電圧の平衡作用が行なわれる。従つて、電圧
保持回路VHの出力電圧は、受光増幅器AMの出力電圧
Vがドリフトによけ変化しても該変化に追随して常VC
85%Vとなる。この結果、トランジスタPUT2のゲ
ート(Qvcは受光増幅器AMの出力電圧Vのピーク値
を保持した電圧の85%レベル電圧が常に印加されるこ
とになる。一方トランジスタPUT2のアノードには常
時100%Vのパルス電圧が印加されており、アナログ
電圧保持回路VHから供給されているトランジスタPU
T2のゲート電圧は当然アノード電圧より小さいからト
ランジスタPUT2の出力には常時正パルスが発生して
おり、NPNトランジスタTrをパルスごとに導通させ
てコンデンサC2の電荷をトランジスタTrを通して放
電する。In this way, the holding voltage is balanced between the transistor PUTl and the voltage holding circuit. Therefore, even if the output voltage V of the photoreceptor amplifier AM changes due to drift, the output voltage of the voltage holding circuit VH follows the change and is always maintained at VC.
It becomes 85%V. As a result, the gate (Qvc) of the transistor PUT2 is always applied with a voltage at the 85% level of the voltage that maintains the peak value of the output voltage V of the photodetector amplifier AM.On the other hand, the anode of the transistor PUT2 is always applied with a voltage of 100% V. A transistor PU to which a pulse voltage is applied and is supplied from an analog voltage holding circuit VH
Since the gate voltage of T2 is naturally lower than the anode voltage, a positive pulse is always generated at the output of the transistor PUT2, and the NPN transistor Tr is made conductive for each pulse to discharge the charge in the capacitor C2 through the transistor Tr.
しかし光路に煙が侵入して受光量が減少し、トランジス
タPUT2に印加されるアノード電圧が電圧保持回路V
Hから供給されているゲート電圧より小さくなると、ト
ランジスタPUT2の比較出力はなくなり、トランジス
タTrは導通を断たれてコンデンサC2は充電を継続す
る。第4図はトランジスタPUT2以降の回路、第1図
のブロツク図ではレベル比較回路LCI以降の回路の動
作を説明するタイムチヤートで、同図のaはトランジス
タPUT2のアノードに加えられる受光パルス電圧で煙
侵入以後電圧レベルが減衰した状態、同図bぱ同じくカ
ソードの出力パルスで、上述の理由で煙侵入後その出力
が断たれた状態、同図cはコンデンサC2の充放電状態
を表わしたもので、抵抗R6とコンデンサC2の時定数
で上昇するコンデンサC2の充電電圧は同図bのカソー
ド出力パルスごとにトランジスタTrを通して放電され
るが、煙の侵入でカソード出力パルスが断たれると充電
を継続し、その充電電圧すなわちトランジスタPUT3
のアノード(八電圧が抵抗RT.R8で設定されている
ゲート(q電圧を越えるとトランジスタPUT3が導通
してコンデンサC2の電荷を放電し、サイリスタSCR
をそのゲートをトリカーすることで導通させ、同図dの
チヤートに示すようにスイツチ回路SWを0FFから0
Nに切替えて整流器RFの直流出力側を短絡する。すな
わち煙侵入を検知してから時定数回路で設定された時間
(チヤート(c)では約10パルスで示す)後煙感知警
報を発するようにしたものである。次に、本発明がドリ
フトの影響を排除できる点について説明する。一般に、
本発明のように発受光素子を用いて光学的に煙の進入を
検出する装置においては、前述したように温度変化.経
年劣化等により受光量が経時的に変化し、受光増幅器A
Mの出力電圧vが第6図に例示するようにドリフトする
。However, smoke enters the optical path and the amount of light received decreases, causing the anode voltage applied to the transistor PUT2 to drop to the voltage holding circuit V
When the voltage becomes smaller than the gate voltage supplied from H, the comparison output of the transistor PUT2 disappears, the transistor Tr is cut off, and the capacitor C2 continues to charge. Figure 4 is a time chart explaining the operation of the circuit after the transistor PUT2, and the block diagram in Figure 1 is a time chart explaining the operation of the circuit after the level comparison circuit LCI. Figure b shows a state in which the voltage level has attenuated after the smoke infiltrated; figure b shows the same output pulse from the cathode, but the output is cut off after smoke invades for the reason mentioned above; figure c shows the charging and discharging state of capacitor C2. , the charging voltage of capacitor C2, which increases with the time constant of resistor R6 and capacitor C2, is discharged through transistor Tr every time the cathode output pulse is shown in b in the same figure, but if the cathode output pulse is cut off due to the intrusion of smoke, charging continues. and its charging voltage, that is, transistor PUT3
When the anode (8 voltage exceeds the gate (q voltage) set by resistor RT.R8, transistor PUT3 becomes conductive and discharges the charge of capacitor C2, and the thyristor SCR
is made conductive by triggering its gate, and the switch circuit SW is changed from 0FF to 0 as shown in the chart d in the same figure.
Switch to N to short-circuit the DC output side of the rectifier RF. That is, a smoke detection alarm is issued after a time period set by a time constant circuit (indicated by approximately 10 pulses in chart (c)) after smoke intrusion is detected. Next, the point that the present invention can eliminate the influence of drift will be explained. in general,
In a device like the present invention that optically detects smoke intrusion using a light emitting/receiving element, temperature changes can be detected as described above. The amount of light received changes over time due to aging deterioration, etc.
The output voltage v of M drifts as illustrated in FIG.
従つて、従来装置のように煙検知レベルを一定レベル(
図中の一点鎖線)に固定した場合、前記ドリフトによる
変化のため、検知レベル以下となるP1点で煙が進入し
ていないにも拘らず煙進入として誤検知してしまう虞れ
がある。本発明の場合、前述したごとく電圧保持回路V
HのトランジスタPUTlとの間の保持電圧の平衡作用
により、煙検知レベルたるトランジスタPUT2のゲー
ト(qの印加電圧は、受光増幅器AMの出力電圧Vの8
5%Vレベル(図中の二点鎖線)に自動的に調節される
。従つて、受光増幅器AMの出力電圧Vがドリフトによ
り図示のように経時変化しても、煙検知レベルたるトラ
ンジスタPUT2のゲート(C4の電圧はその変化に追
随して常に15%低い85%Vレベルとなる。このため
、出力電圧Vがドリフトしても煙検知レベルたる85%
Vレベルと交わることがなくなり、従来の固定検知レベ
ルのようにP1点で誤検知することがなく、ドリフトに
よる影警を排除することができる。煙が進入して受光増
幅器AMの出力電圧Vが急激に低下すると、トランジス
タPUT2は85%vレベルとの交点たるP2点でこれ
を検知し、煙感知警報を発する。Therefore, unlike conventional devices, the smoke detection level cannot be set to a certain level (
If it is fixed to the dot-dashed line in the figure, due to the change due to the drift, there is a risk that smoke will be erroneously detected as smoke entering even though no smoke has entered at point P1, which is below the detection level. In the case of the present invention, as described above, the voltage holding circuit V
Due to the balancing effect of the holding voltage between transistor PUT1 and transistor PUTl, the applied voltage at the gate (q) of transistor PUT2, which is the smoke detection level, is equal to 8
It is automatically adjusted to the 5% V level (double-dashed line in the figure). Therefore, even if the output voltage V of the photodetector amplifier AM changes over time due to drift as shown in the figure, the voltage at the gate (C4) of the transistor PUT2, which is the smoke detection level, will always follow the change and remain at the 85% V level, which is 15% lower. Therefore, even if the output voltage V drifts, the smoke detection level is 85%.
Since it no longer intersects with the V level, there is no false detection at the P1 point unlike the conventional fixed detection level, and shadow detection due to drift can be eliminated. When smoke enters and the output voltage V of the light receiving amplifier AM suddenly decreases, the transistor PUT2 detects this at the point P2, which is the intersection with the 85%v level, and issues a smoke detection alarm.
第5図は本減光式煙感知器の全体構造の1例を示す舛観
図でパルス発生器PG、発光ダイオードLD等を内蔵す
る発光部、煙の侵入を可能にする煙導入孔を適宜に設け
た光路被覆管、受光ダイオードRD以下の各回路を内蔵
する受光判定部等よりなる感知器本体の両端を台座に設
けた保持台で支え、全体を下向きにして台座を天井に取
付けた状態を示したものである。Figure 5 is a schematic diagram showing an example of the overall structure of this attenuation type smoke detector, with a light emitting part containing a pulse generator PG, a light emitting diode LD, etc., and a smoke introduction hole that allows smoke to enter as appropriate. Both ends of the sensor body, which consists of a light path cladding tube installed at the top of the sensor, a light receiving judgment unit containing a light receiving diode RD and other circuits, are supported by a holder mounted on a pedestal, and the pedestal is mounted on the ceiling with the entire body facing downward. This is what is shown.
以上の実施例について述べた如く本発明ぱ増巾された受
光出力電圧の一定減圧レベルを常に保持する如くレベル
比較回路との間で自動平衡作用を行なうようそれぞれ異
なる充電レート放電レートを持つたアナログ電圧保持回
路を用いドリフトの影響を排除して煙侵入時における検
出回路の動作を確実にした減光式煙感知器である。As described in the above embodiments, the present invention uses analogues with different charging and discharging rates to perform automatic balancing with the level comparison circuit so as to always maintain a constant reduced pressure level of the amplified light receiving output voltage. This is a dimming type smoke detector that uses a voltage holding circuit to eliminate the effects of drift and ensure the operation of the detection circuit when smoke enters.
なお本煙感知器は長距離区間にレーザビームを張つて霧
、雪等による[見通し不良」の警報にも直接利用できる
ものである。This smoke detector can also be directly used to warn of poor visibility due to fog, snow, etc. by emitting a laser beam over a long distance.
図面は本発明減光式煙感知器の実施例に関するもので、
第1図は全体の構成を示すプロツク図、第2図は本発明
の要部を示す具体的回路の1例図、第3図はレベル比較
回路における比較電圧波形図、第4図は煙侵入検知動作
説明のタイムチヤート、第5図は取付状態を示す感知器
構造例の外観図、第6図はドリフトに対する動作説明図
である。The drawings relate to embodiments of the dimming type smoke detector of the present invention.
Fig. 1 is a block diagram showing the overall configuration, Fig. 2 is an example of a specific circuit showing the main parts of the present invention, Fig. 3 is a comparison voltage waveform diagram in a level comparison circuit, and Fig. 4 is a smoke intrusion diagram. A time chart for explaining the detection operation, FIG. 5 is an external view of an example of the structure of the sensor showing the installed state, and FIG. 6 is a diagram for explaining the operation against drift.
Claims (1)
介して受光する如く発光素子と受光素子とを対向して配
置し該光路に侵入する煙により受光量が減衰するのを検
出して警報を発する減光式煙感知器において、増巾され
た受光出力電圧の100%レベルと一定減圧レベルをそ
れぞれアノードに加圧した2個のプログラマブルユニジ
ヤンクシヨントランジスタを用いたレベル比較回路と、
この比較回路の一定減圧レベル比較出力により制御され
るコンデンサ充電回路とこのコンデンサの電圧を増巾し
て前記2個のトランジスタのゲートに電圧を供給してレ
ベル比較回路との間で前記一定減圧レベルの電圧保持の
自動平衡作用を行なうアナログ電圧保持回路とを設け、
煙侵入時の検出回路動作に及ぼすドリフトの影響を排除
したことを特徴とする減光式煙感知器。1 A light-emitting element and a light-receiving element are arranged facing each other so that the pulsed light of a light-emitting element driven by pulsed light is received through an optical path, and an alarm is issued by detecting that the amount of light received is attenuated due to smoke entering the optical path. A level comparison circuit using two programmable unidirectional transistors whose anodes are respectively pressurized with a 100% level of an amplified light reception output voltage and a constant reduced pressure level in a dimming type smoke detector that emits light;
A capacitor charging circuit controlled by the constant reduced pressure level comparison output of this comparison circuit and a level comparison circuit that amplifies the voltage of this capacitor and supplies voltage to the gates of the two transistors to maintain the constant reduced pressure level. An analog voltage holding circuit that automatically balances the voltage holding is provided.
A dimming type smoke detector characterized by eliminating the influence of drift on detection circuit operation when smoke enters.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13994076A JPS5949638B2 (en) | 1976-11-19 | 1976-11-19 | Dimming smoke detector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13994076A JPS5949638B2 (en) | 1976-11-19 | 1976-11-19 | Dimming smoke detector |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5364588A JPS5364588A (en) | 1978-06-09 |
| JPS5949638B2 true JPS5949638B2 (en) | 1984-12-04 |
Family
ID=15257208
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13994076A Expired JPS5949638B2 (en) | 1976-11-19 | 1976-11-19 | Dimming smoke detector |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5949638B2 (en) |
-
1976
- 1976-11-19 JP JP13994076A patent/JPS5949638B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5364588A (en) | 1978-06-09 |
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