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JPS5953585B2 - Scan-in-out control device - Google Patents
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JPS5953585B2 - Scan-in-out control device - Google Patents

Scan-in-out control device

Info

Publication number
JPS5953585B2
JPS5953585B2 JP53000561A JP56178A JPS5953585B2 JP S5953585 B2 JPS5953585 B2 JP S5953585B2 JP 53000561 A JP53000561 A JP 53000561A JP 56178 A JP56178 A JP 56178A JP S5953585 B2 JPS5953585 B2 JP S5953585B2
Authority
JP
Japan
Prior art keywords
scan
control unit
sub
main control
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53000561A
Other languages
Japanese (ja)
Other versions
JPS5494252A (en
Inventor
浩 村山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP53000561A priority Critical patent/JPS5953585B2/en
Publication of JPS5494252A publication Critical patent/JPS5494252A/en
Publication of JPS5953585B2 publication Critical patent/JPS5953585B2/en
Expired legal-status Critical Current

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  • Test And Diagnosis Of Digital Computers (AREA)

Description

【発明の詳細な説明】 本発明は、データ処理装置内のレジスタ、フリップフロ
ップ等の内容の読み書きを行うスキャンインアウト制御
装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a scan-in-out control device that reads and writes the contents of registers, flip-flops, etc. in a data processing device.

一般にデータ処理装置は、保守あるいは診断等のため装
置内のレジスタ、フリップフロップ等の内容を読み書き
するスキャンインアウト機能を具備しているが、そのス
キャンインアウト制御部の故障は、故障状態を知るスキ
ャンインアウト動作自体が無効となるため、原因未明に
長時間かかるのが常であり、該制御部は動作時常に正常
性をチェックする必要がある。
Data processing equipment generally has a scan-in/out function that reads and writes the contents of registers, flip-flops, etc. within the equipment for maintenance or diagnosis purposes, but if the scan-in/out control unit fails, the failure state can be detected. Since the scan-in-out operation itself becomes invalid, it usually takes a long time until the cause is unknown, and the control unit needs to constantly check the normality during operation.

ところで、スキャンインアウト制御部が、データ処理装
置内の一か所に存在しスキャンインアウト動作全体を制
御する主制御部と、該装置内に複数個分散し主制御部か
ら転。送される制御情報を保持し、この内容によりスキ
ャンインアウト動作の補助をおこなう副制御部の2種の
制御部から構成される場合、データ処理装置が大型化す
るにつれ副制御部の数が多<なつてきており、上記正常
性チェック機能を各副制御部にもたせるとハードウェア
の増加は免がれず、該ハードウェアの増加を極力おさえ
る必要がある。本発明は叙上の事情に鑑みなされたもの
で、各副制御部に簡単な選択回路と主制御部に比較回路
を用意することにより、少ないハードウェアの増加で、
副制御部のチェックをスキャンインアウト動作と同時に
行えるスキャンインアウト制御装置を提供することにあ
る。簡単に云えば、本発明の特徴とするところは、副制
御部において保持されたスキャンインアウト制御情報を
主制御部に返送する手段を用意し、更に主制御において
返送された制御情報を元の情報、と比較する手段を用意
し、、スキャンインアウトデータの転送時、制御情報の
返送および比較チェックを同時におこなうものである。
Incidentally, the scan-in-out control sections include a main control section that exists in one place within the data processing device and controls the entire scan-in-out operation, and a plurality of scan-in-out control sections that are distributed within the device and are transferred from the main control section. In a case where the data processing device is composed of two types of control units: a sub-control unit that holds the transmitted control information and assists scan-in-out operations based on this content, the number of sub-control units increases as the data processing device becomes larger. However, if each sub-control unit is provided with the above-mentioned normality check function, the amount of hardware will inevitably increase, and it is necessary to suppress the increase in hardware as much as possible. The present invention has been made in view of the above circumstances, and by providing a simple selection circuit in each sub-control section and a comparison circuit in the main control section, the present invention can be achieved with a small increase in hardware.
It is an object of the present invention to provide a scan-in-out control device that can check a sub-control unit at the same time as a scan-in-out operation. Briefly speaking, the present invention is characterized by providing means for returning the scan-in-out control information held in the sub-control section to the main control section, and further converting the returned control information in the main control section to the original one. A means for comparing with the information is prepared, and when the scan-in-out data is transferred, the return of the control information and the comparison check are performed at the same time.

次に、本発明の一実施例について図面を用いて詳細に説
明する。
Next, one embodiment of the present invention will be described in detail using the drawings.

フ 図は本発明にかかるスキャンインアウト制御情報の
一実施例の構成図である。
FIG. 2 is a configuration diagram of one embodiment of scan-in-out control information according to the present invention.

図において、スキャンインアウト制御装置は主制御部1
と副制御部2から成る。更に、主制御部1はスキャンア
ドレス、スキャンイン・スキャンインアウト識別ビツ;
ト等の制御情報、スキャンインデータ、スキャンアウ
トデータを保持する主制御レジスタ3、本発明の特徴の
一つである比較回路7のほか、図では省略したが、スキ
ヤンロツク制御回路、制御情報転送中かスキヤンデータ
転送中か識別する信号を送出する回路から成る。副制御
部2は転送された制御情報を保持する副制御レジスタ4
及び本発明の特徴である選択回路6から成る。副制御部
2は例えば、目的レジスタあるいはパツケージボード対
応に設け、各々の副制御部には固有の識別コードが付さ
れている。さて、スキヤンインアウト動作時、まず主制
御部1は図示しない制御情報転送中を示す信号を゛1゛
にし、主制御レジスタ3から制御情報をスキヤンタロツ
タとともにパス10に送出する。
In the figure, the scan-in-out control device is the main control unit 1.
and a sub-control section 2. Furthermore, the main control unit 1 has scan address, scan-in/scan-in-out identification bits;
In addition to the main control register 3 that holds control information such as data, scan-in data, and scan-out data, and the comparison circuit 7 that is one of the features of the present invention, there is also a scan lock control circuit and a control circuit that is not shown in the figure. It consists of a circuit that sends out a signal to identify whether data is being transferred or scan data is being transferred. The sub-control unit 2 includes a sub-control register 4 that holds the transferred control information.
and a selection circuit 6, which is a feature of the present invention. The sub-control section 2 is provided corresponding to, for example, a target register or a package board, and each sub-control section is assigned a unique identification code. Now, during the scan-in-out operation, the main control section 1 first sets a signal (not shown) indicating that control information is being transferred to "1", and sends the control information from the main control register 3 to the path 10 together with the scan tarot.

各副制御部は送られて来る制御情報を副制御レジスタ4
に保持し、制御情報内の識別コードと自分のそれとの一
致をチエツクし、一致した副制御部のみが次におこなわ
れるスキヤンインアウトデータ転送制御に関与する。す
なわち、処理装置から指定されるスキヤンイン・スキヤ
ンアウト識別ビツトがスキヤンインである場合、主制御
部1はスキヤンデータ転送中を示す信号を“1゛にし、
スキ5ヤングロックとともにスキヤンインデータを主制
御レジスタ3からパス10に送出する。該当する副制御
部2は、これを副制御レジスタ4の示すスキヤンアドレ
スの目的レジスタ5にパス12を経て転送する。この時
、パス10とパス12のデー[■■ト幅のようなとき、
副制御部2はデータの編集をおこなうとともにスキヤン
クロツクの制御もおこなう。スキヤンアウトのときは、
デ゛一タは目白勺レジスタ5からパス13を経て選択回
路6に入り、町更にパス11を経て主制御レジスタ3に
転送される。一方、副制御情報レジスタ4に保持された
制御情報は、スキヤンインのときはスキヤンインデータ
が転送されるのに同期してパス15から選択回路6を通
り、パス11を経由して比較回路7の一方の口に入る。
Each sub-control unit stores the control information sent to it in the sub-control register 4.
It checks whether the identification code in the control information matches its own, and only the sub-control unit with a match is involved in the next scan-in-out data transfer control. That is, when the scan-in/scan-out identification bit specified by the processing device is scan-in, the main control unit 1 sets the signal indicating that scan data is being transferred to "1", and
The scan-in data is sent from the main control register 3 to the path 10 along with the scan 5 young lock. The corresponding sub-control unit 2 transfers this to the target register 5 at the scan address indicated by the sub-control register 4 via the path 12. At this time, when the data width of pass 10 and pass 12 is [■■
The sub-control section 2 not only edits data but also controls the scan clock. When scanning out,
The data enters the selection circuit 6 from the main register 5 via a path 13, and is further transferred to the main control register 3 via a path 11. On the other hand, during scan-in, the control information held in the sub-control information register 4 passes from the path 15 to the selection circuit 6 and then to the comparison circuit 7 via the path 11 in synchronization with the transfer of the scan-in data. Enter one mouth.

比較回路7の他方の口には主制御レジスタ3から返送さ
れてきた制御情報の元の情報がパス14を経て入り、一
致チエツクをおこなう。スキヤンアウト時は、目的レジ
スタ5のデータが選択回路6に到達するのが遅れること
等を利用して、選択回路6の入力を切り換え、パス11
をタイムシュアで使用し、スキヤン時と同様にして返送
制御情報の一致チエツクをおこなう。つまり、制御情報
が正しく副制御部2の副制御レジスタ4に保持されたか
否かの正常性チエツクがスキヤンインアウト動作と並行
しておこなわれる。なお、比較回路7で不一致が生じれ
ば、スキヤンアドレスの一部が副制御部2の識別コード
となつているため、故障部分の副制御部の切り分けを容
易に行うことができる。以上説明した如く、本発明によ
れば、副制御部の正常性チエツクがスキヤンインアウト
動作と同様におこなえ、かつ、このために用意すべき選
択回路は、たとえばパス11が1ビツト幅の場合、1副
制御部あたりたかだか数ゲートであり、比較回路も4ゲ
ート程度であるなど、ハードウエアの増加は少ない。
The original information of the control information returned from the main control register 3 enters the other port of the comparison circuit 7 via the path 14, and a match check is performed. At the time of scan out, the input of the selection circuit 6 is switched by taking advantage of the delay in the data in the target register 5 reaching the selection circuit 6, and the input of the selection circuit 6 is switched.
is used in Timesure to check for consistency of returned control information in the same way as when scanning. That is, a normality check to determine whether the control information is correctly held in the sub-control register 4 of the sub-control unit 2 is performed in parallel with the scan-in-out operation. Note that if a mismatch occurs in the comparator circuit 7, since a part of the scan address is the identification code of the sub-control unit 2, it is possible to easily isolate the sub-control unit that is the faulty part. As explained above, according to the present invention, the normality check of the sub-control unit can be performed in the same way as the scan-in-out operation, and the selection circuit that should be prepared for this purpose is, for example, when the path 11 is 1 bit wide. There is only a few gates at most per sub-control unit, and the comparison circuit also has about four gates, so the increase in hardware is small.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明によるスキヤンインアウト制御装置の一実施
例のプロツク図である。 1・・・・・・主制御部、2・・・・・・副制御部、3
・・・・・・主制御レジスタ、4・・・・・・副制御レ
ジスタ、5・・・・・・目的レジスタ、6・・・・・・
選択回路、7・・・・・・比較回路。
The figure is a block diagram of one embodiment of the scan-in-out control device according to the present invention. 1... Main control section, 2... Sub control section, 3
...Main control register, 4...Sub control register, 5...Purpose register, 6...
Selection circuit, 7... Comparison circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 データ処理装置内に存在し、該装置の所望レジスタ
等のスキャンインアウト動作全体を制御する主制御部と
、データ処理装置内に複数分散して存在し、前記主制御
部から転送される制御情報を保持し、この内容によりス
キャンインアウト動作の補助をおこなう副制御部とから
成るスキャンインアウト制御装置において、前記副制御
部は前記主制御部から転送され保持している制御情報を
スキャンインアウトデータ転送時に主制御部に返送する
手段を具備し、前記主制御部は前記副制御部から返送さ
れて来た制御情報を元の制御情報と比較し、副制御部の
正常性チェックを行う手段を具備していることを特徴と
するスキャンインアウト制御装置。
1 A main control unit that exists within a data processing device and controls the entire scan-in/out operation of desired registers, etc. of the device, and a control unit that exists in multiple locations distributed within the data processing device and that is transferred from the main control unit. In a scan-in-out control device comprising a sub-control unit that holds information and assists scan-in-out operations based on the content, the sub-control unit scans in control information transferred from the main control unit and held. The main control unit is provided with a means for sending the data back to the main control unit at the time of out data transfer, and the main control unit compares the control information returned from the sub control unit with the original control information to check the normality of the sub control unit. A scan-in-out control device comprising: means.
JP53000561A 1978-01-09 1978-01-09 Scan-in-out control device Expired JPS5953585B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53000561A JPS5953585B2 (en) 1978-01-09 1978-01-09 Scan-in-out control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53000561A JPS5953585B2 (en) 1978-01-09 1978-01-09 Scan-in-out control device

Publications (2)

Publication Number Publication Date
JPS5494252A JPS5494252A (en) 1979-07-25
JPS5953585B2 true JPS5953585B2 (en) 1984-12-26

Family

ID=11477127

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53000561A Expired JPS5953585B2 (en) 1978-01-09 1978-01-09 Scan-in-out control device

Country Status (1)

Country Link
JP (1) JPS5953585B2 (en)

Also Published As

Publication number Publication date
JPS5494252A (en) 1979-07-25

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