JPS596504B2 - Semiconductor devices and masks for semiconductor device production - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device and a mask for semiconductor device manufacturing, and particularly to a semiconductor device that allows confirmation of the position where a chip is cut out from a wafer, and a semiconductor manufacturing mask used for manufacturing this type of semiconductor device. It is something.

Semiconductor devices are manufactured by performing various manufacturing steps on a single wafer, and after all steps are completed, they are separated into over 100 chips.

During the manufacturing process of semiconductor devices, it is often extremely difficult to ensure uniform conditions across the wafer, and suppressing variations in characteristics between valley devices has become a huge technical challenge. There is. This becomes a particularly serious problem when developing new devices or cutting out a large number of devices from a large wafer for the purpose of cost reduction. For example, FIG. 1 shows the simplest semiconductor strain element. This element 1 has a thin oxide insulating film made of silicon dioxide (SiO2) with a thickness of 0.5 to 1 μm formed on the surface of a silicon substrate. SiO in the center,
A semiconductor gauge 2 with a high impurity concentration created by diffusion etc. is formed on the back surface of the film, and a hole is partially formed in the SiO2 film at the contact portion 3 at both ends of the gauge 2. Electrode pad 4 formed of
Electrical continuity is established.

Such variations in conditions in the processing and manufacturing process of semiconductor strain elements are caused by various factors such as variations in gauge resistance of semiconductor strain elements, polarity in contact parts, breakdown of insulation between gauges due to p-n junctions, etc. In addition, the accuracy of the glass mask used directly causes positional deviation of the valley layer, variation in contact resistance, gauge resistance, etc. Therefore, in order to investigate the causes of poor characteristics of these semiconductor strain elements and to adequately control their quality, it is necessary to know the correlation between the position of each element in the wafer state and the characteristics of the element. Become.
For this reason, when the number of chips cut out from a wafer is small, attempts have been made to display numbers on the chips indicating their positions on the wafer.

Now, when considering the process of producing a large number of semiconductor elements from one wafer, a so-called glass mask is used in this process. To create a glass mask, first create an enlarged view of the pattern required to create one semiconductor element, then reduce this using methods such as photography to create a highly accurate reduced pattern, and then print this pattern on glass. It is created by repeatedly printing in a matrix using a glue heater. Therefore, the valley elements have exactly the same pattern. When semiconductor processing is performed using this glass mask and the valley elements are cut into chips, there is nothing to distinguish the valley elements. Therefore, when using such a glass mask, if you need to put a symbol on the mask to distinguish each element, add a number to each element on the glass mask after creating the matrix with the heater. It was printing. 5 in Figure 1
indicates the element number, and by associating this number with the position of the chip within the wafer, it is possible to know the position at which this element is cut out from the wafer. However, since this method is carried out after creating a matrix using a heater, the work is extremely difficult, and the display is limited to two-digit numbers, which is not practical. It is almost impractical.

However, in practice, the number of chips cut out from a single wafer is often more than 100, so in order to confirm the chip position on the wafer, it is necessary to find a chip at a representative position among the many elements. Management was carried out by sampling the chips and placing them in special jigs with chip numbers written on them to prevent them from being mixed together. Therefore, not only total number control but also sampling method,
The processing process consumes a great deal of extra time and effort, making it impossible to completely control the quality of semiconductor devices.
Workability was also poor. SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor element that is easy to manufacture and whose position cut out from a wafer can be easily read, and a mask for manufacturing a semiconductor element used for manufacturing this semiconductor element. The semiconductor device has an indication of the cutting position of the chips on the wafer on the surface of each chip obtained by cutting a wafer into the shape of a substrate, and the indication is formed on the individual chip. 2 representing the base order
A chip cutting position display column consisting of a dimensional matrix or a one-dimensional matrix obtained by dividing the two-dimensional matrix into a plurality of pieces, and a portion of the matrix corresponding to the cutting position on the wafer in the chip cutting position display column of each chip. The mask for manufacturing semiconductor devices according to the second invention is characterized in that it consists of one or two marks to be displayed, and the mask for manufacturing semiconductor devices according to the second invention is characterized in that it consists of one or two marks to be displayed. In a mask used for manufacturing a semiconductor device having an indication of the cutting position of the chip on the wafer, the mask has a two-dimensional matrix representing the substrate pattern or the two-dimensional matrix on the individual chip.
This device is characterized by having a pattern for forming a chip cutting position display column made of a one-dimensional matrix obtained by dividing a dimensional matrix into a plurality of pieces.

Examples will be described below with reference to the drawings.

FIG. 2 shows an L embodiment of the semiconductor device of the present invention.
Similar to FIG. 1, this shows the simplest semiconductor strain element; the difference from FIG. , in which mark 7 is displayed.

In this case, an example is shown in which the mark display field 6 is provided on the front surface of the element, but it may also be provided on the back surface of the element. FIG. 3 shows a glass mask 8 used in producing this semiconductor strain element, which has 13 rows and 13 columns and is used to form 169 elements, and the mark display column 6 in FIG. It is formed of a matrix having the same arrangement 9 as the mask 8. Therefore, if the mark 7 in the mark display column 6 is associated with the chip position on the wafer, this mark 7
Just by looking at the wafer, you can tell where the device will be cut out from the wafer. This mark display field 6 can be printed with a heater in the same way as the pattern of the semiconductor strain element, so after that, by filling out the mark display field 6 of each element of the repeat pattern or adding an appropriate mark. Glass masks for device creation can be created. In this case, unlike writing numbers, you only have to write a mark, and the chip cutting position on the wafer can be indicated by writing only one point.
It is possible to display not only two digits but also three digits, and since the mark display column 6 is the same as the chip arrangement on the wafer, it is easy to write the mark 1.

In addition, since marks are written on individual chips only by marking dots, the manufacturing of the masks used for marking marks is much more difficult than in the case of using numbers as shown in Figure 1. It's easy to do. Therefore, semiconductor devices with such a mark display field do not need to be placed in a numbered jig even when the valley devices are taken apart, and can be used for chip cutting, cleaning, etching, resistance measurement, gluing, etc. Labor and time in all processes can be greatly reduced,
Work efficiency can be improved. If the mark display field 6 has a very large number of rows or columns, or if the width is narrow and it is not easy to read the position of the mark 7, for example,
As shown in FIG. 4, numbers 10, 11, etc. may be attached to each row or column, or at an appropriate location.

The example in Figure 4 shows a state in which the upper left of the figure is the reference point 0, and the rows and columns of the two-dimensional matrix are marked with symbols 5 and 10 indicating that they are at 5 or 10 scales from the reference point 0. There is. In addition, the mark display column may be arranged not only in the substrate pattern but also in an arrangement similar to the arrangement of chips on a wafer, such as the arrangement of round frames 12 as shown in FIG. An appropriate shape may be selected depending on other circumstances.

FIG. 6 shows another embodiment, which is suitable for cases where there is no space in the device for displaying marks in the form of substrate grids, as in the case of the semiconductor strain device shown in FIG. This is a case where the inside of the element is filled with the circuit section 13 and there is no space for the two-dimensional matrix, and the circuit section 1
3, mark display fields 14 and 15 each consisting of a primary display matrix are provided.

If these one-dimensional matrices 14 and 15 are made to correspond to the row and column matrices of a two-dimensional matrix, the position on the two-dimensional matrix can be determined by two marks 16 and 17 written in each of the two one-dimensional matrices. can be displayed. FIG. 7 shows still another embodiment. For example, the matrix of 3 rows and 3 columns shown in A of the figure is divided into rows and columns and arranged in series as shown in A of the figure.
Alternatively, as shown in FIG. 2, E, it is also possible to use a device arranged in rows and columns at regular intervals.

In this case, as shown in the figure, if characters or numbers indicating rows or columns are added as auxiliary numbers, identification becomes easier. The direction and mark display column indicates that when creating a general semiconductor device, an oxide insulating film such as SiO2 is formed on the chip surface, and electrode pads such as aluminum (Al) are formed on it by a method such as vapor deposition. In these examples, the mark display column and the mark are made of the same material as the electrode pad, since the boundary line of the electrode pad is easier to distinguish with the naked eye or with an optical microscope than that of an oxide insulating film, etc. It was formed by

Therefore, there is no need to add a new process. It goes without saying that the masks used for semiconductor manufacturing have patterns for forming the various mark display fields mentioned above, and not only glass masks but also other materials can be used. You can also use a mask with
Similarly, the desired objective can be achieved.

As described above, the semiconductor device of the present invention makes it possible to reliably confirm the position of the device on the wafer even when the number of chips on one wafer is very large. The mask for manufacturing semiconductor devices of the present invention can save a large amount of labor and time for quality control, and also enables the manufacturing of such semiconductor devices, and can be widely applied to the manufacturing of semiconductor devices. This has great industrial effects.

[Brief explanation of the drawing]

FIG. 1 is a plan view of an example of a conventional semiconductor device, FIG. 2 is a plan view of an embodiment of the semiconductor device of the present invention, FIG. 3 is a plan view of a glass mask for manufacturing semiconductor devices, and FIG. 4 is a plan view of the present invention. FIGS. 5 and 6 are explanatory diagrams of the main parts of other embodiments of the semiconductor device, respectively, and FIG. 7 is a diagram showing the construction method of the main parts of the other embodiments. It is an explanatory diagram. Explanation of symbols, 1... Semiconductor element, 6...
・Mark display column, 7... Mark.

Claims (1)

[Scope of Claims] 1. A semiconductor device having, on the surface of each chip obtained by cutting a single wafer in a grid pattern, indications of the cutting positions of these chips on the wafer, wherein the indication is 2 representing the grid pattern formed on each chip.
A chip cutting position display column consisting of a dimensional matrix or a one-dimensional matrix obtained by dividing the two-dimensional matrix into a plurality of pieces; A semiconductor device characterized by comprising two marks. 2. The semiconductor device according to claim 1, wherein the two-dimensional matrix has the same arrangement as the arrangement of chips on the wafer. 3. The semiconductor device according to claim 1, wherein the one-dimensional matrix is a row and column matrix obtained by dividing a two-dimensional matrix, and is provided around the outer periphery of the chip. 4. The semiconductor device according to claim 1, wherein the two-dimensional matrix or the one-dimensional matrix has a symbol indicating a ranking from a reference point in each row and column. 5. The semiconductor device according to any one of claims 1 to 4, wherein the two-dimensional matrix or the one-dimensional matrix is formed by the same method as the electrodes of the semiconductor device. 6. A mask used for manufacturing a semiconductor device in which the surface of each chip obtained by cutting a single wafer into a grid pattern indicates the cutting positions of the chips on the wafer. , a semiconductor characterized in that it has a pattern on each of the chips for forming a chip cutting position display field consisting of a two-dimensional matrix representing the grid or a one-dimensional matrix obtained by dividing the two-dimensional matrix into a plurality of pieces. Mask for element production. 7. The mask for manufacturing a semiconductor device according to claim 6, wherein the two-dimensional matrix has the same arrangement as the arrangement of chips on the wafer. 8. The mask for manufacturing a semiconductor device according to claim 6, wherein the one-dimensional matrix is a row and column matrix obtained by dividing a two-dimensional matrix, and is provided around the outer periphery of the chip. 9. The mask for manufacturing a semiconductor device according to claim 6, wherein the two-dimensional matrix or the one-dimensional matrix has symbols indicating the order from the reference point in each row and column. 10. The mask for manufacturing a semiconductor device according to any one of claims 6 to 9, wherein the pattern is formed on the same mask as a pattern for manufacturing an electrode of the semiconductor device. 11. A mask for manufacturing a semiconductor device according to any one of claims 6 to 10, wherein the mask is a glass mask.