JPS596530B2 - automatic frequency control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic frequency control device for matching a transmission frequency to a target frequency (modulated frequency of a pulse-modulated received signal) with required accuracy in a microwave transmitter/receiver or the like.

FIG. 1 shows an example of a conventional device of this type.

In the figure, reference numeral 1 denotes a mixer to which a received signal such as a pulse-modulated microwave signal is applied, and in this mixer 1, the modulated frequency of the received signal, that is, the target frequency fl, and the transmission frequency f2 are mixed and intermediated. Frequency 1F (2 f1
~f2). 2 is intermediate frequency 1
3 is a detector that detects the output of the intermediate frequency amplifier 2; 4 is a frequency discriminator that converts the intermediate frequency 1F into a voltage signal; 5 is intermittently output from the frequency discriminator 4. The pulse amplifier 6 that amplifies the voltage signal is a sample hold circuit that catches the voltage signal output from the pulse amplifier 5 when the detector 3 is outputting and holds it for a predetermined time.

1 is a DC amplifier, 8 is a low-pass loop filter that suppresses the closed loop system from oscillating, 9 is a driver, 1
0 is a voltage controlled oscillator that is controlled by the driver 9 and converts a voltage signal into a frequency to create a transmission frequency f2.

This transmission frequency f2 is applied to the mixer 1 and the transmission side. In such an automatic frequency control device, in order to match the transmission frequency f2 with the target frequency fl with the required accuracy δf, it is necessary to set the gain of the automatic frequency control loop system to >Δfl()/δf. be.

Therefore, it is necessary to insert the amplifier 7 after the sample and hold circuit 6. In this way, in the case of an analog system, the droop (droop) of the sample hold circuit 6
) becomes a problem. Furthermore, since the gain of the system is greater than 1, a loop filter 8 must be inserted into the system to compensate for appropriate gain and phase. Designing such a system is generally considered difficult. An object of the present invention is to provide an automatic frequency control device that can reduce the gain of the system to 1 or less.

A specific example of the present invention will be explained in detail below with reference to FIG. In the figure, reference numeral 11 denotes an antenna, which receives a pulse-modulated reception signal with a modulated frequency (target frequency) of f1, and a transmission frequency of F2 which is controlled to match this target frequency. A transmission signal is now being transmitted. 12 is a circulator that controls the passage of the transmission signal and reception signal; 13 is a circulator whose sublocal frequency is F;
A local oscillator 3 generates a sublocal signal, and a submixer 14 mixes the transmission frequency F2 and the sublocal frequency F3 and outputs a local signal at a local frequency (F2+F3).

15 is a main mixer, which mixes the target frequency f1 and the local frequency (F2+F3), or mixes the transmission frequency F2.
and local frequency (F2+F3) to form an intermediate frequency signal of intermediate frequency FIF.

16 is an intermediate frequency amplifier that amplifies the intermediate frequency signal, and 17 is a frequency discriminator that converts the intermediate frequency FIF of the amplified intermediate frequency signal into a voltage signal and outputs it.

This frequency discriminator 17 has a center frequency selected to be F3 in particular, and is structured such that the output voltage is zero when the input frequency is F3. Reference numeral 18 is a detector for detecting an intermediate frequency signal, and reference numeral 19 is a control circuit for controlling various parts based on the detection output as described later.

Reference numeral 20 indicates a sample and hold circuit at the time of transmission, which is controlled by the control circuit 19 and stores the voltage signal of the frequency discriminator 17 only at the time of transmission; and 21, the frequency discriminator 1 which is controlled by the control circuit 19;
This is a high-speed sample-and-hold circuit that stores a new voltage signal only when receiving it every time a voltage signal is output from 7.

22 is an adder circuit, 23 is a first sample-and-hold circuit for output feedback, and 24 is a second sample-and-hold circuit for output feedback. These three circuits return the output each time it is received to the input side. An input/output repeating addition circuit 25 is formed which repeatedly performs the operation of adding to a new input.

That is, the adder circuit 22 adds the output of the high-speed sample-and-hold circuit 21, the output of the transmitting sample-and-hold circuit 20, and the output of the second sample-and-hold circuit 24 for output feedback, and adds the output of the high-speed sample-and-hold circuit 21, the output of the transmitting sample-and-hold circuit 20, and the output of the second sample-and-hold circuit 24 for output feedback. The circuit 23 is configured to store a new memory each time. The second sample and hold circuit 24 for output feedback is configured to store the stored contents of the current time and provide the stored contents to the adder circuit 22 before the first sample and hold circuit 23 performs new storage.
The control circuit 19 includes each sample hold circuit 21, 23, 2
A control signal is issued so that the storage of 4 is performed sequentially at predetermined time intervals upon reception. 26 is a driver, 27 is a high frequency voltage controlled oscillator that is controlled by the driver 26 and converts a voltage signal into a frequency to create a transmission signal of transmission frequency F2, and 28 is a divider that divides the transmission signal into two.

One transmission signal is given to the sub-mixer 14, and the other transmission signal is given to the high frequency amplifier 29 and amplified. 30
is a transmission control switch that is controlled by the control circuit 19 and allows the transmission signal to pass only during the transmission time period.

In such an automatic frequency control device, during the transmission time period, when the transmission frequency F2 follows the target frequency f1 with the required accuracy as described later, the transmission control switch 30 is turned on by a transmission command from the control circuit 19. A transmission signal of frequency F2, which is the output of the high frequency voltage controlled oscillator 27, is amplified by the high frequency amplifier 29, passes through the circulator 12, and is radiated from the antenna 11.

Since the transmission output, that is, the output of the high frequency amplifier 29, is large,
The transmitted signal of frequency F2 enters the receiving system as a leakage signal, reduced by the isolation amount of the circulator 12. Therefore, a part of the transmission signal of frequency F2 is input as the signal input to the main mixer 15, and a local signal of frequency (F2+F3) is input as the local input.
Therefore, the intermediate frequency FIF of the intermediate frequency output is F3. As mentioned above, the center frequency of the frequency discriminator 17 is selected to be F3, so if there is an error of 1 ΔF3 in the center frequency of this frequency discriminator 17, which is the reference, a voltage ΔV3 equal to that error will appear. . When this voltage Δ■3 is transmitted by the command of the control circuit 19, the sample hold circuit 20
If this is stored and added to the automatic control loop at the time of transmission, the error of the frequency discriminator 17 will be automatically corrected. That is, as shown in FIG. 2, when the frequency discrimination characteristic of the frequency discriminator 17 is normal, the center frequency is F3.
If the solid line A is a solid line, and the broken line B is a line when an error of -ΔF3 has occurred, the frequency discriminator 17 to which the frequency F3 is input is
outputs an output of Δ■3 when an error of -ΔF3 occurs. When an error of -ΔF3 occurs, the intermediate frequency FIF is automatically controlled to converge to the frequency of (F3 - ΔF3) at the time of reception, so that the output of the frequency discriminator 17 appears smaller by ΔV3 than when it is normal. 3. In other words, the transmission frequency F2 is ΔF3 higher than normal.
will be accompanied by an error. Therefore, if ΔV3 is applied from the sample-and-hold circuit 20 to the adder circuit 22 during reception, the error will be automatically corrected. Next, the operation during the reception time period will be explained.

A target frequency (reception frequency) f1 is received by the antenna 11, passes through the circulator 12, and is applied to the main mixer 15. In the main mixer 15, the target frequency f1 and the roll frequency (F2+F3) are mixed to produce an intermediate frequency FIF.
(-F2+F3-f1), intermediate frequency amplifier 1
6. The intermediate frequency signal whose frequency is (F2+F3-f1) amplified by the intermediate frequency amplifier 16 is applied to the frequency discriminator 17. The intermediate frequency signal is detected by a detector 18 and becomes a trigger signal for a control circuit 19, and a control signal is given to a high speed sample and hold circuit 21. The frequency difference between the target frequency f1 and the transmission frequency F2 is determined by the frequency discriminator 17.
The voltage is converted into a voltage Δ■, stored in the high speed sample and hold circuit 21, and applied to the adder circuit 22. The addition output of the addition circuit 22 is sent to the first sample hold circuit 2 for output feedback.
The stored contents are then transferred to the second sample-and-hold circuit 24 for output feedback, and field-buttered to the adder circuit 22. sample hold circuit 21,
The sample timings of 23 and 24 are 21 and 23 respectively.
, 24 in the order of pulse repetition period T of target frequency F,
It is done every. In addition to the output signal of the automatic frequency control system's open loop via the high-speed sample-and-hold circuit 21, the addition circuit 22 also receives the output signal from the input/output repeat adder circuit 25 via the second sample-and-hold circuit 24 for output feedback. The output of is given as a feedback signal. Further, an output signal is also provided from the sample and hold circuit 20 during transmission for error correction. The adder circuit 22 adds these three input signals. The addition output is sequentially transferred to the first and second sample and hold circuits 23 and 24, and again to the addition circuit 2.
The feed is sent to the input side of 2 and added to the new input. Such operations are repeated, and the output of the circuit 25 is increased. The output of the input/output repeat adder circuit 25 is given to the Drino'+-26, and the high frequency voltage controlled oscillator 27
is controlled and converted into a transmission frequency F2 according to the output.
Assuming that the gain of the loop is K, the control amount of the high frequency voltage controlled oscillator 27, which is the controlled object, is 1-υ, assuming that the pulse repetition period T during the reception time is n times.

In other words, the gain of the system is equivalent to NK. Generally, the reception time is sufficiently longer than the pulse repetition period T, so it is sufficient that the system open loop gain K is 1 or less. The output of the high frequency voltage controlled oscillator 27, that is, the transmission output having a frequency of F2, is divided into two parts by a divider 28, one of which is given to the sub-mixer 14, and the other given to a high frequency amplifier 29.

When the transmission time comes, a transmission command is issued from the control circuit 19, the transmission control switch 30 is turned on, and the transmission signal is radiated from the antenna 11 via the circulator 12.

Note that the input/output repeating addition circuit 25 may perform analog-to-digital conversion of its input to perform digital processing.

The output is converted into an analog quantity by a digital-to-analog conversion circuit and is then applied to the driver 26. As explained above, in the automatic frequency control device according to the present invention, an input/output repeat adder circuit is inserted in the middle of the loop, and each output of this circuit during reception is returned to the input side of this circuit. Since the structure is such that the operation of adding to the input is repeated, the open loop gain of the system can be reduced to 1 or less.

Therefore, there is no need to include a loop filter for compensating gain and phase in the system, and the design of the system becomes easier. Further, according to the present invention, even if a sample-and-hold circuit exists in the system, there is no need to insert an amplifier after it, and the problem of droop in the sample-and-hold circuit is also eliminated.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional device, FIG. 2 is a characteristic diagram of a frequency discriminator, and FIG. 3 is a block diagram showing an example of a device according to the present invention. 15...Mixer, 17...Frequency discriminator, 22...Addition circuit, 23...First
sample hold circuit, 24...second sample hold circuit, 25...input/output repeat adder circuit, 27...・Voltage controlled oscillator.

Claims (1)

[Claims] 1. Mix the target frequency and the transmission frequency with a mixer and convert it into an intermediate frequency, convert this intermediate frequency into a voltage signal with a frequency discriminator, and convert this voltage signal into a transmission frequency with a voltage controlled oscillator. In an automatic frequency control device that controls a part of this transmission frequency to match the target frequency by returning a part of this transmission frequency to the misaki as described above, there is a An automatic frequency control device characterized in that it has a structure in which an input/output repeating addition circuit is provided, and the operation of returning each output of this circuit to the input side of this circuit and adding it to a new input is repeatedly performed. 2. The input/output repeating addition circuit includes an addition circuit, a first sample and hold circuit for output feedback, and a second sample and hold circuit for output feedback, and the addition circuit is connected to the output of the frequency discriminator. The output of the second sample and hold circuit is input, the first sample and hold circuit receives the output of the adder, and the second sample and hold circuit receives the output of the first sample and hold circuit. An automatic frequency control device according to claim 1, having the structure.