JPS598968B2 - Level discrimination circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION As a level discrimination circuit, there is a differential amplifier type circuit as shown in FIG. 1, for example.

That is, the emitters of transistors Q1 and Q2 are connected to a constant current source X1 to configure a differential amplifier A1 for voltage comparison, and a resistor R1 is connected to the base of transistor Q1.
, R2 supplies the bias voltage to the transistor Q
A threshold voltage (reference voltage) Vb is supplied to the base of transistor Q2 through voltage dividing resistors R3, R, and output terminal T1 is drawn out from the collector of transistor Q2.

Then, the signal V to be level determined from the previous stage circuit A2
a is supplied to the base of transistor Q1.

Note that Sg is a signal source and r is an output impedance.

However, when this level discrimination circuit is implemented as an IC, the relative values of the resistors R1 to R4 will vary by only about ±5%, but the absolute values will vary by about ±20%. The threshold level for level determination varies widely.

That is, if there is no variation in the absolute values of the resistors R1 to R4, the input signal Va
When the level of is higher than the threshold voltage vb,
Since the transistor Q2 is turned off and turned on when the voltage is low, an output signal Eb as shown by the solid line in FIG. 2B is taken out from the terminal T1.

However, if Ea: the output level of the signal source Sg, Va: the input level of the transistor Q1, then if the absolute value of the resistor Rl J R2 varies in nanometers and becomes large, for example, it will become as shown by the broken line in Figure 2A. , the amplitude of the input signal Va increases.

However, since the relative value of the resistor Rlt R2 does not vary much, the DC level of the input signal Va hardly changes.

Furthermore, since the relative values of the resistors R3 and R4 do not vary much, the threshold voltage vb also hardly changes.

Therefore, in this case, the output signal Eb obtained at the terminal T1
becomes as shown by the broken line in FIG. 2B, that is, the apparent threshold level for the input signal Va changes.

In view of these points, the present invention provides resistors R1 and R2.
This is intended to prevent the apparent threshold level for the input signal from changing even if the absolute value of the input impedance varies and the input impedance varies.

Therefore, in the present invention, when this level discrimination circuit is implemented as an IC as shown in FIG. 3, for example, a resistor R5 is externally connected in parallel to the resistor through a terminal T4.

According to such a configuration, the threshold voltage vb is expressed by the following equation.

Therefore, if there is no variation in the absolute values of the resistors R1 to R4, and for the sake of simplicity, let R3=R, = R5=R, then Wb20.333Vcc.

On the other hand, if there are variations in the absolute values of the resistors R3 to R, the threshold voltage vb changes as follows.

However, since the resistor R5 is an external resistor, the variation in its absolute value can be suppressed to within ±5%.

In other words, if the absolute value of the resistor R3 j R4 varies in a large direction (!t f!), the threshold voltage vb will be the standard value regardless of the variation in the absolute value of the resistor R, It becomes lower than the value 0.333Vcc.

Furthermore, when the absolute values of resistors R3, J, and R4 vary in the smaller direction (in the case of iii, iV), the threshold voltage vb remains at the standard value of 0. It becomes higher than 333Vcc.

Therefore, when the absolute values of the resistors R, ~R4 vary in the larger direction, the amplitude of the input signal Va increases, as shown by the broken line in FIG. Since vb becomes low as shown by the broken line, the output signal Eb becomes the same as when there is no variation in the absolute values of the resistors R0 to R4, as shown in FIG. 4B.

Furthermore, if the absolute values of the resistors R1 to R4 vary in the smaller direction, the amplitude of the input signal Va becomes smaller, but at the same time, the threshold voltage vb increases, so the values of the resistors R1 to R4 also decrease. This is the same as when there is no variation in absolute values.

In other words, even if the absolute values of resistors R1 to R4 vary,
Since the threshold voltage vb changes accordingly, changes in the output signal Eb due to variations in the absolute values of the resistors R1 to R4 are corrected.

Thus, according to the present invention, even if the relative values of the resistors R1 to R4 vary, changes in the apparent C threshold level with respect to the input signal can be corrected, and a constant output signal can always be obtained.

Moreover, the C correction requires only one external resistor R, and is simple and inexpensive.

Although the above description deals with the case where the base bias voltage is not supplied to the transistor Q1 by the resistors R1 and R2, the present invention is also applied when the base bias voltage is supplied from the circuit A1 in the previous stage. can.

[Brief explanation of drawings]

FIG. 1 is a connection diagram of a conventional example, FIG. 2 is a diagram for explaining the same, FIG. 3 is a connection diagram of an example of the present invention, and FIG. 4 is a diagram for explaining the same. A0 is a front-stage circuit, X1 is a constant current source, and T1 is an output terminal.

Claims (1)

[Claims] 1. A level discrimination element to which an input voltage to be compared is supplied and a voltage dividing resistor for supplying a reference voltage for level discrimination to this level discrimination element are formed in a common IC, and the voltage dividing resistor is An external terminal is drawn out from the voltage dividing point of the device to the outside of the IC, and an external correction resistor having a variation in absolute value smaller than that of the voltage dividing resistor is connected to this external terminal. A level discrimination circuit connected in direct current parallel to one of the voltage dividing resistors mentioned above.