JPS59970B2 - How to use the handbook - Google Patents
How to use the handbookInfo
- Publication number
- JPS59970B2 JPS59970B2 JP50061652A JP6165275A JPS59970B2 JP S59970 B2 JPS59970 B2 JP S59970B2 JP 50061652 A JP50061652 A JP 50061652A JP 6165275 A JP6165275 A JP 6165275A JP S59970 B2 JPS59970 B2 JP S59970B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- substrate
- semiconductor
- junction
- electron beam
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Description
【発明の詳細な説明】
本発明は半導体に光あるいは電子線を照射した際に生ず
る誘起電流の変化から、半導体のP−N−N+あるいは
N−P−P+などの構造の接合(あるいは境界)位置を
迅速に求める方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention detects junctions (or boundaries) of P-N-N+ or N-P-P+ structures in semiconductors based on changes in induced current that occur when semiconductors are irradiated with light or electron beams. Concerning how to quickly determine location.
特に、同一導電型で不純物濃度の異なる接合(あるいは
境界)位置の測定に適した方法に関する。シリコン、ゲ
ルマニウム、あるいは■−V族、■−■族金属間化合物
等の半導体素子において、特性の向上のためにp−p+
あるいはN−N+のような同一導電型であつて不純物濃
度のみが異なるような構造がよく使われる。In particular, the present invention relates to a method suitable for measuring junction (or boundary) positions of the same conductivity type but different impurity concentrations. In semiconductor devices such as silicon, germanium, ■-V group, ■-■ group intermetallic compounds, p-p+
Alternatively, a structure such as N-N+, which has the same conductivity type but differs only in impurity concentration, is often used.
例えば、パワートランジスタにおいてコレクタ層をp−
p+あるいはN−N+の二重構造で形成し、コレクタ、
エミッタ飽和電圧特性(VcE(sat))特性等の向
上を図つている。その際、濃度の低いPあるいはN層の
厚さが素子の特性に大きな影響を及ぼすことは周知の通
Dである。従来この種の濃度変化境界を測定する方法と
して、測定試料を斜め研磨した後、研磨面に電極針を立
てて広がル抵抗を位置の関数として記録する方法が用い
られているが、測定試料作成及び測定時間に長い時間を
必要とし、かつ上記測定試料の研磨角の補正が常に必要
であわ、測定精度は高くなかつた。そこで、本発明の目
的は半導体基板内の接合位置を測定するのに測定操作が
簡単で、測定時間が短かく、しかも測定精度の極めて高
い新規な接合位置1定方法を提供するにある。For example, in a power transistor, the collector layer is p-
Formed with p+ or N-N+ double structure, collector,
Efforts are being made to improve emitter saturation voltage characteristics (VcE(sat)) characteristics, etc. In this case, it is a well-known fact that the thickness of the low-concentration P or N layer has a large effect on the characteristics of the device. Conventionally, the method used to measure this type of concentration change boundary is to diagonally polish the measurement sample, then set an electrode needle on the polished surface and record the spreading resistance as a function of position. It took a long time to prepare and measure, and it was always necessary to correct the polishing angle of the measurement sample, so the measurement accuracy was not high. SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a new method for determining a bonding position in a semiconductor substrate, which is easy to operate, takes a short measurement time, and has extremely high measurement accuracy.
本発明は半導体に光あるいは電子線を照射した際に生ず
る誘起電流の変化に着目し、この誘起電流変化から半導
体基板中の不純物濃度の異なる複数領域間の接合位置を
直接容易かつ迅速に識別することを特徴とする方法であ
る。The present invention focuses on the change in induced current that occurs when a semiconductor is irradiated with light or electron beams, and from this change in induced current, it is possible to directly, easily and quickly identify the junction position between multiple regions with different impurity concentrations in a semiconductor substrate. This method is characterized by the following.
即ち、本発明は不純物濃度の異なる複数の領域間に形成
される接合が半導体基板表面にまで達し、しかも基板表
面が薄い絶縁膜によつて被われている半導体基板に電子
あるいは光を照射し上記半導体基板表面に電荷反転層も
しくは蓄積層を形成し、ついで電子ビームあるいは光ビ
ームを上記基板表面に達する接合を横切つて上記基板表
面を走査させる接合位置測定方法である。本発明に於て
、電子線又は光線を照射し、半導体基板表面に電荷反転
層又は蓄積層が生じる原因は半導体基板表面に一般に存
在することの知られている表面準位のうち特に半導体表
面に、通常自然に存在する薄い酸化膜(絶縁膜)あるい
は積極的に設けた薄い絶縁膜中の卦そい表面準位の占有
率が変化し、照射部分に反転層あるいは蓄積層が形成さ
れることに起因する。That is, in the present invention, the junction formed between a plurality of regions having different impurity concentrations reaches the surface of the semiconductor substrate, and the surface of the substrate is covered with a thin insulating film by irradiating electrons or light onto the semiconductor substrate. This is a bonding position measuring method in which a charge inversion layer or an accumulation layer is formed on the surface of a semiconductor substrate, and then an electron beam or a light beam is scanned across the substrate surface across the bond that reaches the substrate surface. In the present invention, the cause of the formation of a charge inversion layer or an accumulation layer on the surface of a semiconductor substrate by irradiation with an electron beam or a light beam is determined by the surface states that are generally known to exist on the surface of a semiconductor substrate. , the occupancy rate of the diagonal surface states in the thin oxide film (insulating film) that normally exists naturally or the thin insulating film that has been actively provided changes, resulting in the formation of an inversion layer or an accumulation layer in the irradiated area. to cause.
この反転層や蓄積層の形成は半導体領域の不純物濃度に
よつて大きく左右され、不純物濃度の低い表面ほど形成
され易い、複数の領域で不純物濃度の低い領域に相当す
る部分に多くの反転層もしくは蓄積層が形成され、その
結果、そこでの誘起電流が大きくなシ、この誘起電流値
の差によつて領域間の接合位置が祭知し得る。この様に
、表面での反転層や蓄積層の形成の程度がその部分の不
純物濃度によつて左右されることを利用した本発明によ
る方法によれば、従来のこの種の測定よジもはるかに容
易に半導体中の濃度の異なる複数領域の境界を識別する
ことが可能となる。以下、本発明の実施例を図にもとず
き更に詳述する。The formation of this inversion layer or accumulation layer is greatly influenced by the impurity concentration of the semiconductor region, and the formation of the inversion layer or accumulation layer is more likely on the surface with a lower impurity concentration. An accumulation layer is formed, as a result of which the induced current is large, and the junction position between the regions can be determined by the difference in the induced current value. In this way, the method of the present invention, which takes advantage of the fact that the degree of formation of an inversion layer or accumulation layer on the surface depends on the impurity concentration in that area, is far superior to conventional measurements of this type. It becomes possible to easily identify the boundaries of multiple regions with different concentrations in the semiconductor. Hereinafter, embodiments of the present invention will be described in more detail with reference to the drawings.
第1図は本発明の一実施例を示す模式図である。FIG. 1 is a schematic diagram showing an embodiment of the present invention.
1は走査型電子顕微鏡において試料に人射する電子ビー
ム、2は半導体基板、3卦よび4は共に2とは異なる導
電型を有する半導体基板であり相互に濃度のみが異なる
。Reference numeral 1 denotes an electron beam irradiated onto a sample in a scanning electron microscope; 2 a semiconductor substrate; 3 and 4 both semiconductor substrates having a conductivity type different from 2 and differing from each other only in concentration.
5及び6は上記領域の接合面をあられす。5 and 6 abrade the joint surfaces of the above regions.
接合面5,6の端面はそれぞれ半導体基板の表面まで達
している。7は2,3,4の如きPN接合を有する半導
体基板の接合面を電子ビームによつて照射する際に発生
する誘起電流を増巾するための増巾器を示す。The end faces of the bonding surfaces 5 and 6 each reach the surface of the semiconductor substrate. Reference numeral 7 indicates an amplifier for amplifying the induced current generated when the bonding surface of a semiconductor substrate having a PN junction such as 2, 3, or 4 is irradiated with an electron beam.
電子ビーム1を第1図に示すようにPN接合端面を横切
つて走査し、それによつてPN接合の両端に誘起される
起電力を位置Xの関数として表示すると、第2A図に示
す如きPN接合位置に極大を有するような曲線の得られ
ることは従来からよく知られていた。When the electron beam 1 is scanned across the end face of the PN junction as shown in Fig. 1, and the electromotive force induced at both ends of the PN junction is expressed as a function of the position X, the PN as shown in Fig. 2A is obtained. It has been well known that a curve having a maximum at the joining position can be obtained.
然しながら、この様な標準的な測定法によつては、3,
4の様に同一導電型で濃)度のみが異るような二領域は
識別できない。However, with such standard measurement methods, 3.
Two regions of the same conductivity type but different only in concentration cannot be distinguished, as in No. 4.
然るに本発明に卦いて試料の測定しようとする面を、上
配p如き標準的な測定条件で測定するに先立つて予め分
布測定を行な訃うとする面全体を電流値の大きな電子ビ
ームで照射して卦いた後、曲線8を得たと同様の観測を
行えば、第2B図に示す如き9のような曲線が得られ、
PN接合の位置6だけでなく、同一導電型で濃度の異る
二領域の境界7の位置も同時に確定できる。本実施例で
は試料としてP−N−N+あるいはN−P−P+の様な
三層構造をあげたが三層以上の構造を有する試料であつ
ても同様に識別可能であることは言うまでもない。However, in the present invention, before measuring the surface of the sample to be measured under standard measurement conditions such as the upper surface, distribution measurement is performed in advance and the entire surface to be measured is irradiated with an electron beam having a large current value. After calculating this, if we perform the same observation as we obtained curve 8, we will obtain a curve 9 as shown in Figure 2B,
Not only the position 6 of the PN junction but also the position of the boundary 7 between two regions of the same conductivity type and different concentrations can be determined at the same time. In this embodiment, a three-layer structure such as P-N-N+ or N-P-P+ is used as the sample, but it goes without saying that samples having a structure of three or more layers can be identified in the same way.
な卦、上記実施例に卦いては走査型電子顕微鏡の電子ビ
ームを用いて測定する場合について述べたが、光走査型
顕微鏡のような装置を用いて第1図の電子ビーム1のか
わbに可視もしくは紫外線を卦きかえて、光によつてP
N接合部を含んで分布測定を行な卦うとする表面に反転
層あるいは蓄o積層(表面から50〜100A程度の深
さにまで形成される)を形成し、その時の光起電力を増
巾器7の入力として使つて、同様の測定を行なつても同
様の結果が得られる。Note that in the above embodiments, the measurement was performed using the electron beam of a scanning electron microscope. By changing visible or ultraviolet light, P by light
An inversion layer or an accumulation layer (formed to a depth of about 50 to 100 A from the surface) is formed on the surface where distribution measurement is to be performed, including the N junction, to increase the photovoltaic force at that time. Similar results can be obtained by performing similar measurements using this as an input to the instrument 7.
また第3図のように測定を行おうとする表面に光線10
を用ぃて、可視あるいは紫外光を照射して表面に反転層
もしくは蓄積層を形成して卦いた状態で、その表面を通
常の標準的な条件の電子ビームで走査し、その時生じる
誘起電流の分布を位置の関数として表示しても上記実施
例と同様の結果が与えられる。また、上記実施例に卦い
ては、半導体表面に卦いては、半導体表面に訃いて自然
に存在する酸イI中の準位に電荷を蓄積?せて、半導体
基板表面に反転層もしくは蓄積層を形成する例を示した
が、半導体基板表面に意図的に、例えは熱酸化層、熱分
解によつて形成した絶縁層等を形成しても同じような結
果を与えることが可能である。Also, as shown in Figure 3, a light beam of 10
After forming an inversion layer or accumulation layer on the surface by irradiating it with visible or ultraviolet light, the surface is scanned with an electron beam under normal standard conditions, and the induced current generated at that time is measured. Displaying the distribution as a function of position also provides similar results to the above embodiment. In addition, in the above embodiments, electric charges are accumulated on the semiconductor surface in the levels of the acid I that naturally exists on the semiconductor surface. Although we have shown an example of forming an inversion layer or an accumulation layer on the surface of a semiconductor substrate, it is also possible to intentionally form a thermal oxidation layer, an insulating layer formed by thermal decomposition, etc. on the surface of a semiconductor substrate. It is possible to give similar results.
第1図は本発明の一実施例の状態を示す模式図、第2A
図は第2C図に示したような試料を従来の方法で測定し
た時に与えられる誘起電流の分布図、第2B図は、本発
明方法で同様に測定した時に与えられる誘起電流の分布
図、第2C図は本発明の一実施例に用いた試料の模型図
、第3図は本発明の別の実施例の状態を示す模式図であ
る。
向、図中同一符号は同一又は相当部分を示し、1は電子
ビーム、2は半導体基板、3,4は半導体領域、5,6
は接合、7は増巾器、10は可視もしくは紫外線である
。FIG. 1 is a schematic diagram showing the state of one embodiment of the present invention, and FIG.
The figure is a distribution diagram of the induced current given when the sample shown in Figure 2C is measured using the conventional method, and Figure 2B is a distribution diagram of the induced current given when similarly measured using the method of the present invention. FIG. 2C is a model diagram of a sample used in one embodiment of the present invention, and FIG. 3 is a schematic diagram showing the state of another embodiment of the present invention. The same reference numerals in the figures indicate the same or corresponding parts, 1 is an electron beam, 2 is a semiconductor substrate, 3 and 4 are semiconductor regions, 5 and 6
is a junction, 7 is an amplifier, and 10 is visible or ultraviolet light.
Claims (1)
が半導体基板表面にまで達し、しかも上記基板表面が薄
い絶縁膜によつて被われている半導体基板に電子あるい
は光を照射し、上記半導体基板表面に電荷反転層もしく
は蓄積層を形成し、ついで電子ビームあるいは光ビーム
を上記基板表面に達する接合を横切つて上記基板表面を
走査させるとともに前記半導体基板間に発生する誘起電
流を検出して半導体基板中の不純物濃度の異なる複数の
領域間の接合位置を測定するにあつて、予め測定を行な
おうとする面全体に電流値の大きな電子ビームを照射し
ておくことを特徴とする半導体基板内の接合位置測定方
法。1. A semiconductor substrate in which junctions formed in multiple regions with different impurity concentrations reach the surface of the semiconductor substrate, and the surface of the substrate is covered with a thin insulating film is irradiated with electrons or light, and the semiconductor substrate is A charge inversion layer or an accumulation layer is formed on the surface, and then an electron beam or a light beam is scanned across the surface of the substrate across the junction reaching the surface of the semiconductor substrate, and the induced current generated between the semiconductor substrates is detected. In a semiconductor substrate, the entire surface to be measured is irradiated with an electron beam having a large current value in advance when measuring the junction position between a plurality of regions having different impurity concentrations in the substrate. A method for measuring the joint position.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50061652A JPS59970B2 (en) | 1975-05-22 | 1975-05-22 | How to use the handbook |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50061652A JPS59970B2 (en) | 1975-05-22 | 1975-05-22 | How to use the handbook |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS51137382A JPS51137382A (en) | 1976-11-27 |
| JPS59970B2 true JPS59970B2 (en) | 1984-01-10 |
Family
ID=13177360
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50061652A Expired JPS59970B2 (en) | 1975-05-22 | 1975-05-22 | How to use the handbook |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59970B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2937557B2 (en) * | 1991-07-12 | 1999-08-23 | 株式会社東芝 | Diffusion layer depth measuring device |
-
1975
- 1975-05-22 JP JP50061652A patent/JPS59970B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS51137382A (en) | 1976-11-27 |
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