JPS599863B2 - Video pulse specification measuring device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION This invention is applicable to radar and electronic countermeasures.
The present invention relates to a video pulse measurement device for measuring the pulse width and pulse interval of a noisy video signal in the field (generally referred to as ECM).

A conventional device of this type is shown in FIG.

In the figure, 1 is the slice circuit, 2 is the video signal to be measured, 3 is the reference level of the slice circuit 1 that separates noise and signals, 4 is the quantized video determined to be a signal, and 5 is the pulse of the quantized video 4 a pulse width counter that measures the width, 6
is a frequency dividing circuit that reduces the repetition of quantized video 4 to 1/2,
7 is the frequency-divided pulse obtained as a result, 8 is a pulse interval counter, 9 is a basic clock supplied as a timing signal to the pulse width counter 5 and the pulse interval counter 8,
10 is the measured pulse width signal which is the output of the counter 5, and 11 is the measured pulse interval signal which is the output of the counter 8. Next, the operation will be explained.

When the video signal 2 exceeds the reference level 3, it is sliced by the slicing circuit 1 and becomes a quantized video 4. Second
As shown in the figure, the quantized video 4 is at the "H" (meaning High) level while the video signal 2 exceeds the reference level 3, and is at the b" (meaning L0W) level when it is below the reference level 3. While the quantized video 4 is at the "H" level, the number of basic clocks 9 is counted by the pulse width counter 5, and this output is taken as the pulse width signal 10. To measure the pulse interval, the quantized video 4 is divided into 1/2 by the dividing circuit 6 as shown in FIG.
get. The pulse interval counter 8 counts how many basic clocks 9 are input during the "H" level of the frequency divided pulse 1, and this output is used as the pulse interval signal 11.

Since the conventional video pulse specification measuring device is configured as described above, if the input video signal 2 has a rise time and a fall time, the reference level 3 is different from the level of the video signal 2. There was a drawback that the measured pulse width and pulse interval differed depending on the location, that is, errors occurred.

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and it measures the pulse width and pulse interval at a level a certain level below the video signal level, and calculates the rise time and rise time of the video signal. It is an object of the present invention to provide a video pulse specification measuring device that is not affected by fall time and has small errors.

An embodiment of the present invention will be described below with reference to FIG.

In FIG. 3, the same reference numerals as in FIG. 1 indicate the same or corresponding parts. 12 is a multi-stage slicing circuit having a plurality of slicers that slices the video signal 2 to be measured; 13 is a video edge detection circuit that performs rise and fall differentiation on the output signal of each slicer of the multi-stage slicing circuit 12 and calculates a logical sum for each of the output signals. , 14 is a counting circuit that counts the number of rising edge signals 15 and falling edge signals 16 that are output signals of the video edge detection circuit 13; 17 is a timer circuit that operates for a certain period of time and counts the number of basic clocks 9; 18; is the value of the timer circuit 17, that is, the time signal 17a
This is a group of rise time registers having a shift register configuration in which the data is read and temporarily stored by the first command pulse 21 from the control circuit 20, and FIG. 3 shows a case where three registers are used.

19 is a fall time register that reads and temporarily stores the value of the timer circuit 17, that is, the time signal 17a, in response to the second command pulse 22 from the control circuit 20; 20 is an output signal of each slicer of the multi-stage slicing circuit 12; 23 is a control circuit that controls each circuit 18, 19, 23, 24, and 25 from a rising edge signal 15 and a falling edge signal 16, which are output signals of the video edge detection circuit 13, and the count value of the counting circuit 14; A selection circuit selects the value of one of the registers 18 for rise time according to the signal 20a of the control circuit 20, 24 is a pulse interval calculation circuit that calculates the pulse interval from the output value of the selection circuit 23, and 25 is a selection circuit. This is a pulse width calculation circuit that calculates the pulse width from the output value of 23 and the output value of the fall time register 19.

Further, FIG. 5 shows a detailed circuit diagram of the video edge detection circuit 13, and FIG. 6 shows a signal waveform diagram of each part thereof. is the edge detection circuit of each level,
This consists of first and second flip-flops 30, 31 and an AND circuit 32.

Reference numeral 33 denotes an OR circuit for calculating the logical sum of the outputs of the edge detection circuits A, . Next, the operation will be explained in detail step by step. When the video signal 2 is input, the multi-stage slice circuit 1
The data is quantized by each slicer of 2. The video edge detection circuit 13 differentiates the rise and fall of each quantized signal for each level, and
By calculating the logical sum of the differential pulses with respect to O, a rising edge signal 15 and a falling edge signal 16 are obtained as shown in FIG. At this time, if the rising edge of the quantized signal, which is the output of the slicer at each level of the multi-stage slicing circuit 12, is not temporally the same with respect to the basic clock 9, the video edge detection circuit 13 shown in FIG. It is possible to prevent the pulses from overlapping. That is, circuit 1 in FIG.
3, the basic clock 9 is connected to the first and second flip-flops 3 to detect the rising edge of the quantized signals 12a1 to 12a0 of each level.
In addition to the T inputs of 0 and 31, differentiation is performed using the basic clock 9, and the differentiated pulse is added to the AND circuit 32 with the basic clock 9 and removed by the basic clock 9, thereby preventing the differentiated pulses of each level from overlapping. It is. If the rises of the quantized signals of each level are shifted in time in this manner, the rising edge signal 15 resulting from the logical sum is also generated as a pulse shifted in time. The same applies to the falling edge signal 16. In the case of Figure 4, the first
The number and time of the command pulses 21 are the same as the rising edge signal 15, but each time this first command pulse 21 arrives,
In the rise time register group 18, the output 17a of the timer circuit 17 is read to the first register 18a while shifting the contents of the second register 18b to the third register 18c and the contents of the first register 18a to the second register 18b. It's crowded. Therefore, in FIG. 4a, when the video a disappears, the first, second, third registers 18a, 18b,
The contents of 18c are T6, t5, and t4, respectively, and
When video b disappears, T, 8, t, 7, tl6
becomes. The quantity of this register depends on how far below the peak level of the video the pulse width and pulse interval are measured. When the reference level of each slicer in the multi-stage slicing circuit 12 is set in 1 dB steps, if the number of registers in the rise time register group 18 is three, measurement will be performed at a level 3 dB below the peak. In this case, based on the result of counting the number of rising edge signals 15 in the counting circuit 14, the control circuit 20 calculates the value of the third register 18c if the counted value is 3 or more, and the value of the second register 18b if the counted value is 2. If the value is 1, a control signal 20a is output to the selection circuit 23 to select the value of the first register 18a. Then, from the selection circuit 23, the video a
The value of T4 for video b and the value of T,6 for video b are output to the pulse interval calculation circuit 24 and the pulse width calculation circuit 25. Next, when the video starts to fall, the falling edge circuit 20 will not send the second command pulse 22 to the falling time register 19 if the count value of the falling edge signal 16 counted by the counting circuit 14 becomes greater than 3. and prohibits reading the value of the timer circuit 17. In this way, from the falling time register 19, for video a, T,
, and for video b, the value of T2l is output to the pulse width calculation circuit 25. In the pulse interval calculation circuit 24,
The output value from the selection circuit 23 for the video Va immediately before the video Vb is subtracted from the output value from the selection circuit 23 for the video b. That is, the pulse interval 11 is obtained by performing the calculation Tl6 - T4. Pulse width calculation circuit 2
5, the value of the selection circuit 23 is subtracted from the value of the fall time register 19. That is, for video a, T9-
For T4 and video b, the calculation T2l-T,6 is performed to obtain a pulse width of 10. That is, the multi-stage slice circuit 1
If the reference level of each slicer of video signal 2 is set at 1 dB steps, the pulse width is measured at a level point that is 3 dB lower than the peak level of video signal 2. In addition,
In the above embodiment, a circuit is provided to count the number of falling edge signals 16, and the second command pulse 22 is controlled based on this counted value. By comparing the peak level with the output signal of the multi-stage slicing circuit 12, the point in time when the video signal 2 falls by a certain level from the peak level may be detected, and the second command pulse 22 may be output. .

Further, although the above embodiment is useful when the level fluctuates, such as a video signal in a radar or ECM, the same effect can be obtained for a measuring instrument that fluctuates the pulse width or repetition frequency.

As described above, according to the present invention, the pulse interval and pulse width are measured at a level that is a certain level below the peak level of the video signal. As well as obtaining the value,
This has the effect of obtaining a pulse width that meets commonly used definitions.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a conventional video pulse specification measuring device, Fig. 2 a-f is a waveform diagram of each part of the conventional video pulse specification measuring device, and Fig. 3 is a video pulse according to an embodiment of the present invention. The block diagram of the specification measuring device, Fig. 4 a-f is a waveform diagram of each part of the video pulse specification measuring device, Fig. 5 is a detailed circuit diagram of the video edge detection circuit, and Fig. 6 a-e is a diagram of each part of the video pulse specification measuring device. It is a signal waveform diagram. 12...Multi-stage slice circuit, 13...
Video edge detection circuit, 14... Counting circuit, 1
7...Timer circuit, 18...Rise time register group, 19...Fall time register, 20...Control. Circuit, 23...
...Selection circuit, 24...Pulse interval calculation circuit,
25...Pulse width calculation circuit.

Claims (1)

[Claims] 1. A multi-stage slicing circuit having multiple slicers that slices a video signal at multiple levels, and video edge detection that detects the rising edge and falling edge of the output signal for each level of this multi-stage slicing circuit and performs a logical sum on each. a counting circuit that counts rising edge signals and falling edge signals of the output signal of the video edge detection circuit;
a timer circuit operated by a basic clock; a control circuit that generates first and second command pulses and control signals based on the output of the counting circuit, the output of the multi-stage slicing circuit, and the output of the video edge detection circuit; The first command pulse is generated from the control circuit when the edge signal is present, and the register group for rising time stores the output of the timer circuit. a falling time register that stores the output of the timer circuit upon generation of two command pulses; and a selection circuit that selects a value of one of the rising time registers based on a control signal from the control circuit. , a video pulse width calculation circuit that calculates a video pulse width from the output of the selection circuit and the output of the fall time register, and a video pulse interval calculation circuit that calculates a video pulse interval from the output of the selection circuit. A video pulse specification measuring device characterized by: