JPS599963B2 - Pulse separation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse separation circuit for digital signals.

As is well known, as a means of recording information on a storage device,
There is a method in which a clock that determines the time is written, and if there is data between the clocks, it is written as a logical "1", and if there is no data, it is written as a logical "o".

When reproducing information written in this manner, the clock and data must be separated. In this case, if the interval between data and clock pulses is constant, separation is relatively easy, but if the time interval is irregular, complete separation without error is not easy. For example, if data and clocks are recorded alternately at regular time intervals on a recording device such as a magnetic disk storage device,
The reproduced signal is obtained as an irregular pulse train whose pulse intervals are close to predetermined intervals. Conventionally, when separating data and clock from a pulse train consisting of data pulses and clock pulses with irregular pulse intervals as described above, ten circuits shown in FIG. 1 have been used.

In FIG. 1, 1 is a phase difference detection circuit, 2 is a sawtooth wave control circuit, 3 is a sawtooth wave generation circuit, and 4 is a clock/data separation circuit. To explain the principle of operation, the sawtooth wave generating circuit 3 generates a sawtooth wave, and the phase difference detection circuit 1 detects the position of the input coupler 15 on the sawtooth wave. For example, if an input pulse arrives at a position lower than the center of the sawtooth wave, the sawtooth wave control circuit 2 controls the sawtooth wave to rise quickly, anticipating that the next pulse will also come at the same position. , so that it gradually comes to the center 20 of the sawtooth wave. If a pulse with a constant width is obtained from the trailing edge of the sawtooth wave as an output, a pulse train with approximately constant pulse intervals of several bits before and after a certain output pulse can be obtained. If the output pulse train is approximately constant, the clock and data of the pulse train can be easily separated, and this is done by the separation circuit 4. This situation is shown in FIG.

Here, P1 to P9 of DATA-1 indicate pulse trains reproduced from the storage device, and 5TB-P()51 to 59 are pulse trains sampled for a certain period of time from the rising edge 30 of P1 to P9. T1 to T9 of SH-1 are sawtooth waves, and TG-P is a signal for causing the sawtooth waves to fall. Further, DATA-2 indicates a pulse train output from the pulse separation circuit. In Figure 2, 3 from P1 and P2 of DATA-1
5 created 51 and 52 are the period Ti of the sawtooth wave SH-1
, are synchronized at the center of T2. And this output is DAT
These are Pl' and P2' of A-2. Next, P of DATA-1
When data with a narrower interval between DATA-2 and P3 is read, STB-P sampled from P3 of DATA-1
O) S3 is detected at a position lower than the center of T3 of the sawtooth wave SH-1. Then, if the sawtooth wave control circuit 2 controls the sawtooth wave SH-1 to gradually rise, DA
STB-P sampled from TA-1 is S4, S
5..., it comes to be located at the center of the sawtooth wave SH-1. That is, synchronization is completed when STB-P comes to the center of sawtooth wave SH-1. and input DATA-1
For P1, P2..., Pν of output DATA-2,
P2'... is obtained. Since the time intervals of Pν, P2'-, . . . are approximately constant, the clock and data can be easily separated from the pulse train. By the way, in conventional circuits, when an input pulse that causes a phase difference falls exactly at the falling part of the sawtooth wave, subsequent input pulses also fall at the falling part of the sawtooth wave, and it is difficult to escape from there. It is unclear whether an input pulse that falls on the falling edge of this sawtooth wave belongs to the previous sawtooth wave or the next sawtooth wave, and as a result, the clock is misjudged as data and the data is misjudged as clock. That will happen. SUMMARY OF THE INVENTION An object of the present invention is to provide a pulse separation circuit that can operate stably even when an input pulse falls at the falling edge of a sawtooth wave.

FIG. 3 is a diagram showing the principle of the present invention. In the figure, a phase difference detection circuit 1, a sawtooth wave control circuit 2, a sawtooth wave generation circuit 3,
The configuration of the clock/data separation circuit 4 is the same as that shown in FIG. It is detected that the generated input pulse falls into the falling part of the sawtooth wave, and the sawtooth wave is controlled so that the next read pulse is located at the center of the sawtooth wave. An embodiment of the present invention is shown in FIG. 4, and a time chart for explaining its operation is shown in FIG. In the pulse train of FIG. 5, consider the case where data is sent in which a phase difference occurs between Pm and Q1, which is the joint between the pulse train P1 to Pm and the pulse train Q1 to Qn.

Such a phase difference occurs because, for example, in the case of a magnetic disk storage device, Q is generated asynchronously with respect to the pulse train of P1 to Pm.
This occurs when a pulse train of 1 to Qn is written and read out. It is assumed that STB-P(7) S1 and S2, which are generated by pulses Pm-1 and Pm, respectively, are controlled by the sawtooth wave control circuit 2 so as to be located approximately at the center of SH-1. However, next time, when STB-PO) S3 created by the input pulse Q1 with a different phase difference falls to the falling edge of SH-1, the next STB-PO) S4 and S5 also become S.
It is expected to be located at the falling part of H-1, and STB-
It becomes difficult for P to escape from the falling portion of SH-1. The STB sampled from the input data in Figure 5 shows this situation.
-PO) S3, S4... and the sawtooth wave SH-1. In the configuration shown in FIG. 4, the gate 6 detects that STB-PO) S3 has fallen to the falling edge of SH-1. That is, detection is performed under the AND condition of STB-P and TG-P given from the phase difference detection circuit 1 and the sawtooth wave generation circuit 3. Then, the flip-flop 7 is set by the output of the gate 6. By setting the flipflop 7, the oscillation of the sawtooth wave SH-1 in the sawtooth wave generation circuit 3 is stopped, and the time is determined so that the next pulse will be in the middle of the sawtooth wave. In the example of FIG. 4, the flip-flop 7 set by the gate 6 is set by the signal passed through the inverter 8 from DADA-1. This resetting method can be used as long as the pulse width of the input data DATA-1 is around the width of the rising portion of the sawtooth wave SH-1. In addition to the method described above, the flip-flop 7 may be reset by delaying the signal TG-P by using a delay line. When the oscillation of the sawtooth wave SH-1 is stopped by the flip-flop 7 and then oscillated again, S4, which follows S3, escapes from the falling edge of SH-1. This situation can be seen in the STB-P shown in Figure 5 and the sawtooth wave S obtained by the conventional circuit.
Comparing the relationship with H-1 and the relationship between STB-P and the sawtooth wave SH-2 when the circuit of the present invention is added, it is found that SH
-2, when S3 of STB-P falls to the falling part of the sawtooth wave, when the sawtooth wave is paused and oscillated again, S
TB-PO) S4 differs from conventional circuits in that it is located approximately at the center of the sawtooth wave of SH-2. and,
As pulses are sent (STB-PO) S5, S6, etc., STB-P becomes stable in the middle of SH-P. FIG. 6 shows an example of the configuration of the clock/data separation circuit 4, and FIG. 7 shows a time chart for explaining its operation.

Note that the clock/data separation circuit 4 also separates the clock and data from the output pulse train DATA-2, but its configuration will be omitted. In FIG. 6, the flip-flop 41 is set in STB-P, and the flip-flop 41 is
AND gate 4
2, and the output of the AND gate 42 activates a monostable multivibrator (one shot circuit) 43. Second
DATA-2 in Figures and Figure 5 is the one-shot circuit 43.
is obtained as the output of The flip-flop 41 set at STB-P is connected to the DAT via an AND gate 46.
It is reset by the rising pulse of A-2. 44 is a delay circuit, and 45 is an inverter. When DATA-2 becomes "1", the output of AND gate 46 immediately becomes "1", which is determined by the delay time of delay circuit 44.

The state is restored to "O" after a predetermined time. As is clear from the above explanation, according to the present invention, even if pulses with different phase differences come in and fall at the falling edge of the sawtooth wave, synchronization can be completed in a short time and data and clock can be corrected. It becomes possible to separate them.

[Brief explanation of drawings]

FIG. 1 shows a block diagram of a conventional pulse separation circuit. FIG. 2 is an explanatory diagram of the basic operation of the pulse separation circuit of FIG. 1. FIG. 3 is a block diagram of the improved pulse separation circuit of the present invention. FIG. 4 shows an embodiment of the invention. Fifth
The figure is an explanatory diagram of the operation of FIG. 4. FIG. 6 is a concrete block diagram of the clock/data separation circuit. FIG. 7 is an explanatory diagram of the operation of FIG. 6.〇1...Phase difference detection circuit, 2
... Sawtooth wave control circuit, 3 ... Sawtooth wave generation circuit, 4 ... Clock data separation circuit, 5 ... Abnormal pulse detection/sawtooth Wave control signal generation circuit.

Claims (1)

[Claims] 1. Take in a pulse train in which data and clock are arranged alternately, detect the phase difference between the input pulse train and the sawtooth wave, and thereby control the rise of the sawtooth wave to bring the input pulse train to the center of the sawtooth wave. In a pulse separation circuit that obtains a pulse train at approximately constant intervals in this way and separates data and clock, it detects when the input pulse train falls into the rising edge of a sawtooth wave, and the next input pulse is a sawtooth wave. A pulse separation circuit comprising means for temporarily stopping generation of the sawtooth wave so as to be located at the center of the wave.