JPS6010663B2 - How to switch function modules - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for switching functional modules, that is, a method for switching and connecting only normal modules from among a required number of functional modules having the same configuration.

As a result, in order to remedy failures or manufacturing defects, several functionally equivalent modules are prepared, with the exception of one active module, the others standing by to switch to active in the event of failure of the active module. A method is used.

The module switching method for such a standby redundant system is to disconnect a defective module from among the k active modules required for this button, and disconnect any one of the n-k spare modules. It is being incorporated. However, when this switching method is performed using hardware, if the degree of freedom in switching, that is, the number of spare modules that can be switched to one defective module, is greater than 1, switching control will specifically determine which spare module to switch to. There is a disadvantage that there are multiple circuits and the amount of hardware increases accordingly. Also, in this case, if the required number of active modules is k and the total number of modules including spare modules is n, the configuration of the switching control circuit will differ depending on the values of k and n, so if k is set to a constant value, In this case, it is not possible to arbitrarily increase or decrease the number of spare modules to be added, and there is a lack of flexibility. The purpose of the present invention is to eliminate these drawbacks by making it possible to construct a switching control circuit using a simple circuit, a small amount of hardware, and to freely increase or decrease the number of spare modules compared to the originally required number of modules. The object of the present invention is to provide a flexible module switching method.

The present invention transmits a module identification signal specifying the role of each module between each module constituting the device, and transmits the module identification signal and the quality information generated within each module.
When the own module is defective, it is disconnected, and when it is good, it is connected according to its role, according to the defect display signal.
The above objective is achieved by generating the following module identification signals:

Hereinafter, embodiments of the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram conceptually showing a module switching method according to the present invention.

In FIG. 1, 1 is a device having calculation, storage, or other processing functions, and is composed of n machine modules Z modules 2. In FIG.

If k or more of the n modules 2 operate normally, the original function of Fukurotaka can be exhibited. For example, by making one module 2 correspond to one of the k data lines 3 and connecting the k modules 2 to the data line 3, data signals are inputted and outputted between them.
One module 2 includes a switching control section 4, a functional section 5, and a switching circuit 6.

When the switching control unit 4 receives the module identification signal from the signal line 7, it sends the switching control signal to the switching circuit 6 via the control line 8, and at the same time sends the module identification signal to the signal line 7 to the adjacent module 2. Send. The functional unit 5 is a part that performs the original function of the device 1, and the signals processed or transmitted here are sent from the input/output line 9 to the data line 3 via the switching circuit 6. An input signal is received from line 3 via switching circuit 6 and input/output line 9 .

The connection between the input/output line 9 and the data line 3 is controlled by a switching circuit 6, and the switching circuit 6 responds to the switching control signal of the control line 8 so that the module 2 plays the role specified by the module identification signal. Therefore control. FIG. 2 is a detailed block diagram of the switching control section in FIG. 1.

The switching control section 4 includes a flag 11, an arithmetic circuit 14, and a selection circuit 15.

When the module identification signal is input to the arithmetic circuit 14 and the selection circuit I5 via the signal line 7, the arithmetic circuit 14 performs an operation between the module identification signal on the signal line 7 and the fixed information on the signal line 12, and selects the next module. 2 is generated and sent to the selection circuit 15, while the selection circuit 15 receives the module recognition U signal input by the output of the flag 11,
One of the module identification signals resulting from the calculation is selected and sent to the adjacent module 2. The flag 11 indicates whether the module 2 is "good" or "defective." For example, if it is "good," it is "rl," and if it is "defective," it is "0." When the result is ``good,'' the calculation result is selected, and when the result is ``defective,'' the input module approval U signal is selected. Furthermore, the module identification signal on the signal line 7 and the failure signal on the output line 10 are as follows:
It becomes a switching control signal and is sent to the switching circuit 6 via the control line 8. As described above, when the failure signal is r-good, the switching circuit 6 switches the input/output signal of the functional unit 5 to one of the data lines 3 designated by the module identification signal of the signal line 7. but the fault signal is "bad"
When , all data lines 3 are activated. Note that the arithmetic circuit 14 in FIG. 2 generates the "modular identification signals corresponding to the Ryoichi modules, which are originally required by the device 1 in FIG. Then, the calculation result of arbitrary Ai and fixed information is Ai+,
It performs calculations such that . For example,
Examples include addition of 1 modulo k, which will be described later. 1 and 2, how only k good modules are selected from no modules 2 to configure the device 1. In the device 1 shown in FIG. To explain this, assuming that the leftmost module (MI) 2 is "defective" and its neighbor (M2) is "good", first, in the leftmost module (MI) 2, the module identification signal of the signal line 7 is set to Ao. Set.

Note that if the calculation result for AK-, is Ao, any Ai may be set. Since this module (MI) is "defective", the flag 11 outputs "0", and the input/output signal is initially separated from the data line 3 by the switching circuit 6. Further, the arithmetic circuit 14 outputs the arithmetic result A, but since the failure signal is "0", the next module identification signal remains Ao. In the next module (M2) 2, since the input module identification signal is the input module identification signal cancer, the corresponding data line 3 and the input/output signal are connected by the switching circuit 6, so this module (M2) 2 is the leftmost one. It will play the role of a module (MI). Furthermore, the module identification signal to the next module (M3) 2 becomes A, and the role to be played is assigned to that module (M3).
tell to. The other modules also perform the same operations as above according to their "good" and "bad", and as a result, k "good" modules are selected from the leftmost end in FIG. 1, and the device 1 is configured. In the above configuration, it is necessary to set the flag 11 so that only k out of n flags become "1", but if the module identification signal is AK-, and the flag 11 of that module outputs "1" If you add a circuit to each module that forces the fault signal of the next module to become "0", k or more will become "1".
It is easily assumed that it is okay to set .
Because of this configuration, disconnection of the "bad" module,
The installation of spare modules can be achieved automatically and with a small amount of hardware. Furthermore, if k is constant, the configuration of each module, especially the configuration of the switching control section 4, is exactly the same regardless of the number of spare modules (n-k), so the number of modules n can be freely selected. Become. Furthermore, in the above explanation, the role of each module is to be connected to the data line corresponding to the module identification signal, but the role is to be connected to the data line corresponding to the module identification signal. Of course, the method of the invention can be applied. Next, when we choose addition of 1 modulo k as the operation,
A more specific example will be described.

As an example, the switching method of the present invention is applied to a 4-bit slice ALU (Arithmetic and Logc Unit).
) When applied to an arithmetic device with a data width of 16 bits consisting of four modules, Fig. 3 shows the overall configuration of the device when k = 4, n = 6, and Fig. 4 shows the specific structure of the module. A configuration example is shown. Further, FIG. 3 shows module identification signals when the leftmost (MI) module and the fourth module from the left (M4) are "defective." Here, as the module identification signal, positive integers 0 to 3 are expressed in 2-bit binary numbers corresponding to h~~n, and are used for the exclusive OR circuits 16, 17 and The AND circuit 18 functions as the arithmetic circuit 14 and selection circuit 15 in FIG. That is, when the flag 11 outputs "1", "1" is added to the module identification signal, when the flag is "rc", "0" is added, and the calculation result is sent to the next module M... The configuration is such that the signal line 7 is used as a module identification signal. Also, the logical sum circuit 19. AND circuit 20-2
3, and 24 to 27 are input signal lines 2 of the ALU 28, respectively.
9. Control the connection between the output signal line 30 and the data lines 31 to 34. That is, the ALU 28 receives the value A of the module identification signal when the flag 11 is "1". ~A3 is connected to one of the data lines 31 to 34 corresponding to each, and flag 1 is set.
When 1 is "0", it is separated. In addition, here Ao
, A,, n, data lines 31, 32, 33, 3
4 are connected respectively. Furthermore, each of the input signal 29, output signal line 30, and data lines 31 to 34 is a 4-bit signal, but in FIGS. 3 and 4, this is represented by one signal line. When the modules M1 and M4 at the positions of the x marks as shown in FIG. The switching control unit 4 shown in FIG. 4 selects "0" from the left. "0re"1ri"2re"2","3
”.

The flags 11 of the "defective" modules M1 and M4 indicated by cross marks are "0", and are disconnected from the data lines 31-34. Therefore, in this arithmetic device, the second module M2 from the left connects to the data line 31, the third module M3 connects to the data line 32, the fifth module M5 connects to the data line 33, and the last module M6 connects to the data line 34. Connects the ALU28 in the module, and connects the data lines 31 to 34 as a whole.
It will function as an ALU for the ALU. That’s all, A.L.
Although the connection between the input/output signals of U28 and the data lines 31 to 34 has been described, other signals can be similarly processed.

For example, when performing a 1-bit shift in this arithmetic unit, it is necessary to send a 1-bit shift signal from each ALU 28 to the ALU 28 of the next module MM via the signal line 35, as shown in FIG. Regarding this 1-bit shift signal, as shown in FIG.
37, flag 1 1 is set to “1” by OR circuit 38
When the flag 11 is "0", the signal from the ALU 28 is
In this case, the 1-bit shift signal from the previous module Mi- is sent as the 1-bit shift signal to the next module MM. This allows the shift signal of the "bad" module to be disconnected. moreover,
It is easily assumed that the substitution method of the present invention can be applied not only to the arithmetic device described here but also to, for example, a memory device with a spare added in the bit direction. The most effective method of the present invention is to use addition modulo "K" with "1" selected as fixed information for the calculation performed on the module identification signal, and divide it in the bit direction and perform calculations or processing in units of several bits. In the case of an arithmetic unit consisting of multiple modules that performs Selected from signals external to the module by the identification signal,
In addition, for modules whose flag is displayed as "defective",
It is characterized in that signals input and output to the module are separated from signals outside the module by outputting a flag.

As explained above, according to the present invention, when selecting a required number from a required number or more of functional modules having the same configuration, by sequentially transmitting a module identification signal specifying the role of each module between each module, Since the separation of "defective" modules and the installation of spare modules are controlled by the module identification signal, the amount of hardware required for switching control is small, and the degree of freedom in switching is large, even when the required number is fixed. There is an advantage that the number of spare modules can be set arbitrarily and can be fixed without changing the configuration of the switching control section.

[Brief explanation of the drawing]

FIG. 1 is a block diagram preconceptionally showing the module switching method in the present invention, FIG. 2 is a detailed block diagram of the switching control section in FIG. 1, and FIG.
, a block diagram showing an embodiment when n=6, FIG. 4 is a block diagram of a module when the present invention is applied to an arithmetic operation consisting of an ALU of 4 bit slices, and FIG. 5 is a block diagram showing an embodiment when n=6. FIG. 3 is a configuration diagram of a module when switching bit shift signals. 1: Device, 2: Module, 3, 31, 32, 33, 3
4: data line, 4: switching control section, 5: functional section, 6: switching circuit, 7: module identification signal line, 8: switching control signal line, 9: input/output signal line, 10: failure signal line, 11:
Flag, 12: Fixed information line, 13: Operation result signal line, 1
4: Arithmetic circuit, 15: Selection circuit, 16, 17: Exclusive OR circuit, 18, 20, 21, 22, 23, 24, 25
, 26, 27, 36, 37: AND circuit, 19, 38:
OR circuit, 28: ALU, 29: Input signal line, 30:
Output signal line, 35:1 bit shift signal line. Figure 1 Figure 2 Figure 3 Figure 4 Figure 5

Claims (1)

[Claims] 1. In a device equipped with more than the required number of functional modules with the same configuration, a module identification signal specifying the role of each functional module is sequentially transmitted between each functional module, and the "good", "good", " and a calculation means for performing calculations on the input module identification signal to generate a signal that is different from any signal generated up to the own module, and the display means displays "good". When the display means indicates "defective", the output of the calculation means is sent out as the next module identification signal, and the function of the own module is performed. 1. A function module switching method characterized by transmitting signals to a module and disconnecting the own module.