JPS6014309B2 - electricity bill meter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention also relates to a power meter that contributes to power saving.

Conventionally, general consumers have been able to know the amount of power they have used using a power meter, but in order to know how much it will cost, they have had to do some detailed calculations.

That is, the fee is based on the basic fee and the unit price, which varies depending on the amount of power used, but is the sum of the consumption fee. Therefore, it is impossible for general consumers to use the subsidiary power meter as a means to grasp the power usage status, and the power saving effect will not be improved. An object of the present invention is to be able to set a target amount of electricity charges, display the maximum amount of available electricity within the set target amount, and reduce the electricity charges from the target amount every moment depending on the amount of electricity used. It is an object of the present invention to provide an electricity rate meter capable of displaying the remaining amount of money.

An embodiment of the present invention will be described below with reference to the drawings.

The non-contact current detector 1 electromagnetically detects the load current flowing through the power line without contact, and Z-detects the load current from the power line connected to the current limiter. The plug 2 is inserted into an outlet provided on a power line and takes out the load voltage. The current output of the non-contact current detector 1 and the voltage of the plug 2 are input to the power-to-frequency conversion circuit 3, where they are first proportionally reduced to a current and voltage suitable for semiconductor components, and then multiplied to produce a current or voltage proportional to the power. and then into pulses with a frequency proportional to the power. This pulse is frequency-divided by a frequency dividing circuit 4 at a rate of one pulse per unit electric energy. The basic charge/unit price setting section 5 consists of four numerical value setters 2DS, DS2, DS3, and DS4, and a numerical value setter OS. For example, the basic charge is "Numerical setting device DS2 has a unit price per unit electric energy up to 120KWH, Numerical setting device DS3 has a unit price of, for example, 121KWH or more and 20feW or less, and Numerical setting device DS4 has a unit price of 201KWH or more, for example. 3 unit prices are set respectively.

The boundary value setting section 6 consists of two numerical value setters DS5 and DS6, and boundary values of the amount of power at which the unit price changes, for example, 120 KWH and 20 female WH, are respectively set in these numerical value setters DS5 and DS6. In the target amount setting section 7, a target amount of electricity charges for a certain period of time, for example, 3' months, is set.
At the start of power rate measurement, a start signal is input to the set input terminal S of the R-S flip-flop FF3 and the single pulse generation circuit 8. At the start of measurement, the maximum usable power amount within the target amount is calculated and displayed by the maximum usable power amount display circuit 9, and its operation will be explained first. When the R-S flip-flop FF3 is set, the AND gate G5 opens and the output of the frequency divider circuit 4 becomes the first
OR gate G. of gate circuit 10 And it becomes possible to input it to the OR gate G6 connected to the power consumption counting circuit 11.

On the other hand, the single pulse generation circuit 8 generates a single pulse reset signal, and the reset signal passes through the OR gate G7 to reset the boundary value selection circuit 12.
selects the numerical value setter Dmi and sets its setting value to 120 (KWH
) is output to the second comparison circuit 13. The reset signal is R-
The S flip-flop FF4 is reset to 0, and the ± display circuit 14 displays 10, and at the same time, the R-S flip-flop FF is connected to the up/down switching input terminal U/D of the remaining amount counting circuit 15, which is a presettable up-down counter.
Input the low level signal of 4 and set it to subtraction operation. The reset signal is inputted to the preset terminal PE of the remaining amount counting circuit 15 via the OR gate G8, whereby the remaining amount counting circuit 15 stores the target amount as a preset value. The reset signal passes through the OR gate Q to the OR-S flip-flop FF of the second gate circuit 16.
Enter 2, set this, and open AND gate G3. The reset signal resets the basic charge/unit price selection circuit 17, selects the numerical value setter DS, and outputs the value of the basic charge to the first comparison circuit 18 from the output terminal OUTI. The reset signal passes through the OR gates G,o, resets the power consumption counting circuit 11, and also causes the delay circuit 19 and the OR gates G, . Write signal input terminal C of the latch circuit 20 via
L is input to the latch circuit 20' and the power consumption counting circuit 1
Store the count value of 1 as zero. Therefore, at this point, the maximum usable power amount display circuit 9 displays zero.

The reset signal sets the R-S flip-flop FF5 of the third gate circuit 21 and opens the AND gate G,2.
The reset signal resets the frequency divider circuit 4. Also,
The reset signal passes through the OR gate GM and sets the R-S flip-flop FF, and its set output opens the AND gate G2.

By opening the AND gate G2, the oscillation circuit 22
The high frequency pulses outputted by the unit are inputted to the basic charge/unit price zero counting circuit 23 and counted. At the same time, it is also input to the remaining amount counting circuit 15, and the number of high-frequency pulses is subtracted from the target amount. When the basic charge/unit price counting circuit 23 counts a number of high-frequency pulses equal to the value of the basic charge, the first comparison circuit 18 outputs an output. This output resets the basic charge/unit price counting circuit 23, resets the R-S flip-flop FF, closes the asod gate G2, and sends a high frequency signal to the remaining amount counting circuit 15 and the basic charge/unit price counting circuit 23. Cut off pulse input. Therefore, the count value of the remaining amount counting circuit 15 becomes (target amount - basic fee), and the remaining amount display circuit 24 displays this. At the same time, the output of the first comparator circuit 18 is the AND gate G
3 and OR gate ○4, and input it as a selection control signal to the clock terminal CL of the basic charge/unit price selection circuit 17,
The numerical value setter DS2 is selected. As a result, the unit prices for up to 12 dishes WH set in the value setter DS2 are output to the first comparison circuit 18. The output of the first comparator circuit 18 is delayed by a delay circuit 25, and the output of the first comparison circuit 18 is delayed by a delay circuit 25,
It is input to the reset input terminal R of F2 to reset it and close the AND gate G3. AND gate G. of the first comparison circuit 18. The output that passes through OR gates G and 3 and is delayed by a delay circuit 26 passes through OR gate G and sets R-S flip-flop FF, opens AND gate G2, and outputs R-S flip-flop FF7.
, and open AND gate G,4. When the AND gate G2 is opened, the high frequency pulses of the oscillation circuit 22 are input to the basic charge/unit price counting circuit 23 and the remaining amount counting circuit 15, and are counted up to the unit price value set by the numerical setting device DS2. When the count value of the basic charge/unit price counting circuit 23 becomes equal to the unit price value of the value setter DS2, the first comparison circuit 18 outputs an output, and the basic charge/unit price counting circuit 23 and R-S flip-flop F
F, is reset and AND gate G2 is closed. Also,
The output of the first comparison circuit 18 is an AND gate G, 2, G, 4
It passes through the OR gate G6 and is input to the power consumption counting circuit 11, where it is counted as "1". Remaining amount counting circuit 15
The calculated value is (target amount - basic fee - IKWH fee based on unit price up to 120KWH). And Gate G3
is closed, the output of the first comparison circuit 18 is the basic charge. It is not sent to the unit price selection circuit 17, and the unit price value remains unchanged. The output of the first comparison circuit 18 which has passed through the delay circuit 25 is input to the reset input terminal R of the RS flip-flop FF2, but since the RS flip-flop FF2 is in the reset state, the output does not change. With the output of the first comparator circuit 18 counted as "1" by the power consumption counting circuit 11, at the same time as the counting of the consumption charge of the first IKWH is completed, the output of the first comparator circuit 18 is changed to the AND gate G. , 2, through the OR gate G, 3 and the delay circuit 26 to the OR gate G, to start counting the metered charge of the second IKWH. The above operations are repeated continuously, and the remaining amount counting circuit 15
The count value of is subtracted from the output mirror of the first comparator circuit 18 by the unit price value. When the count value of the power heavy duty counting circuit 11 becomes equal to the boundary value (120KWH) set by the value setting device Dmi, the second comparison circuit 13 sends a selection control signal to the boundary value selection circuit 12 via the delay circuit 27. , Numerical setting device DS
6 is selected, and at the same time, the selection control signal is sent to the OR gate G.
4 to the basic charge/unit price selection circuit 17, and causes the numerical value setter DS3 to select it.

Thereafter, the unit price subtracted by the remaining amount counting circuit 15 for each output of the first comparison circuit 18 becomes the value set by the numerical value setting device DS3. Similarly, power consumption counting circuit 1
When the count value of 1 becomes equal to the boundary value (20 skin WH) set by the numerical value setting device Niji S6, the basic charge/unit price selection circuit 17 selects the numerical value setting device DS4, and from then on, the output of the first comparison circuit 18 The unit price subtracted from the remaining amount each time becomes the value set by the numerical value setter DS4. Third comparison circuit 2
8 compares the remaining amount of the remaining amount counting circuit 15 with the basic fee or unit price value output from the basic fee/unit price selection circuit 17 every time the output of the first comparison circuit 18 is input to the synchronization terminal SY. Then, when the former becomes smaller than the latter, output is produced.

This output is input to the reset input terminal R of the R-S flip-flops FF5 and FF7 of the third gate circuit 21, and
These are reset and AND gates G,2 and G,4 are closed. The output of the third comparison circuit 28 is the OR gate G, . is input to the write signal input terminal CL of the latch circuit 20 through
As a result, the latch circuit 20 stores the count value of the power consumption counting circuit 11 at that time. This count value is the maximum usable power amount within the target amount, and is displayed by the maximum usable power amount display circuit 9. Thereafter, the output of the third comparison circuit 28 delayed by the delay circuit 29 is output to the OR gate G.
, o to reset the power consumption counting circuit 11. Third
The output of the comparison circuit 28 is the R-S flip-flop FF5.
is reset, the input signal of the up/down switching input terminal U/D of the remaining power amount counting circuit 30 is set to low level, and the subtraction operation is set. Preset the count value, that is, the maximum usable power amount. The output of the third comparison circuit 28 is the boundary value selection circuit 12 and the basic charge/unit price selection circuit 17.
, set the R-S flip-flop FF2 of the second gate circuit 16, and open the AND gate G3.
The remaining amount counting circuit 15 is reset to the target amount. This completes the calculation of the maximum amount of power used.
The remaining amount display circuit 24 displays the target amount, and the maximum usable power amount display circuit 9 displays the maximum usable amount of power within the target amount. Since the output terminal OUT2 of the basic charge/unit price selection circuit 17 outputs a high-level signal only when the numerical value setter DS is selected, the output terminal OUT2 of the basic charge/unit price selection circuit 17 The signal from opens AND gate G,5.

As a result, the output of the third comparison circuit 28 becomes the AND gate G
,5, set the R-S flip-flop FF, via the OR gate G,3, the delay circuit 26 and the OR gate C,
AND gate G2 is opened, thereby starting a normal measurement operation. When the AND gate G2 is opened, a high frequency pulse is input from the oscillation circuit 22 to the remaining amount counting circuit 15 and the basic charge/unit price counting circuit 23, the basic charge subtraction operation is performed, and the remaining amount counting circuit 15 is (target amount - Basic charge) is subtracted and counted. Hereafter, the unit price electricity amount (IKWH
) is consumed and the frequency divider circuit 4 outputs one pulse, the output pulse of the frequency divider circuit 4 passes through the AND gate G5 and is input to the OR gate G of the first gate circuit 10, and a unit price subtraction operation is performed. will be held. Further, the output pulses of the frequency dividing circuit 4 are integrated in the power amount counting circuit 11 and subtracted from the maximum usable power amount in the remaining power amount counting circuit 30. The remaining amount counting circuit 15 calculates (target amount - basic fee -
Displays the remaining amount of usage fee). When the count value of the remaining amount counting circuit 15 becomes zero, that is, when the electricity amount charge becomes equal to the target amount, the first all-digit zero detection circuit 3
1 detects this, sets the R-S flip-flop FF4, and causes the ±display circuit 14' to display a minus value.

At the same time, the set output of the R-S flip-flop FF4 is applied to the up/down switching input terminal U of the remaining amount counting circuit 15.
/D to switch it to addition operation. From then on,
The remaining amount counting circuit 15 adds and counts the high frequency pulses, and the remaining amount display circuit 24 displays the amount exceeding the target amount as a minus. When the count value of the remaining power amount counting circuit 30 becomes zero, the second all-digit zero detection circuit 32 detects this, sets the R-S flip-flop FF6, and sets the remaining power amount counting circuit 30 to addition operation. Switch. The subsequent count value of the remaining power amount counting circuit 30 is the excess power amount. If a display circuit is connected to the remaining power amount counting circuit 30', the remaining power amount can be displayed. Furthermore, if a display circuit is connected to the power amount counting circuit 11, the amount of power used can be displayed. When the stop signal is input to the R-S flip-flop FF3, the AND gate G5 is closed and the measurement operation is stopped.

However, the remaining amount counting circuit 15 and the electricity amount counting circuit 11
and the count value of the counting circuit 30 for remaining electric energy and the latch circuit 20
The stored value of is retained. The maximum usable power amount display circuit 9, the soil display circuit 14, and the remaining amount display circuit 24 continue to display. As the remaining amount counting circuit 15 and the remaining power amount counting circuit 30, a presettable down counter that performs only a subtraction operation may be used.

In the present invention, the boundary value setting section sets the amount of electricity by changing the unit price per unit amount of electricity, the basic charge/unit price setting section sets the basic charge and a unit price that varies depending on the amount of electricity used, and the target amount setting section sets the amount of electricity. The first circuit outputs the target amount of electricity charges and simulates the output pulse of the frequency dividing circuit at the start of measurement.
The output of the comparison circuit is output continuously, and the remaining amount counting circuit, which is preset to the target amount, subtracts and counts the basic charge and the metered charge from the target amount for each output of the first comparison circuit, and the remaining amount is calculated as the basic amount. The operation is stopped when the electricity rate or unit price becomes 4.0% lower, and the integrated value of the output of the first comparison circuit up to that point is displayed as the maximum usable electricity amount, so the target amount for electricity charges can be set. The maximum usable power amount within the target amount can be displayed. In addition, the output of the third comparison circuit that finishes the operation of calculating the maximum available electric energy starts the regular measurement operation, subtracts the basic charge from the target amount, and calculates the unit electric power for each output pulse of the frequency dividing circuit. Since the usage fee is subtracted from the calculation, the remaining amount can be displayed every moment.

[Brief explanation of drawings]

The drawing is a block diagram showing one embodiment of the present invention. 3... Power-frequency conversion circuit, 4... Frequency dividing circuit, 5
... Basic charge/unit price setting section, 6... Boundary value setting section,
7... Target amount setting unit, 9... Maximum available power amount display circuit, 10... First gate circuit, 11... Power amount counting circuit, 12... Boundary value selection circuit, 13...・Second
Comparison circuit, 15... Remaining amount counting circuit, 16...
Second gate circuit, 17... Basic charge/unit price selection circuit,
18... First comparison circuit, 20... Latch circuit, 21
...Third gate circuit, 22...Oscillation circuit, 23...
・Basic charge/unit price counting circuit, 24... Remaining amount display circuit, 28... Third comparison circuit.

Claims (1)

[Claims] 1. A power-frequency converter circuit that detects electric power and outputs a pulse with a frequency proportional to the electric power; and a frequency divider circuit that converts the pulse output by the power-frequency converter circuit into one pulse per unit electric energy and outputs the pulse. , an oscillation circuit that outputs high-frequency pulses, a boundary value setting section that sets the boundary value of the amount of electricity at which the unit price per unit amount of electricity changes, and a basic rate/unit price setting that sets the basic rate and a unit price that varies depending on the amount of electricity used. a target amount setting section that sets a target amount for the electricity rate; and a basic rate/unit price selection circuit that sequentially selects the basic rate and unit price set by the basic rate/unit price setting unit each time a selection control signal is input. A first gate circuit that passes through the reset signal or the output pulse of the frequency divider circuit or the third gate circuit, is opened by the delayed output of the first comparator circuit or the output of the third comparator circuit, and is closed by the output of the first comparator circuit. and a remaining amount counting circuit which takes the target amount set by the target amount setting section as a preset value and subtracts the number of high-frequency pulses of the oscillation circuit passing through the first gate circuit from the target amount, and a remaining amount counting circuit. A remaining amount display circuit that displays a numerical value as the remaining amount, a basic charge/unit price counting circuit that counts the high frequency pulses of the oscillation circuit that passes through the first gate circuit, and a counter circuit that counts the output pulses of the frequency dividing circuit or the high frequency pulses of the oscillation circuit that passes through the third gate circuit. 1 Compare the count value of the power amount counting circuit that counts the output of the comparison circuit and the basic charge/unit price counting circuit with the value of the basic charge or unit price selected by the basic charge/unit price selection circuit. A first comparator circuit outputs an output when they become equal and resets the basic charge/unit price counting circuit, and is opened by the reset signal or the output of the third comparator circuit, and uses the output of the first comparator circuit as a selection control signal to calculate the basic charge.・Send to unit price selection circuit, first
The second gate circuit, which is closed by the delayed output of the comparison circuit, compares the count value of the electric energy counting circuit with the boundary value, and when the two become equal, sends a selection control signal to the basic rate/unit price selection circuit. A second comparison circuit that sends the remaining amount, a third gate circuit that is opened by the reset signal and closed by the output of the third comparison circuit, and a count value of the remaining amount counting circuit and the basic fee selected by the basic fee/unit price selection circuit. Or, a third comparison circuit that compares the unit price value and outputs an output when the former becomes smaller than the latter, and stores the count value of the electric energy counting circuit at that time based on the output of the third comparison circuit. comprising a latch circuit and a maximum usable power display circuit that displays the stored value of the latch circuit as the maximum usable power amount;
An electric power rate meter configured to reset a power amount counting circuit, a basic charge/unit price counting circuit, a basic charge/unit price selection circuit, and preset a remaining amount counting circuit by the output of the third comparison circuit.