JPS601811B2 - automatic parallel device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic paralleling device that matches the phases as quickly and reliably as possible when power generators are connected in parallel to a grid.

Now, as we all know, when starting a generator and connecting it to the grid, it is necessary to synchronize the grid voltage and the generator voltage, and the following conditions must be satisfied between the two: It is.

(i) The magnitudes of the voltages are equal.

dish The frequencies are equal.

(iii) The phases are equal.

Typically, automatic parallel devices include automatic synchronizers, automatic parallel devices,
It consists of three automatic voltage balancing devices, among which the automatic voltage balancing device controls the governor motor to match the frequency of the generator voltage with the frequency of the grid voltage, and the automatic voltage balancing device controls the fog pressure setting of the AVR. control the generator to match the generator voltage to the grid voltage.

After these two operations bring the frequencies and voltages close to each other, an automatic synchronizer brings the sheath breakers together at the moment when the phases of both voltages match. This invention relates to an automatic speed equalizing device among the three devices constituting the above-mentioned automatic parallel device.The present invention relates to an automatic speed equalizing device among the three devices constituting the automatic parallel device. It was designed to create a

First, an example of a conventional automatic speed equalizing device will be described below.

Considering two alternating current voltages el, EISin, e2, E2Sjn (2t-8), and assuming this composite voltage as ■, e2ESh (lt1Q), E2cos (t-hi of △) 2-2-1 of △ 1E2Sin (tanQ of t of △: E, 10E2COS (△noshi hi).

In other words, the amplitude B of the composite voltage e changes over time as
It changes between (E, 10E2) and kuE, 1E2). Further, when a>0, when ■,>2, that is, when Δ<0, the larger 0 is, the earlier the time when the amplitude E reaches a maximum of 4 or a maximum. Conversely, when <2, that is, when Δ>0, the smaller 8 is, the earlier the time when the amplitude E reaches a maximum of 4 or a maximum. Figure 1 shows a composite circuit for grid voltage and generator voltage. As shown in the figure, e is an arbitrary phase-to-phase voltage on the grid voltage side, for example, the AB-phase voltage, and e2 is on the generator voltage side. The three inter-coffin voltages A-
The phase-to-phase voltages of B, B-C, and C-A are taken, and their combined voltages are respectively ea, eb, and ec.

If the system angular frequency is , and the generator angular frequency is w2, then
In case of 2〉, , the order in which the amplitude of the composite voltage becomes the highest 4 or the maximum is ea, eb, ec, and 2,
In this case, the order is ea, ec, and eb. Now, to explain the case where the generator frequency is high (2), the voltages Ea, Eb, and Ec obtained by full-wave rectification of the pulsating voltage due to the beat voltage are as shown in FIG.

In this figure, L,,-,L3 indicate the phase shift of the beat voltage, and t indicates time. Therefore, by selecting the order of change in these combined voltages, detecting which frequency is larger, and controlling the prime mover speed control device, it is possible to bring both frequencies close to each other. On the other hand, if the phase angle is 8', the system frequency is fe, and the generator frequency is fg, then △f=fe-fg 8ni2△f・t, so the system frequency fe is 60.0Hz, and the generator frequency is fg is 59. If it is constant with group z, 8 2 lights・△f
・tni3600×〇. IHbXI$eC=3600, and there is a moment when the synchronization calibrator completes one rotation between t=1 and the phase angles match, and there is one chance for parallelism regardless of the initial phase angle.

That is, after △f falls within the parallel allowable frequency difference range and the frequency difference lock and voltage difference lock of the automatic parallel device are released, ! A parallel condition is created when J△f・dtl≧1.

In the above equation, the above-mentioned △f=fe-fg is 1 at 0.1Hz.
The 360o synchronization tester completes one revolution in 0 seconds, 100 seconds at 0.01Hz, and 0.0 seconds. The general formula shows that the same goes around in 5 seconds in Kosei.

FIG. 3 is an example of a system frequency chart.

As shown in the figure, the modern grid frequency is very stable due to the AFC equipment, and usually the reference frequency is 0.0
There are many cases where they are in the group Z band. In Figure 4, the grid reference frequency is 60. 3, and the shaded area indicates the range of change in the frequency on the normal grid side shown in FIG.

The dotted line of 0.18 & indicates the position of the frequency difference lock as an example, ■ and ■ are examples of generator frequency charts when using the automatic parallel device of this invention, and ■ and ■ are examples of generator frequency charts when using the automatic parallel device of this invention. An example of a generator frequency chart is shown for a parallel device. Now, in the case of ■, the generator is accelerated and overshoots with a certain slope with respect to the system frequency, and after the frequency difference lock is released at point A and the automatic parallel device is utilized, the area , C causes the synchronization verifier to rotate in the lag direction, while the synchronization verifier temporarily stops at point C, and then reversely rotates in the advance direction due to the areas C, 2, and E.

Therefore, there is a chance of parallelization depending on the initial phase angle, but if the initial phase angle when the frequency difference lock is released is slightly rotated to the lag side, the areas A, A, and C will be If you don't rotate it 360 degrees, you won't have a chance.

To make it easier to understand, let's take as an example the case where the grid frequency is about 60.0 and the generator frequency is accelerated linearly. In order to always give a parallel chance when the frequency difference lock is 0.18 centigrade, , l'△f・dtl=学5・t=・ ・・−t=oz/second In other words, the rotation of the generator increases as the rotation speed increases. Unless the speed is gentler than oil 25HZ/Sec 0.15, there is no guarantee that there will be a chance, and moreover, there will only be one chance during acceleration.

Next, in the case of ■, the performance of the governor is good and the reference frequency is reached immediately. In this case, after the frequency lock is released, the synchronization tester will hardly swing, the pointer will stop, and the phase will match. A little chance.

Figure 5 is a block diagram showing a conventional example of an automatic speed equalization device.
is a deviation detection circuit, which detects a voltage E proportional to the grid frequency fe.
The deviation between e and a voltage Eg proportional to the generator side voltage fg is detected.

The output of the deviation detection circuit 1 is amplified by an amplifier 2, and depending on its polarity and magnitude, the speed increasing contact 3 for driving the governor motor is amplified.
A or the speed lowering side contact 3B is operated to perform the automatic alignment control described above. Conventional automatic paralleling devices that use such automatic alignment devices have the disadvantage of becoming passive automatic paralleling devices that wait for a chance to find a phase matching point due to fluctuations in system frequency. .

This invention was made in order to eliminate the above-mentioned drawbacks.

In other words, instead of using the method described in Figures 1 and 2 that detects the frequency difference using beat voltage and automatically adjusts the speed, it is possible to stably control the grid frequency close to the reference frequency as has been done recently. This is intended to facilitate parallelization by actively providing early and large opportunities for phase matching in cases where Examples of the present invention will be described below. FIG. 6 shows an embodiment of the present invention, in which the chance of automatic parallelization is realized by providing a dead zone.

In this figure, 6 indicates a switch that normally enters the contact a side and enters the lower contact b side only when parallel, and 7 indicates a dead zone. In this embodiment, when the switch 6 is turned to the contact b side, the speed regulator becomes uncontrollable within a range defined by the dead band 7, for example, deviation + etc., and the dead band width includes the grid frequency and the generator side frequency. The phase difference of the synchronization tester changes rapidly due to the frequency difference in the dead band width, increasing the chance that the phases will match. By providing such a dead zone, the reference frequency of the speed regulating device varies within that range, providing many chances for automatic parallelization quickly and often. When it falls within the width of the fuwa band, speed adjustment stops and acceleration stops, so if the fuwa band is made too small, the same result as shown in Figure 4 (■) may occur, but this will affect the acceleration characteristics of the generator. It goes without saying that the width should be adjusted in consideration.

As described in detail above, in this invention, when generators are connected in parallel to the grid, the reference frequency of the speed regulator of the prime mover is set so that a dead band is provided within the range of the parallel allowable frequency difference only when the generators are paralleled. It actively creates a chance for the phase of the voltage and the voltage on the generator side to match, and has the advantage of allowing paralleling to be performed quickly and reliably.

[Brief explanation of the drawing]

Figure 1 is a conventional combination circuit diagram of grid voltage and generator voltage, Figure 2 is a beat voltage waveform diagram obtained from Figure 1, Figure 3 is a grid frequency chart, and Figure 4 is a parallel diagram. A generator frequency chart, FIG. 5 is a block diagram showing an example of a conventional automatic alignment device, and FIG. 6 is a block diagram showing an embodiment of the present invention. In the figure, 1 is a deviation detection circuit, 2 is an amplifier, 3A and 3B are speed increase side and speed decrease side points, 4 is a contact to which the output of the closing speed detection circuit is applied only when parallel, and 5 is an adder. Figure 6 Figure 1 Figure 2 Figure 3 Figure 4 Figure 5

Claims (1)

[Claims] 1 Detect the deviation between the voltage proportional to the frequency on the grid side and the voltage proportional to the frequency on the generator side, and calculate the magnitude and positive value of this deviation.
In an automatic parallel system equipped with an automatic speed equalizing device that controls the speed adjusting device of a prime mover that drives a generator by a negative voltage and performs speed equalization, a connection is usually made between the speed detecting device of the speed adjusting device of the prime mover and the amplifier. An automatic paralleling device characterized by comprising means for inserting a dead zone with a width that is within the range of parallel permissible frequency difference and that takes into account the acceleration characteristics of the generator only when the generators are directly connected in parallel.