JPS6021516B2 - television receiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a second image projection position outside the projection screen to be inserted in a television receiver that simultaneously projects two television images on the screen of one television receiver. The present invention relates to a television receiver configured to display images at arbitrary positions on a television screen in correspondence with a plurality of operation switches of an operation section.

An example thereof will be described below with reference to the drawings.

As a means for projecting images of two channels A and B on the same display surface of a television receiver, for example, the method shown in FIG. 3d can be considered. That is, the B channel is projected at the lower right corner of the screen, approximately 1/2 vertically and 1/2 horizontally, ie, 1/4 of the area. The basic idea of this method is that every other horizontal scan of the B channel, samples are stored in the memory circuit corresponding to that scanning line every other picture element (sample points necessary to reproduce an image) during one horizontal scan. A
When the channel horizontally scans the part B in FIG.
This is based on the principle that the compressed image is displayed in part B of Fig. 3d.・
Figure 1 shows the specific configuration, where 1 is an antenna, 2
．． 6 is a tuner that receives broadcasts on different channels A and B, 3 and 7 are video intermediate frequency amplification circuits, and 4
, 8 is a video detection circuit, 5 and 9 are video amplification circuits, and 10 is a vertical synchronization signal VB and a horizontal synchronization signal of channel B.
11 is a vertical synchronizing signal V of channel A.
This is a circuit that generates the horizontal synchronization signal H^ and the horizontal synchronization signal H^.

12 is a flip-flop that inverts its state every time the horizontal synchronizing signal HB is generated and generates an output signal d; 13 is an input p, q according to the applied signals N, N2, N3, C;
, r, and s to generate an output at the output terminal 23, and operates as shown in Table 1.

Note that the * mark in Table 1 indicates that it may be optional. 1st
Tables 14 and 17 are RS flip-flops having a reset terminal and a set terminal, respectively, and generate outputs a and D.

15 and 16 are counters, and 18 is a gated oscillator, which stops oscillation while the horizontal synchronizing signal H^ is being generated, and makes the phase relationship of its output pulse with respect to the horizontal synchronizing signal H^ equal in any horizontal scan. be able to.

A gated oscillator 19 generates an output f and has a similar relationship to the horizontal synchronizing signal HB.

Reference numeral 20 denotes a control circuit including a memory circuit for writing and displaying image information, and includes the circuits shown in FIGS. 6, 8, 9, and 10.

21 and 22 are AND gates, respectively.

The oscillation frequency of the gated oscillator 18 described above is 450 days [HZ] when the number of picture elements during one horizontal scan is 450, and the oscillation frequency of the gated oscillator 19 is 450 days [HZ]. 1'2 225th day [
HZ].

The counter 15 is a counter of 525 (2 x 2) 3132 [bits] for the number of horizontal scans in one field, 525'2, and when 132 horizontal synchronizing signals H^ are taught, the flip-flop 14 is set, and the output a becomes a high potential state. Counter 15 and flip-flop 14 are reset by vertical synchronization signal V^. Counter 16 is 1
For 450 picture elements between horizontal scans, 450/2=225 [
When the output pulses of the gated oscillator 18 are counted, the flip-flop 1
7, and its output b becomes a high potential state. Counter 16 and flip-flop 17 receive horizontal synchronization signal H^
reset by . With this configuration, when sweeping the part B shown in Fig. 3d, the outputs a, b
becomes a high potential state, and the output of the oscillator 18 appears at the output e of the AND gate 22. At this time, switches 25 and 26
are both connected to the x terminal side. FIG. 2 shows a main circuit of the present invention, and FIG. 11 shows a front view of the operating section 28. The switch group of the operating section 28 in FIG. 11 corresponds to the switch group of the operating section 28 in FIG. 1 and 2 of the operation section 28
, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12 are channel selection switches, A, B, C, D are volume increases.
Switches used to control reduction, mute, power on/off, etc.
E is a switch that switches between main channel A and sub-channel B using switches 1 to 12, and F is a switch that performs channel selection and various controls when operating switches 1 to 12 and A to D. Alternatively, it is a switch that determines whether to perform an operation to change the image position of sub-channel B. In other words, the switches 1 to 12 and A to D for each needle have two types of functions.As shown in FIG. Divide into four blocks each, with switches 1, 2, 5, and 6 as the first block and associated with the upper left of the screen, switches 3, 4, 7, and 8 as the second block and associated with the top of the screen, and switches. 9,
10, A, and B are the third block and are associated with the lower left of the screen, and switches 1, 12, C, and D are the fourth block and are associated with the lower right of the screen.

When using this operating section 28 in normal usage, that is, when using it for channel selection or various controls, operate the switch F, and interlock the one-needle range switch provided in the switch F as shown in Fig. 2. When connected to the upward contacts in the drawing, switches 1 to 12 are connected to a channel selection signal generation circuit 29, and switches A to D are connected to various control signal generation circuits 30.

Furthermore, if switch E is connected to tuner 2 for main channel A, the television receiver operates as a normal television receiver. Further, the contacts on the lower side in the drawing of each switch of the switch F are connected to the image position change signal generation circuit 31 for the sub-channel B, with the four switches corresponding to the aforementioned four blocks forming one block.

The output of this generating circuit 31 is transmitted to the switches 25 and 26 in FIG.
can be controlled. Therefore, when specifying the image position for subchannel B to a desired quality, switch F
All you have to do is to connect all the switches of this switch F to the lower contacts.In this state, for example, if you want to project the image of sub channel B on the upper left of the screen, use switches 1, 2, 5, If at least one of 6 is operated, the desired operation will be performed. To select the subchannel B, switch E may be switched to the side of the tuner 6 for subchannel B. The operation is first to select the main channel A and receive the image, then operate the next switch F to set the image position determination state, operate the desired switch, change the switches 25 and 26 to specify the desired position, Next, return the switch F to the original state, switch the switch B to the operation subchannel B selection state, and select the subchannel B with the switch.
can be received and projected at a desired location.

Leave the switch 25 as the x side terminal, and switch 26 as the y side terminal.
When connected to the side terminal, the output of the counter 15 is inverted by the inverting circuit 27, so that the outputs a and b become high potential in order to sweep the part B shown in FIG. 3b.

Similarly, if switches 25 and 26 are connected to the y side, the third
When the switch 25 is connected to the y side and the switch 26 is connected to the x side, in order to sweep the part B shown in FIG.
b becomes a high potential. And these switches 25, 26
When one or more of the switches 1, 2, 5, and 6 provided on the operation section of FIG. 11 (or the operation section of the remote controller) is operated, the switches of FIG. 3a and FIG. 11 are activated. By operating the switches 3, 4, 7, and 8, the switches 9, 10, . The connections of the switches 25 and 26 are selected so that the images shown in FIG. 3 can be extracted by operating the switches 11, 12, C, and D of FIG. 2 (c) in FIG. 2 (c) in FIG. Next, the operation of the embodiment configured as described above will be explained for the case shown in FIG. 3d.

The broadcast signal of channel A selected for reception by tuner 2 is applied to signal selection circuit 13 via circuits 3, 4, and 5 as video signal P shown in FIG. 5A. Also, the broadcast signal of channel B selected for reception by tuner 6 is transmitted to circuits 7, 8, 9.
is applied to the control circuit 20 via. This control circuit 20
Now, as shown at the beginning of FIG. 5, the video signal v of channel B is sampled, each sample value is stored, and this stored signal is read out at twice the sampling speed. Then, as shown in FIG. 5C, a video signal whose time axis is compressed to 1/2 is obtained. This video signal appears as q, r, and s for each field. The signal selection circuit 13 appropriately selects and switches the signals p, q, r, and s, and as shown in FIG. appears on the output terminal 23. Next, the circuits included in the control circuit 20 will be explained.

FIG. 8 shows a ring counter in which the vertical synchronizing signal VB is applied several times even from any state of each flip-flop FF, FF2, FF8.
When FF3 is triggered, the outputs M, , M3 repeat the states shown in Table 2 every time the synchronizing signal VB arrives. Table 2 The outputs M, , M2, and M3 are used as signals for selecting the write circuit.

Figure 9 shows the signals M,,M2 obtained by the circuit shown in Figure 8.
, M3, signal a, and synchronization signal Va to signal N, , N2, N
3, and is constructed using flip-flops FF4 to F5 as the main circuit. N. , N2, N3 are signals for selecting the readout circuit and the signal p by the signal selection circuit 13.
, q, r, and s. Further, in FIG.
, , G, M3, N, , N2, N3 to obtain a write clock or an output clock for each write/read circuit. FIG. 6 shows an embodiment of a memory circuit that includes the control circuit 20' and a circuit that initiates the writing of image information into the memory circuit.

206 is a storage circuit, and 206 is a shift register.

502 and 503 are circuits having the same configuration as 501, and the circuit 502 and M,,N,,U, for the circuit 501
, 503 are ground, N2, U2, M3, N3, U3, respectively.
becomes. When (M,, M2, earth) = (1, 0, 0), the circuit 501 is sent; when (M,. M2, M3)=(0,0
, 1), writing is performed in the circuit 503, respectively. Also, when (N,, N2, N3) = (1, 0, 0), the circuit 501
), the circuit 502 calculates (N,,N2,N3)=(0
, 0, 1), the circuit 503 is activated. Furthermore, the ninth
As can be seen from the figure, it is MillNi. The write and read operations of the circuit 501 will be described. When Mi=1, AND gates 201 and 203 are open, and AND gates 202 and 204 are closed. Therefore, in shift register 205, the first stage flip-flop is set by the synchronizing signal VB, and the other flip-flops are reset. That is, the state becomes 10...0.
The signal d changes this state to 010...0,0010.
・・・・・・・・・It changes to 0. U. is the oscillator 19
is equal to the output f of , which creates the write clock ◇,,me2 to the storage circuit 206. Since d shifts the shift register 205 every other horizontal scan of the synchronization signal HB, each storage circuit stores information for every other horizontal scan. v is a video signal. When N,=1, AND gates 201 and 203 are closed, and AND gates 202 and 204 are closed.
is open. At this time, the shift register 205 is set to a state of 100...0 by V^, and changes its state to 0100...0, 0010...0 by H^. U, is equal to the output e of the band gate 22, which produces an output click from the memory circuit 202, .circlein.2. The speed of the input is equal to the oscillation frequency of the oscillator 18. FIG. 4 shows the relationship between the A channel vertical synchronizing signal, the B channel vertical synchronizing signal, and the writing and reading of B channel image information.

In other words, the part with the number B is connected to the circuit 501, and the part with the number B
That of B3 is written to circuit 502, that of B3 is written to circuit 503, and when it is read out in the corresponding numbered part of the A channel. The dotted line in the figure means that on the right side, the horizontal pull-down is performed in part B of Figure 3d.
FIG. 7 shows an embodiment of the memory circuit.

Shift signal? , and 02 are composed of rectangular waves with mutually opposite phases. The voltages on the capacitors are V, , V2, and V3. The sample value of the signal is Uk. When the base of the transistor reaches the voltage U, the transistor starts conducting, and current flows from the capacitance immediately following it until the capacitance of the previous stage reaches U. The voltage of its own stage momentarily becomes 2U, and charge transfer takes place until its voltage becomes U+Uk. Therefore, the information contained in this stage is transmitted to the next stage. Note that G is a gate signal. In the above operation explanation example, we have explained the case where another channel is displayed in the lower right corner of the screen of the television receiver at 1/2 the size vertically and horizontally.
Even when the connection position of the B channel image is changed, the projection position of the B channel image can be changed using basically the same principle of operation. As is clear from the above embodiments, the television receiver according to the present invention stores the second television signal in a plurality of storage means, outputs the stored signal at a higher speed than the writing speed, and compresses the time. A second television signal is obtained, an arbitrary part of the first television signal is deleted and inserted into the second television signal, and this composite signal is displayed.

In addition, the second television signal position can be determined by using both channel selection and various control switches, which has the effect of not making the operating section unnecessarily large. Therefore, you can also watch hair programs on the same screen. Furthermore, it can be used as a monitor in a video tape recorder.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a television receiver according to an embodiment of the present invention, FIG. 2 is a circuit diagram of the main parts of the same receiver, FIG. 3 is a diagram showing how it is projected onto a television picture tube, and FIG. Figure 4 shows the relationship between the vertical synchronizing signal between both channels simultaneously projected onto the picture tube and the writing and reading of the B channel into the memory circuit, and Figure 5 shows the relationship between the video signals of the A and B channels. FIG. 6 is an explanatory diagram of a memory circuit and a circuit for writing to and reading from the memory circuit, FIG. 7 is an explanatory diagram of the operation of the memory circuit, and FIG.
9 and 10 are circuit diagrams for generating signals to be supplied to the circuit of FIG. 6, respectively, and FIG. I1 is a front view of the operating section. 2, 6...Tuner, 13...Signal selection circuit,
20... Control circuit including a memory circuit for writing and issuing image information, 25, 26... Switch, 2
7, 28... Inverting circuit. Figure 2 Figure 3 Figure 5 Machine Figure 4 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11

Claims (1)

[Claims] 1 means for simultaneously receiving first and second different television signals; storage means into which the second television signal is written; and a second television signal whose time axis is compressed using the storage means. means for extracting a portion of the first television signal into the compressed second television signal, thereby converting a portion of the first television signal into a portion of the video screen of the first television signal; In the television receiver, the second television receiver is provided with a means for projecting the second television signal and a means for projecting the second television signal on an arbitrary part of the video screen of the first television signal. As a means for projecting the signal on an arbitrary part of the video screen of the first television signal, an operation section consisting of a channel selection switch and a control switch is also used, and the plurality of switches of the operation section are used to project the signal on an arbitrary part of the video screen of the first television signal. dividing the second television signal corresponding to the portion to be displayed;
A television receiver characterized in that a switch means is provided for selectively using the switch of the operation section for channel selection and various controls, and for determining the projection position of the second television signal.