JPS6023531B2 - low frequency amplifier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a push-pull low frequency amplifier used in power amplifiers of audio equipment, and more particularly to one that prevents the occurrence of notching distortion.

In class B push-pull amplifiers that have been proposed in the past, notching distortion occurs due to the switching operation of the transistor. The disadvantage is that the number of signals increases due to the inability to follow the signal.

In order to eliminate such drawbacks, the present invention provides a low frequency amplifier that does not generate notching distortion when performing class B push-pull operation.

For this purpose, the low-frequency amplifier of the present invention is provided such that the emitters of the first output transistor and the second output transistor are connected to the output point via a resistor, respectively, and the bases of the first and second output transistors are connected to the output point via a resistor. In devices that perform push-pull operation by applying input signals that change between positive and negative,
A bias circuit is provided for applying a bias between the bases of the first output transistor and the second output transistor, and a bias circuit is provided between the base of the first output transistor and the output point of the first output transistor. The base and emitter of a second current detection transistor are connected to each other, and the base and emitter of a second current detection transistor are connected between the base of the second output transistor and the output point to detect the emitter current flowing to the second output transistor. At the same time, a first resistor for bias setting forming the bias circuit is connected between the emitter of the first current detection transistor and the base input of the second output transistor. A second resistor for bias setting forming the bias circuit is connected between the collector of the current detection transistor and the base input of the first output transistor. The present invention is characterized in that the current flowing through the first and second resistors of the bias circuit is changed by operation, and the bias setting amount is changed to prevent turn-off of the first and second output transistors. shall be.

Embodiments of the present invention will be specifically described below with reference to the drawings.

In the drawing, NPN drive transistors Q5, Q7 and P
NP drive transistors Q6, Q8 connect their emitters to resistors R9, R, . and output point 0 via R,o,R,2
The bases of transistors Q7 and Q8 are connected to the emitter of transistor Q. Also, an NPN output transistor Q and a PNP output transistor Q. The emitters are connected to the output point 0 through resistors R, 3, R, and 4, respectively, and the bases are connected to the emitters of transistors Q7 and Q to form a Darlington circuit. An NPN transistor Q and a PNP transistor Q2 are connected in series between the bases of the driving transistors Q5 and Q6, and resistors R, .
R3 is connected, a resistor R5 and an idling adjustment semi-fixed resistor R6 are connected between the bases of transistors Q, Q2, and a resistor is connected between the base and collector of transistor Q2.
R4 and R2 are followed, and these transistors Q
, , Q2 and resistors R to R6 are supplied with current from a constant current source 1 to generate a constant bias voltage. Also, transistor Q5, the input transistor Q at the false base
、． An input signal S that changes between positive and negative is applied,
The bias setting amount of the bias circuit is configured to be changed by the current detection means of the output transistor provided between the bases of the output transistors Q9, Q, and o and the output point. That is, one output transistor Q
The base of the PNP transistor Q4 is connected via the resistor 8.
The base of the transistor Q is connected to the output point 0, and the collector is connected between the resistors R4 and R2.

In addition, the bases of the other output transistors Q and o are similarly connected to the emitter of the NPN transistor Q3 via the resistor 7, the base of the transistor Q is connected to the output point 0, and the collector is connected to the resistor, and the emitter of the NPN transistor Q3 is connected to the emitter of the NPN transistor Q3 through the resistor 7. connected between. Here, the resistance is equal to R2 and R8, and the resistance R, is R7
are set to be equal to each other. As a result, the bias voltage V^B (transistors Q5, Q
6) is approximately 2VB8 (R,
An idle current expressed as 1R20R30R40R50R6)/R50R6 and regulated by resistor R6 flows through output transistors Q9, Q, and o.

Then, the positive half-cycle signal is input to the input transistors Q, .
When the output signal is amplified by the output transistor Q9, the output signal is outputted to the output point 0. At this time, the current flowing through the transistor Q9 causes a voltage drop across the resistor R,3, and a voltage proportional to this voltage drop is applied to the transistor Q. ,Buddha,
It is added as a reverse bias to Q and o, and turns off in the evening. However, in the current detection transistor Q4, the emitter connected to the base of the output transistor Q9 has a higher potential than the base connected to the output point 0, so that the transistor Q is turned on and the resistor is connected through the transistor Q4. Current flows towards R2. Therefore, if the value of resistor R8 is determined so that the same voltage as the voltage drop across resistor R,3 is applied to resistor 8, then when resistor 2 and resistor R8 are equal, the voltage drop across resistor R,3 will be the same voltage as resistor K2. appears in Therefore, the potential at the base of transistor Q falls, and transistors Q, Q8, Q, and o maintain a negative bias, and idle current continues to flow without being turned off. Conversely, when a negative half-cycle signal is input, the output transistor Q.

At this time, the current detection transistor Q3 is similarly turned on, transistors Q5, Q7, and Q9 maintain forward bias, and an idle current flows without being turned off. Thus, when the output transistor Q9 performs an amplifying action upon input of a positive half-cycle signal, the transistors Q, Q8, Q, do not perform an amplifying action. On the other hand, when the output transistors Q and o perform an amplifying action due to the input of a negative half-cycle signal, the transistors Q, Q7, and Q9, which do not perform an amplifying action, are held so as not to turn off. As described above, according to the present invention, the turn-off of the output transistors Q9, Q, and o in the class B push-pull amplifier is prevented and the output transistors Q9, Q, and o are always operated in the class A mode, so that notching distortion is reduced at large amplitudes or at high frequencies. Improved.

Although it operates in class A mode, it is possible to create an effective amplifier that takes advantage of the advantages of class A amplifiers without causing problems such as heat, which are the drawbacks of class A amplifiers. The heat sink etc. are also very small compared to those of a class A amplifier. Furthermore, by improving notching distortion, the bare characteristics of the amplifier are improved, and effects such as a reduction in the amount of NF can be obtained.

[Brief explanation of the drawing]

The accompanying drawing is a circuit diagram showing an embodiment of a low frequency amplifier according to the present invention. Q, or Q,. ...transistor, R, or R, 4...
Resistor, 1...constant current source, S...input signal.

Claims (1)

[Claims] 1 The emitters of the first output transistor and the second output transistor are each connected to the output point via a resistor,
In a low frequency amplifier that performs push-pull operation by applying an input signal that changes between positive and negative to the bases of the first and second output transistors, a bias is applied between the bases of the first output transistor and the second output transistor. A bias circuit for applying the voltage is provided, and the first
A first current detection transistor for detecting an emitter current flowing through the first output transistor is provided between the base of the output transistor and the output point, the base of the first current detection transistor being the output point, and the emitter being the first current detection transistor. A second current detection transistor is provided between the base of the second output transistor and the output point for detecting an emitter current flowing through the second output transistor, and is connected to the bases of the output transistors of the second output transistor. The base of the current detection transistor is connected to the output point, the emitter is connected to the base of the second output transistor, and the bias circuit is connected between the collector of the first current detection transistor and the base input of the second output transistor. A first resistor for bias setting forming the bias circuit is connected between the collector of the second current detection transistor and the base input of the first output transistor. 2 resistors are connected to each other, and the current flowing through the first and second resistors of the bias circuit is changed by the operation of the first and second current detection transistors, thereby changing the bias setting amount. A low frequency amplifier characterized in that it is configured to prevent turn-off of the first and second output transistors.