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JPS6024665B2 - switching power supply circuit - Google Patents
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JPS6024665B2 - switching power supply circuit - Google Patents

switching power supply circuit

Info

Publication number
JPS6024665B2
JPS6024665B2 JP15134277A JP15134277A JPS6024665B2 JP S6024665 B2 JPS6024665 B2 JP S6024665B2 JP 15134277 A JP15134277 A JP 15134277A JP 15134277 A JP15134277 A JP 15134277A JP S6024665 B2 JPS6024665 B2 JP S6024665B2
Authority
JP
Japan
Prior art keywords
power supply
circuit
pulse width
voltage
switching power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15134277A
Other languages
Japanese (ja)
Other versions
JPS5484223A (en
Inventor
明夫 小泉
博 中沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP15134277A priority Critical patent/JPS6024665B2/en
Publication of JPS5484223A publication Critical patent/JPS5484223A/en
Publication of JPS6024665B2 publication Critical patent/JPS6024665B2/en
Expired legal-status Critical Current

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Description

【発明の詳細な説明】 本発明は種々の電子機器に使用されるスイッチング電源
回路に関し、特にパルス幅変調信号用発振周波数の変動
に基づくスイッチング電源回路の異常動作を防止したも
のである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to switching power supply circuits used in various electronic devices, and in particular to preventing abnormal operation of the switching power supply circuits due to fluctuations in the oscillation frequency for pulse width modulation signals.

第1図は従来のスイッチング電源回路の一例を示すもの
であって、第1図において例えば商用電源電圧を供孫溝
される電源プラグ1は電源スイッチ2を介して整流回路
3に接続され、整流回路3の出力側はトランス4の1次
巻線4aおよびスイッチング用トランジスタ5の主電極
を介して接地され、トランス4の2次巻線4bは負荷に
安定化された直流出力電圧を導出するための整流回路6
に接続される。
FIG. 1 shows an example of a conventional switching power supply circuit. In FIG. The output side of the circuit 3 is grounded via the primary winding 4a of the transformer 4 and the main electrode of the switching transistor 5, and the secondary winding 4b of the transformer 4 is used to derive a stabilized DC output voltage to the load. rectifier circuit 6
connected to.

整流回路6の出力側はまたその直流出力電圧の一部を検
出するための検出回路7を介して誤差検出回路8に接続
され、この誤差検出回路8で基準電圧と検出回路7から
の直流電圧が比較されて、その誤差信号がパルス幅制御
信号としてトランス4の1次側および2次側聞を絶縁す
るホトカプラ、トランス等のアィソレータ9を通してパ
ルス幅変調器10‘こ供給される。パルス幅変調器1川
ま発振回路11およびドライバ12と共にスイッチング
用トランジスタ5のスイッチング動作を制御する制御回
路を形成する。またパルス幅変調器10はアイソレータ
9を通して供給されるパルス幅制御信号と発振回路11
からのパルス信号に応答し、パルス幅変調(PWM)信
号をドライバ12を通してスイッチング用トランジスタ
5のベースに供給してそのオン時間を制御し、もって整
流回路6の出力側に得られらる直流電圧を一定にする。
さらに制御回路を形成するパルス幅変調器10、発振回
路11およびドライバ12は整流回路3の出力側に接続
された制御回路用電源13にそれぞれ接続されて電源を
受けるようになつている。ところで、発振回路は一般に
電圧依存性があり、電源電圧の上昇と共にその発振周波
数が変動する。
The output side of the rectifier circuit 6 is also connected to an error detection circuit 8 via a detection circuit 7 for detecting a part of its DC output voltage, and in this error detection circuit 8 the reference voltage and the DC voltage from the detection circuit 7 are connected. are compared, and the error signal is supplied as a pulse width control signal to the pulse width modulator 10' through an isolator 9 such as a photocoupler or transformer that insulates the primary and secondary sides of the transformer 4. The pulse width modulator 1 forms, together with the oscillation circuit 11 and the driver 12, a control circuit that controls the switching operation of the switching transistor 5. Further, the pulse width modulator 10 receives a pulse width control signal supplied through the isolator 9 and an oscillation circuit 11.
A pulse width modulation (PWM) signal is supplied to the base of the switching transistor 5 through the driver 12 to control its on-time, thereby increasing the DC voltage obtained at the output side of the rectifier circuit 6. Keep constant.
Furthermore, the pulse width modulator 10, oscillation circuit 11, and driver 12 forming the control circuit are connected to a control circuit power supply 13 connected to the output side of the rectifier circuit 3, respectively, so as to receive the power. Incidentally, an oscillation circuit generally has voltage dependence, and its oscillation frequency changes as the power supply voltage increases.

従って上述の如き構成を成す従来のスイッチング電源回
路では電源スイッチ2を投入すると発振回路11も即座
に作動するようになっているので電源スイッチ2を入れ
た直後から定常状態になるまでスイッチング電源回路は
異常なスイッチング動作を起こし、また回路動作の安定
性等からも問題があった。更に主電源または制御電源が
定常状態になるまで発振回路11を停止し、その後発振
回路11を作動させることも考えられるが、なお上述の
問題は解消し難く、特に発振周波数が高い場合、例えば
2岬〜30kH2位でも動作が不安定となる欠点があっ
た。本発明はこのような従来の欠点を除去するためにな
されたものであって、電源投入時の異常動作を防止でき
ると共に常に回路系の安定性を確保できるスイッチング
電源回路を提供するものである。
Therefore, in the conventional switching power supply circuit configured as described above, when the power switch 2 is turned on, the oscillation circuit 11 is also activated immediately, so the switching power supply circuit is operated immediately after the power switch 2 is turned on until the steady state is reached. This caused problems such as abnormal switching operation and stability of circuit operation. Furthermore, it is conceivable to stop the oscillation circuit 11 until the main power supply or the control power supply reaches a steady state, and then start the oscillation circuit 11, but the above-mentioned problem is still difficult to solve, and especially when the oscillation frequency is high, for example There was a drawback that the operation was unstable even at 30kHz to 2nd level from Misaki. The present invention has been made to eliminate these conventional drawbacks, and provides a switching power supply circuit that can prevent abnormal operation when the power is turned on, and can always ensure the stability of the circuit system.

以下本発明の諸実施例を第2図ないし第4図に基づいて
詳しく説明する。
Embodiments of the present invention will be described in detail below with reference to FIGS. 2 to 4.

なお、各図において第1図と対応する部分には同一符号
を付し、その詳細説明は省略する。第2図は本発明スイ
ッチング電源回路の一実施例を示すものであって、第1
図の構成と相違する点は制御回路用電源13の出力側に
この電源の出力電圧を検出し、所定時間後リセットパル
スを発生するための電圧検出回路14を接続し、電圧検
出回路14の出力側をカウンター7のリセット入力端に
接続すると共にカウンター7の出力端をパルス幅変調器
10に接続するように構成したことである。
In each figure, parts corresponding to those in FIG. 1 are denoted by the same reference numerals, and detailed explanation thereof will be omitted. FIG. 2 shows an embodiment of the switching power supply circuit of the present invention.
The difference from the configuration in the figure is that a voltage detection circuit 14 for detecting the output voltage of this power supply and generating a reset pulse after a predetermined time is connected to the output side of the control circuit power supply 13, and the output of the voltage detection circuit 14 is connected to the output side of the control circuit power supply 13. The output terminal of the counter 7 is connected to the reset input terminal of the counter 7, and the output terminal of the counter 7 is connected to the pulse width modulator 10.

なお、第1図と対応する部分には同一符号を付し、その
重復説明は省略する。次にこの本発明に係るスイッチン
グ電源回路の動作を第3図に示す特性図を参照しながら
説明する。
Note that parts corresponding to those in FIG. 1 are denoted by the same reference numerals, and repeated explanation thereof will be omitted. Next, the operation of the switching power supply circuit according to the present invention will be explained with reference to the characteristic diagram shown in FIG.

いま、電源スイッチ2をオンすると主電源電圧+EBお
よび制御回路用電源13から供給される電圧十Bcは第
3図Aに示すように変化し、この変化に応じた電圧十E
Bが制御回路用電源13およびトランス4に供聯合され
ると共に、電圧+E。が発振回路11、パルス幅変調器
10、ドライバ12および電圧検出回路14にもそれぞ
れ供給される。従って発振回路11は動作し始めると共
に電圧検出回路14も制御回路用電源13の出力電圧を
検出し第3図Bに示すような検出出力電圧をカウンタ1
7に印加するもこのカウンタ17はリセットされるので
次段のパルス幅変調器10以降は動作しないままである
。ここで、第3図Aに示すように発振回路11が電源電
圧を供給されてから安定するまでの時間をら、電圧検出
回路14の検出した電圧が所定電圧十Esになるまでの
時間をLとし、時間toとt,の関係がt,>toであ
るものとすると、電圧検出回路14の出力は時間t,の
時点で第3図Bに示すように低レベルとなってリセツト
パルスRPはカウンタ17のリセツト入力端に供給され
ない。従って、発振回路11からのパルスがカウンタ1
7により分周されて次段のパルス幅変調器10‘こ供給
される。従ってパルス幅変調器1川まこの時点で本来の
パルス幅変調作用を開始し、もってパルス幅変調器10
からパルス幅変調信号がドライバ12を通してスイッチ
ング用トランジスタ5のベースに供給されてスイッチン
グ動作が開始される。この結果スイッチング電源回路は
発振回路が常に安定した状態でスイッチング動作を行う
ことができ、電源スイッチオン時の異常動作が防止でき
ると共に回路系自体の安定性を確保できる。また、本発
明では発振回路11の出力パルスを分周するカウンター
7を発振回路11が安定するまでリセットするように構
成することにより、部品点数が増えない利点がある。な
お、上述の各実施例では制御回路用電源の電圧を検出し
て発振回路の出力を制御する場合について説明したが、
これに限定されることなく例えば主電源電圧を検出して
同様の効果が得られることは云うまでもない。
Now, when the power switch 2 is turned on, the main power supply voltage +EB and the voltage 10Bc supplied from the control circuit power supply 13 change as shown in FIG.
B is connected to the control circuit power supply 13 and the transformer 4, and the voltage +E. are also supplied to the oscillation circuit 11, pulse width modulator 10, driver 12, and voltage detection circuit 14, respectively. Therefore, the oscillation circuit 11 starts operating, and the voltage detection circuit 14 also detects the output voltage of the control circuit power supply 13, and outputs the detected output voltage as shown in FIG. 3B to the counter 1.
7, but this counter 17 is reset, so the pulse width modulator 10 and subsequent stages in the next stage remain inoperative. Here, as shown in FIG. 3A, the time required for the oscillation circuit 11 to stabilize after being supplied with the power supply voltage and the time required for the voltage detected by the voltage detection circuit 14 to reach the predetermined voltage 10 Es is determined as L. Assuming that the relationship between time to and t is t>to, the output of the voltage detection circuit 14 becomes a low level at time t, as shown in FIG. 3B, and the reset pulse RP becomes It is not supplied to the reset input of counter 17. Therefore, the pulse from the oscillation circuit 11 is transmitted to the counter 1.
The frequency is divided by 7 and supplied to the next stage pulse width modulator 10'. Therefore, the original pulse width modulation action starts at the point when the pulse width modulator 10 is reached, and the pulse width modulator 10
A pulse width modulated signal is supplied to the base of the switching transistor 5 through the driver 12, and a switching operation is started. As a result, the switching power supply circuit can perform switching operations with the oscillation circuit always in a stable state, preventing abnormal operation when the power switch is turned on, and ensuring the stability of the circuit system itself. Further, the present invention has the advantage that the number of parts does not increase by configuring the counter 7 that frequency-divides the output pulse of the oscillation circuit 11 to be reset until the oscillation circuit 11 becomes stable. In each of the above embodiments, the case where the voltage of the control circuit power supply is detected and the output of the oscillation circuit is controlled is explained.
It goes without saying that the present invention is not limited to this, and similar effects can be obtained by detecting the main power supply voltage, for example.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のスイッチング電源回路の一例を示す構成
図、第2図は本発明の一実施例を示す構成図、第3図は
第2図の動作を説明するための電圧特性図である。 図中、3は整流回路、5はスイッチング用トランジスタ
、7は検出回路、8は誤差検出回路、9はアィソレータ
、10はパルス幅変調器、11は発振回路、12はドラ
イバ、13は制御回路用電源、14は電圧検出回路、1
7はカゥンタである。 第1図 第2図 第3図
FIG. 1 is a configuration diagram showing an example of a conventional switching power supply circuit, FIG. 2 is a configuration diagram showing an embodiment of the present invention, and FIG. 3 is a voltage characteristic diagram for explaining the operation of FIG. 2. . In the figure, 3 is a rectifier circuit, 5 is a switching transistor, 7 is a detection circuit, 8 is an error detection circuit, 9 is an isolator, 10 is a pulse width modulator, 11 is an oscillation circuit, 12 is a driver, and 13 is a control circuit. power supply, 14 is a voltage detection circuit, 1
7 is a counter. Figure 1 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 1 発振回路からのパルス信号と、直流出力電圧を検出
して得たパルス幅制御信号とに応じてパルス幅変調器か
らパルス幅変調信号をスイツチング素子に供給してスイ
ツチング動作を行うスイツチング電源回路において、上
記発振回路のパルス信号をカウンタにより分周して上記
パルス幅変調器に供給すると共に入力電源電圧を検出す
るための電圧検出回路を設け、この電圧検出回路の検出
レベルが所定値以下の時上記カウンタをリセツトし、上
記発振回路からのパルス信号を上記パルス幅変調器へ供
給しないようにしたことを特徴とするスイツチング電源
回路。
1. In a switching power supply circuit that performs a switching operation by supplying a pulse width modulation signal from a pulse width modulator to a switching element in response to a pulse signal from an oscillation circuit and a pulse width control signal obtained by detecting a DC output voltage. , a voltage detection circuit is provided for frequency-dividing the pulse signal of the oscillation circuit by a counter and supplying it to the pulse width modulator and detecting the input power supply voltage, and when the detection level of the voltage detection circuit is below a predetermined value. A switching power supply circuit characterized in that the counter is reset so that the pulse signal from the oscillation circuit is not supplied to the pulse width modulator.
JP15134277A 1977-12-16 1977-12-16 switching power supply circuit Expired JPS6024665B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15134277A JPS6024665B2 (en) 1977-12-16 1977-12-16 switching power supply circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15134277A JPS6024665B2 (en) 1977-12-16 1977-12-16 switching power supply circuit

Publications (2)

Publication Number Publication Date
JPS5484223A JPS5484223A (en) 1979-07-05
JPS6024665B2 true JPS6024665B2 (en) 1985-06-14

Family

ID=15516464

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15134277A Expired JPS6024665B2 (en) 1977-12-16 1977-12-16 switching power supply circuit

Country Status (1)

Country Link
JP (1) JPS6024665B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0370724U (en) * 1989-11-08 1991-07-16

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0370724U (en) * 1989-11-08 1991-07-16

Also Published As

Publication number Publication date
JPS5484223A (en) 1979-07-05

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