JPS6026228B2 - keyboard instrument practice device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a training device for a keyboard instrument that compares the performance state of a keyboard section with a model performance and scores the performance practice state.

When practicing playing a keyboard instrument, students perform key operations corresponding to the musical score and repeat this process in order to faithfully reproduce the content expressed in the musical score. Judging the content of the performance is based on
This is done by the teacher listening to the performance. In other words, the teacher listens to the student's performance and guides the student to improve his or her sense of music by correcting mistakes and correct key pressing. Therefore, this type of teaching method is very effective in individual lessons where the teacher and student are 1:1, but in group lessons where there is a large number of students for one teacher. It is very difficult to do this. Furthermore, in order to judge and score students' performance techniques, teachers themselves find it difficult to numerically and objectively assess the occurrence of performance errors, and must judge the progress of performance practice solely subjectively. Must be.

Therefore, the direction of guidance for students' performance practice comes to depend on the subjective judgment of the teacher, making it difficult to always provide appropriate guidance that students can fully understand. This invention is
This was created in consideration of the above points, and aims to reliably judge the state of the student's key operation, especially whether the key was operated correctly or not, and grade the student in a way that satisfies the student's understanding. This is an attempt to provide a method for practicing keyboard instruments that has been made possible.

In addition, when determining the student's key operation status, a tolerance range for arbitrary key operation timing is set to determine whether the key has been pressed correctly, and the accuracy of the operation timing as well as the pitch of the operated key is determined. is also one of the objectives.

That is, the practice device according to the present invention compares the first performance information based on the model performance information and the second pitch information corresponding to the student's key operations, and determines the student's correct pitch for each piece of information. It is designed to determine which keys are pressed.

An embodiment of the present invention will be described below with reference to the drawings.

Fig. 1 shows the general configuration of the system, which includes a master keyboard 11 on which the teacher performs model performances.
Pitch information corresponding to the pitch of the operated key is generated by the teacher's performance operation in . This pitch information becomes the first pitch information that constitutes the model performance information generated at note length intervals based on the teacher's key operation timing.
The signal is supplied to the musical tone forming circuit 12 on the base unit side, converted into a musical tone signal, and supplied to the speaker 4 via the amplifier 13. Then, the teacher's model performance sound is generated from the speaker 14. In this case, musical tone forming circuit 1
2 has a built-in automatic rhythm generation mechanism,
The teacher operates the keyboard 11 in response to automatic rhythm sounds generated from the speaker 14. keyboard 1
The first pitch information obtained from 1 is distributed and integrated together with the tempo clock signal of the automatic rhythm generation mechanism in the musical tone forming circuit 12 to a plurality of slave units 15a, 15b, . . . A keyboard 16 is provided for students to practice, as represented by a handset 15a.

This keyboard 16 generates second pitch information in response to key operations, and this pitch information is converted into a musical tone signal by a musical tone forming circuit 17 and supplied to a speaker 19 via an amplifier 18. It is possible to obtain the performance sound corresponding to the student's key operations by V-feeding. In addition, this handset 15a is provided with a performance state judgment section including a timing judgment section 20, a pitch judgment section 21, a note length judgment section 22, etc., and for each judgment section 20 to 22, , and supply the first pitch information and the second pitch information, respectively, and compare the two.

That is, by comparing the first pitch information serving as a model and the second pitch information based on the student's key operations in terms of timing, pitch, and note length interval, it is possible to determine the correct key press on the keyboard 16. It is determined whether or not it is, and the results of the determination are displayed as scores on the display devices 23, 24, and 25, respectively. In this embodiment, the model performance is performed by a teacher; however, when performing self-study performance practice, the model performance may be stored and read out for use.

That is, as shown in FIG. 2, a storage device 26 is provided, and model performance information is written and stored in this storage device 26.

The storage device 26 is composed of, for example, a RAM or the like, and the stored performance information is constructed in correspondence with the notes expressed in the musical score. In other words, a note has pitch and note length information, so a combination of pitch (UK) information and note length (LENGTH) information is set for each note, and this is arranged in the order of notes on the musical score. are stored in the order of addresses corresponding to . FIG. 3 shows the format of the model performance information stored in the storage device 26. First, the UK information "UK, 1" corresponding to the first note is stored at the first address, and the information UK, 1 is stored at the following address. Note length information “LENG
Memorize TH, one.

Then, in note order, UK2, LENGTH2, etc.
・The information for each note is stored in address order, and the end code "FINISH" is written and set after the last information.・Here, UK
The information, note length information, is composed of, for example, 8 bits, and mark information representing UK and note length is set in the first two bits.

The remaining 8 bits are used to set the key code indicating the pitch and the numerical code indicating the note length. In particular, for UK information corresponding to rests, the key code is set to all "0".
It is expressed as This storage device 26 sequentially reads out UK information and note length information as shown in the above format according to the address information from the address counter 37, and the read UK information is used as the first pitch information as shown in FIG. As in the case above, the timing is combined with the pitch and note length determining units 20 to 22.

Each of the judgment units 20-22 is supplied with the second pitch information from the student keyboard 16, and the judgment and scoring results are displayed on the displays 23-25. Further, a musical tone signal is formed in a musical tone forming circuit 17 in response to a key operation on the keyboard 16, and this musical tone signal is sent to a speaker 19 via an amplifier 18 so as to be expressed as a performance sound. here,
The amplifier 18 is also supplied with an automatic rhythm sound source signal from an automatic rhythm generator 28 driven by a tempo clock signal from an L tempo oscillator 27, so that automatic rhythm performance sounds are also generated. Information read from the storage device 26 is also supplied to a latch circuit 29.

This latch circuit 29 is given a latch command by a detection signal from a note length mark detection circuit 30 that detects note length marks from the read information.
When the note length information is read out from the memory, the latch circuit 29 latches and stores the note length information. The note length information stored in the latch circuit 29 is sent to the note length counter 3 in the comparison circuit 31.
It is compared with the count value of 2, and when they match, the equal signal E is output.
Generate Q. The note length counter 32 is connected to the tempo oscillator 27.
It is reset by the detection signal from the note length mark detection circuit 30 and measures the elapsed time since the note length information was read from the storage device 26. Then, when the elapsed time matches the note length information, the comparison circuit 31 generates the echo call signal EQ. The equal signal EQ from the comparator circuit 31 is converted into a differentiated pulse signal by a differentiating circuit 33, and a flip-flop circuit 35 is set via an OR circuit 34.

This flip-flop circuit 35 is reset by the note length mark detection signal, and the output signal at the time of setting is supplied to the AND circuit 36 as a gate signal. A system clock ◇ is coupled to this AND circuit 36, which takes out the clock signal when the flip-flop circuit 35 is set and supplies it to the address counter 37 as an address increment signal. Further, this device is provided with a start switch 38 that gives a start command.

This switch 38 is configured, for example, as a self-resetting type, and generates an IJ signal when operated, and a pulse signal is generated from a differentiating circuit 39 in response to the operation.A start pulse signal from this differentiating circuit 39 is used as a start signal STRT for initial settings, etc., and also sets the flip-flop circuit 36 via the OR circuit 34, resets the flip-flop circuit 40, and further resets the address counter 37 via the OR circuit 41. The flip-flop circuit 4 is set by the output signal from the end code detection circuit 42 that detects the end code when it is read from the storage device 26, and when set, the output signal is output from the OR circuit 41. In this device, the address counter 37 is reset and maintained, and at the time of resetting, a start signal is generated to give an automatic rhythm generation command to the automatic rhythm generation bag layer 28. That is, in this device, a start switch is used. 38 is operated, the reset of the address counter 37 is confirmed by the output signal from the differentiating circuit 39, the flip-flop circuit 35 is set, and a gate signal is given to the AND circuit 36, so that the address counter 37 is counted by the clock J. step forward

Then, the information UK of the starting address is sent from the storage device 26.
, is read out and supplied to the determination units 20 to 22. At the same time, the flip-flop circuit 40 is reset and a start signal is given to the automatic rhythm generating device 28 to start automatic rhythm performance. Then, as the address counter 37 increments, when the next stored information LENGTH is read out from the storage device 26, a detection signal is obtained in the note length mark detection circuit 30.
A latch command is given to the latch circuit 29 to latch store the read note length information.

In addition, the note length mark detection signal resets the note length counter 32, resets the flip-flop circuit 35, closes the gate of the AND circuit 36, stops the address counter 37, and stops reading from the storage device 26. be done. That is, reading from the storage device 26 is temporarily stopped in a state in which information corresponding to one note has been read from the storage device 26. Then, when the time corresponding to the note length information stored in the latch circuit 29 has elapsed from the above state, the equal signal is tied from the comparison circuit 31 as described above, the flip-flop circuit 35 is set, and the address The counter 37 is incremented to read the next UK information UK2, and the note length information attached thereto is latched and stored in the latch circuit 29.

In this way, the UK information corresponding to each note stored and set in the storage device 26 is sequentially read out at time intervals corresponding to the note length, and is supplied to the determination units 20 to 22.

In addition, on the keyboard 16, in accordance with the automatic rhythm sound generated by the automatic rhythm generator 28 activated at the start,
If a student is practicing playing, and the student's keystrokes are performed accurately on the musical score, the pitch information from the keyboard 16 will match the pitch information read out from the storage device 26, and the judgment will be made. The sections 20 to 22 determine whether the key has been pressed correctly, and the results of the determination are displayed as a score on the displays 23 to 25.

FIG. 4 shows in detail the portion related to the above-mentioned judgment section, in which information read from the storage device 26 is supplied to the latch circuit 43. This latch circuit 43 includes a UK mark detection circuit 4 that detects the UK mark from the above read information.
The detection signal from 4 is supplied as a latch command to cause the latch circuit 43 to latch and store the read UK information. That is, the first pitch information corresponding to the model performance is obtained in conjunction with the latch circuit 43 and the UK mark detection circuit 44, and the UK mark detection circuit 44 obtains all UK pitch information including rests. An output signal is generated in response to the rise of information. This UK mark detection signal is extracted as a pulse wave signal by a one-shot circuit 45, and is passed through a delay circuit 46 consisting of a delayed flip-flop driven by a tempo clock TCL to a first pulse wave signal.
A signal AΔ corresponding to the rising edge of the pitch information is generated. Further, the OR circuit 47 detects a state in which the input read information is not all "0", and supplies the output signal from the OR circuit 47 to the AND circuit 48 together with the UK mark detection signal. That is, an output signal is obtained from this AND circuit 48 as pitch information corresponding to a note (excluding rest marks) is generated, and this output signal is converted into a pulse waveform by a one-shot circuit 49 and driven by a clock TCL. The signal is taken out as a signal AΔ2 via a delay circuit 50. That is, if the UK information indicated by the musical note marks in FIG. 5 is sequentially stored in the storage device 26, signals A△, , A△2 are generated as shown in FIG. 5 in response to the tempo clock TCL. be done.

Then, the signal AΔ2 becomes a signal corresponding to the key-on of each corresponding note, and the signal AA is used as the key-off signal of the previous note. The signal AΔ2 corresponding to the note is counted by a population counter 51. This parameter counter 51 receives the start signal ST
This is initialized by RT, and counts the number of pieces of information corresponding to key operations, generating parameter information BOSU. Further, second pitch information corresponding to key operations on the keyboard 16 is supplied to the comparison circuit 52 .

The comparison circuit 52 is supplied with output information from the delay circuit 53 to which the second blue/height information is supplied as comparison information, and the comparison circuit 52 generates an output when the two input information do not match. let That is, when a new key is operated on the keyboard 16 or a previously pressed key is released, the output signal is obtained from the comparator circuit 52 in a state where the second pitch information changes. This comparison circuit 5
The output signal from 2 is the signal M△ corresponding to the signal A△,
, is said to be. Further, the OR circuit 54 detects a state in which the second pitch information is not all "0", and supplies the output signal from the OR circuit 54 to the AND circuit 55 together with the output signal from the comparison circuit 52. This AND circuit 55 generates a signal MΔ2 corresponding to the signal AΔ2. Here, if an accurate key operation is performed on the keyboard 16 that matches the note information read out from the storage device 26, in synchronization with the signals A△, , A△2, respectively, as shown in FIG. Signals M△・'M△2 are generated.

The above signals A△ and M△2 are each clock TCL.
The signals at the input and output terminals of the delay circuits 56 and 57 are detected by OR circuits 58 and 59, respectively, and the signals A△2 and A△2 are supplied to delay circuits 56 and 57 driven by
Converts the signal into a signal width equal to two frequencies of the clock TCL,
The AND circuit 60' supplies V. That is, the signal A△2
and M△24 are compared in timing with a tolerance width corresponding to the output signal width of the OR circuits 58 and 59, and when the timings match within the tolerance range, an output signal is taken out from the AND circuit 60 as a timing signal. . The output signal from the AND circuit 60 is counted by a counter 61 which is initialized by the start signal STRT, and is divided by an arithmetic circuit 62 based on the parameter information BOSU to perform arithmetic scoring of timing correctness. 23 is displayed. In other words, this portion constitutes the timing determining section 20. Further, the first pitch information latched and stored in the latch circuit 43 and the second pitch information corresponding to the operation of the keyboard 16 are compared in pitch in a comparator circuit 63, and in a matched state, the first pitch information is output from the comparator circuit 63. An equal signal EQ is generated.
In other words, the key that matches the pitch in the model performance information is
When the keyboard 16 is operated, an equal signal is generated from the comparator circuit 63, and this equal signal EQ
is supplied as a set command to the flip-flop circuit 65 via the delay circuit 64 driven by the clock TCL.
This flip-flop circuit 65 is reset by the signal A△2 that precedes the signal from the delay circuit 64, and this flip-flop circuit 65 is reset in response to the rise of the first pitch information and is pressed. 2 set by the equal signal output of the key pitch correct comparison circuit 63
It will start to operate stably. Then, the differentiating circuit 66 detects the set reversal operation of the flip-flop circuit 65 when the key press pitch is correct. That is, this part constitutes the timing judgment circuit 21, and the differentiating circuit 6
The output signal from 6 is counted by a counter 67 which is initialized by the start signal STRT, and a calculation circuit 68 performs a scoring operation based on parameter information 80SU, and the result is displayed on the display 24. Signal A△2 corresponding to first pitch information
and A.DELTA.. supply V to the shift registers 69 and 7, which are driven by the clock TCL, respectively. The shift register 69 is composed of 4 bits, and the output signal from the first bit is given to a flip-flop circuit 71 as a set command, and this flip-flop circuit 71 takes out the output of the fourth bit of the shift register 69 via an OR circuit 72. , is reset controlled. therefore,
The output signal of this flip-flop circuit 71 when set is:
It becomes as shown by F in Fig. 5. In addition, the shift register is composed of 7 bits and 3 bits, and the signal at its input terminal is combined as a set command to the flip-flop circuit 73.
The output signal from the bit is supplied to the flip-flop circuit 73 via an OR circuit 74 as a reset command.

Therefore, the set power signal of the flip-flop circuit 73 becomes as shown by F2 in FIG. OR circuit 72
, 74 are supplied with a start signal STRT to reset the flip-flop circuits 71 and 73 to their initial states.
Further, the signal M△, corresponding to the second pitch information is differentiated by a differentiating circuit 75 in response to a clock 4TCL having a frequency four times that of the clock TCL, and the differential Z-minute pulse is derived from the clock 4TCL.
It is supplied to an 8-bit shift register 76 driven by TCL.

Therefore, the output signal from the shift register 76 is generated with a delay of 4 TCL x 8 from the rising edge of the signal M△, as shown by KOFF in FIG. 5. The signal M△2 from the AND circuit 55 is , is differentiated by a differentiating circuit 77 corresponding to the clock 4TCL, and is supplied to a shift register 78 driven by the clock 4TCL.Then, the signal shown as KON in FIG. The signal is supplied to the AND circuit 79. Therefore, when the signal KON is generated within the allowable time range indicated by the signal F, the AND circuit 79 outputs the AN signal in FIG.
An output signal as shown by D is generated, and the output signal from the AND circuit 79 is sent to the flip-flop circuit 80.
Set. This flip-flop circuit 8 is reset by the output signal of the delay circuit 81 which is supplied with the signal KOFF, and its set power signal is shown in FIG.
The state shown in 3 is reached. Then, this signal F3 is supplied to an AND circuit 82 together with an output signal F2 from a flip-flop circuit 73 in which the signal AΔ2 has a time width in a shift register 70, and a signal KOFF from a shift register 76. That is, this AND circuit 82
From then, the interval of occurrence of the first pitch information, that is, the note length,
The AND circuit 8 generates a correct note length signal as shown by LR in FIG.
The output signal from 2 is counted by a counter 83 which is initialized by the start signal STRT. That is, this part constitutes the note length determining section 22, and the count value information of the counter 83 is sent to the parameter information BOSU in the arithmetic circuit 84.
The score is calculated and displayed on the display 25. That is, according to such a device, if a key is operated on the keyboard 16 in a timing-matched state corresponding to the first pitch information read out from the storage device 26, the AND circuit 60 will output a key press. A correct timing signal is obtained, and it becomes possible to display scores from various viewpoints. In addition, when the key operated on the keyboard 16 is the correct key and a performance sound with a pitch corresponding to the musical score is obtained, the flip-flop circuit 65 is inverted, a judgment is made that the pitch is correct, and the pitch of the pressed key is changed. Scoring of correct answer rate is also performed effectively.

Incidentally, the bistable flip-flop circuit 65 that determines the correctness of the pressed key pitch receives a signal A△2 corresponding to the first pitch information.
Although the reset is performed in the above embodiment, this can be similarly implemented by performing reset control using the signal MΔ2 corresponding to the rise of the second pitch information corresponding to the key depression operation of the keyboard 16.

In addition, in the case of this FIG. 4, corresponding to the embodiment of FIG. 2,
A case has been shown in which information read from the storage device 26 is used as the first pitch information. However, as shown in FIG. 1, the same configuration can be achieved even if the performance information from the master keyboard 11, which is operated by the teacher for performing the model performance, is used as the first pitch information. When the performance information from the keyboard 11 is used as the first pitch information, it is done in the same way as when the signals M△, , M△2 are formed based on the second pitch information from the keyboard 16. Then, the signals A△, , A△2 may be formed.

In the above embodiment, in order to determine the correct pitch of the operated key on the keyboard 16, a bistable means by the flip-flop circuit 65 is used to detect the state of reversal to one of the flip-flop circuits. Logical means may also be used as shown.

That is, the equal signal from the comparison circuit 63 for the first and second pitch information is delayed by delay circuits 85a and 85b driven by the clock TCL, and then supplied to the AND circuit 86. In addition, delay circuits 87a and 87 that draw the same signal A△,
The signals at the input and output terminals of each of the delay circuits 87a to 87c are detected by the OR circuit 88, and the signal A△ is supplied to the AND circuit 86 as a signal with a sufficiently long time width. Supply V supply. That is, the delay circuits 85a and 85b are included in the expanded width of the signal from the OR circuit 88.
If a correct pitch signal is generated via the AND circuit 86, the AND circuit 86 obtains the logical product information as the correct pitch signal, and it is only necessary to count the number of correct pitch keys pressed by a counter. . FIG. 7 shows an embodiment in which a correct performance is determined based on the key press timing and the key press pitch. The equal signal sets the flip-flop circuit 65 via series delay circuits 89a, 89b, and 89c each driven by the clock TCL.

This flip-flop 65 is connected to a delay circuit 90a.
, 90b, and the flip-flop circuit 6 is reset as in the case shown in FIG.
A set of 5 represents the correct key press pitch. On the other hand, the signal AA2 obtained via the delay circuits 90a and 90b
and the signal M obtained from the AND circuit 55 in the same manner as in the case of FIG. 4 and taken out via the delay circuits 91a and 91b.
△2 are respectively the delay circuits 56 and 56 as in the case of FIG.
The key press timing coincidence signal is taken out from an AND circuit 60 to which the signal is supplied to the AND circuit 57 and taken out via the OR circuits 58 and 59. The correct key press timing signal from the AND circuit 60 sets a flip-flop circuit 92.

This flip-flop circuit 92 includes the delay circuit 91a.
The set output signal is supplied to the AND circuit 93 together with the signal AΔ2 and the set output signal of the flip-flop circuit 653. That is, when both the key press pitch and the key press timing are correct, a correct judgment signal is obtained from the AND circuit 93, and this correct signal is counted by the counter 94 which is initialized by the start signal STRT. The count information of the counter 94 is scored in an arithmetic circuit 95 based on the parameter information of the parameter counter 51, and is displayed on a display 96.
．． In other words, this device comprehensively judges whether the key press pitch and key press timing, which are very important in keyboard performance practice, are correct and displays a score.

As described above, according to the present invention, the state of a student's keyboard practice, especially the state of pitch and timing, can be effectively determined by comparing with model performance information, and it is possible to objectively grade the student's keyboard practice. This allows the practicing students to understand the performance techniques in a way that they can fully understand.
This is an effective way to improve learning effectiveness.

[Brief explanation of the drawing]

FIG. 1 is a block diagram illustrating a practice device according to an embodiment of the present invention, FIG. 2 is a block diagram explaining another embodiment of the present invention, and FIG. 3 is a block diagram illustrating storage information for a storage device in this embodiment. 4 is a diagram showing the configuration related to the determination section of the above embodiment in more detail. FIG. 5 is a signal waveform diagram explaining the use of FIG. 4, and FIGS. 6 and 7 are diagrams showing the format. The figures are configuration diagrams illustrating still other embodiments of the present invention. 11... Master machine keyboard, 12... Master machine musical tone forming circuit, 1
5a, 15b...Slave device, 16...Keyboard (slave device), 2
0-22... Judgment unit, 23-25... Display device, 26
...Storage device, 27...Tempo oscillator, 28...Automatic rhythm generator, 37...Address counter, 60...
AND circuit (timing judgment AND), 63... comparison circuit (pitch), 65... flip-flop circuit (bistable circuit). Figure 1 Figure 3 Figure N Rudder diagram Dim Yan Figure 5 Figure 6 Figure 7

Claims (1)

[Scope of Claims] 1. Means for generating first pitch information corresponding to notes based on model performance information, and means for generating second pitch information corresponding to key press operations on a practice keyboard. and a comparison circuit for detecting a matching state of the first and second pitch information; A practice device for a keyboard instrument, comprising a bistable circuit that is inverted to a second state, and a correct key press operation is determined in the second state of the bistable circuit. 2. The apparatus according to claim 1, wherein the first pitch information generating means is constituted by a teacher's keyboard, and generates pitch information corresponding to key operations on the keyboard. 3. The first pitch information generating means includes a storage device in which notes information consisting of pitches and note lengths are sequentially set and stored in addresses, and a storage device that sequentially stores each note information in correspondence with note lengths from this storage device. 2. A device according to claim 1, comprising reading means. 4. The device according to claim 1, wherein the correctly pressed key determination signal from the bistable circuit is counted by a counter, scored, and displayed on a display. 5 means for generating first pitch information corresponding to notes based on model performance information; means for generating second pitch information corresponding to key press operations on the practice keyboard; a comparison circuit for detecting a matching state of the pitch information; a means for generating a pulse signal having a width specified from the rising edge of the first or second pitch information; and a pulse signal from the means and the comparison circuit. 1. A practice device for a keyboard instrument, comprising means for performing a logical product with an output signal from the keyboard, and the logical product output is used as a signal for determining a correct key press operation. 6. The apparatus according to claim 5, wherein the first pitch information generating means is constituted by a teacher's keyboard, and generates pitch information corresponding to key operations on the keyboard. 7. The first pitch information generation means includes a storage device in which notes information consisting of pitches and note lengths are sequentially set and stored in addresses, and each note information is sequentially sent from this storage device in accordance with note lengths. 6. The device according to claim 5, comprising reading means. 8. The device according to claim 5, wherein the logical product output is counted by a counter, scored, and displayed on a display. 9 means for generating first pitch information corresponding to notes based on model performance information; means for generating second pitch information corresponding to key press operations on a practice keyboard; a comparison circuit for detecting a coincidence state of the second pitch information; a key press timing coincidence detection means for comparing the rise timings of the first and second pitch information; and a coincidence detection signal from the coincidence detection means; A practice device for a keyboard instrument, comprising means for calculating the logical product of the output signals from the comparison circuit, and for determining the pitch and timing of a correctly pressed key. 10. The apparatus according to claim 9, wherein the first pitch information generating means is comprised of a teacher's keyboard, and is adapted to generate pitch information corresponding to key operations on the keyboard. 11 The first pitch information generation means includes a storage device in which note information consisting of pitch and note length is sequentially set and stored in addresses, and a storage device that sequentially stores each note information in accordance with the note length from this storage device. Claim 9 consisting of reading means
Apparatus described in section. 12. The device according to claim 9, wherein the AND output signal is counted by a counter, scored, and displayed on a display as pitch-key press timing correct score.