JPS602838B2 - Howling suppression control device - Google Patents

Description

[Detailed Description of the Invention] The accommodation shown in the first diagram receives sound waves from a sound source SS with a microphone M, converts them into electrical signals, amplifies them with an amplifier AM, and then gives them to a speaker SP to make a sound. In a loudspeaker system, when a microphone M is installed in a sound field created by sound waves emitted from a speaker SP, a loop of microphone M → amplifier AMP → speaker SP → microphone M is formed; It is well known that when the first round gain exceeds 1, a so-called howling phenomenon occurs in the sound field.

If a howling phenomenon occurred in the hall in the past, a single frequency component would increase abnormally in the broadside signal, making it impossible to perform normal amplification. The present invention recognizes the howling signal waveform from the waves of the loudspeaker signal extracted from any part of the loop in the signal amplification system, and automatically adjusts the gain of the signal transmission system when the occurrence of howling is recognized. The purpose of this invention is to provide a howling suppression control device that can suppress howling by changing the amount of noise, and its specific contents will be explained in detail below with reference to the accompanying drawings.

FIG. 2 is a block diagram when an embodiment of the howling suppression control device HSD of the present invention is applied to a signal amplification system, and in FIG. 2, SS is a sound source;
M is a microphone, PrA is a front layer amplifier, VA is a variable gain amplifier, PA is a power amplifier, and SP is a speaker.
In the figure, a portion surrounded by a dashed-dotted line frame indicates the howling suppression control device HSD.

Howling suppression control device HSD shown in Fig. 2
, 1 is a signal input terminal, and this input terminal 1 receives a signal from a sound collection microphone Mm installed at an arbitrary position in the sound field by the signal voice system (the output signal of the sound collection microphone Mm is amplified). signal)
, or a signal obtained by amplifying the output signal of the microphone M by the front-layer amplifier PrA is provided through a signal line indicated by a virtual line lx in the figure without using the microphone Mm.

In Fig. 2, HRD is the amplitude value of the input signal when the first-order differential output of the input signal changes from positive to negative or from negative to positive, that is, the polar amplitude value of the input signal on the time axis. The CSG is a howling recognition section that can recognize the howling waveform in an input signal based on a change pattern and output a howling recognition signal. The gain control signal generator VA that generates a gain control signal in a desired form is a variable gain amplifier whose gain is controlled by the gain control signal generated by the gain control signal generator CSG.

FIG. 3 shows howling recognition unit H shown in FIG.
This is a block diagram of an example configuration of RD, and in this FIG. An extreme value detection section configured to detect the amplitude value of the input signal, that is, the extreme amplitude value of the input signal,
This extreme value detection section PDD can be realized, for example, as a configuration shown in the block diagram shown in FIG. 4.

In addition, PID in FIG. 3 is a polarity difference detection which outputs a detection force depending on whether or not the polarities of two successive extreme amplitude values of input signals detected one after another in the extreme value detection unit PDD are the same. AID is an amplitude change detection unit that outputs a detection force depending on whether two successive extreme amplitude values of input signals successively detected in the extreme value detection unit PDD are the same or increasing. , CT is a counter that counts the number of pulse signals sent from the extreme value detection unit PDD every time the extreme amplitude value is updated, and outputs a signal every time the counted value reaches a predetermined number. FFp and FF3 are flip-flops, NOR is a NOR circuit, AND is an AND circuit, and 2 is an output terminal of a howling recognition section. First, the extreme value detection unit POD will be explained with reference to FIG. 4 as follows.

In Fig. 4, a is the analog signal input terminal, ADC
are analog-to-digital converters, LD and ~LD3 are latch units, MM and ~M are monostable multipipulators, ORa is an OR circuit, COM Misaki comparator, and FF.
is a flip-flop, b is the output terminal for the extreme amplitude value, d is the terminal to which a starting pulse is given at the start of operation (when the power is turned on), and c is the output terminal for the pulse generated when the extreme amplitude value is updated. The digital conversion unit ADC is configured to have a function of sampling and quantizing the analog signal supplied from the input terminal a, and sending it out as a digital signal indicating the amplitude value of the input signal. - The digital conversion unit ADC is activated every time the output pulse P3 (Fig. 5a) from the monostable multipipulator MM3 is given, and performs sampling and quantization operations on the input analog signal, A digital signal indicating an amplitude value is sent to the conductor group 1, and a doji conversion completion signal Pe {FIG. 5b} is sent to the wire lo. That is, in the extreme value detection unit PDD shown in FIG. 4, when the starting pulse Ps {FIG. 5 e} is supplied to the input terminal d after the power is turned on and the unit is in an operable state, the starting pulse is Ps triggers the monostable multipipulator MM3 through the OR circuit ORa, so that the output pulse P3 generated by the monostable multi/vibrator MM3 is used for sampling and quantum processing for the analog signal in the analog-to-digital converter ADC. start the conversion operation. When the sampling and doji conversion operations for the input analog signal in the analog-to-digital converter ADC are completed,
Line 1 is the analog/digital converter ADC or Z. A doji conversion completion signal Pe is sent to the monostable multi-pipetrator MM, through the monostable multi-piper MM,
is triggered at the rise of the child conversion completion signal Pe. Further, the digital output signal of the analog-to-digital converter is sent to the conductor group 1 from the analog-to-digital converter ADC. Each time the monostable multipipelator MM is triggered, it generates an output pulse P as shown in FIG.

The monostable multipipulator M is triggered at the falling edge of the output pulse P from the monostable multipipulator MM, and generates an output pulse P2 as shown in FIG. 5d, and latches it. LD, and a monostable multipipulator MM3 via an OR circuit ORa. The monostable multipipelator MM3 is triggered at the falling edge of the output pulse P2 of the monostable multipipelator MM2 and generates an output pulse P3 as shown in FIG. 5a,
This output pulse P3 is given as a starting pulse to the analog-to-digital converter ADC as described above.

The digital signal indicating the amplitude value sent out from the analog-to-digital converter ADC through the conductor group 1 {FIG. 5 f} is the output pulse P2 of the monostable multipipulator MM2.
is applied to the latch part LD, it is transferred to the latch part LD through the conductor group 1 and held there {Fig. 5g}, and the amplitude value held in the latch part LD, When the output pulse P of the monostable multipipulator MM is applied to the latch LD2, the digital signal {Fig. 5g} indicating {Figure 5 h}.

Further, the digital signal indicating the amplitude value sent from the latch part LD to the conductor group 12 {Fig. 5g} is transmitted to the conductor group 1
4 to the comparator and to the OMP, and
The digital signal indicating the amplitude value sent from the latch unit LD2 to the conductor group 13 (Fig. 5h) is also given to the comparator COMP via the conductor group 15, so the comparator C
In OMP, the amplitude values of two adjacent analog signals separated by one sampling period T on the time axis are compared with two corresponding digital signals. And OM to the comparator
Of the two digital signals compared at P, the digital signal supplied from the latch section LD2 to the comparator COMP' via the conductor group 15 is the one that is supplied from the latch section LD to the comparator via the conductor group 14. This is a signal that precedes the digital signal given to the OMP by one sampling period T on the time axis. This can be readily understood from the time relationship of each pulse shown in FIGS. 5a to 5d and the signal states shown in FIGS. 5g and 5h. In the comparator COMP, if the amplitude value indicated by the digital signal held in the latch part peak D2 is larger than the amplitude value indicated by the digital signal held in the latch part peak D, the line 16 A high level signal Si {Fig. 5 i} is output to If the amplitude value is smaller than the amplitude value indicated by the digital signal, the signal Si at level 17 is shown (Fig. 5 i).
Output.

In addition, during the period of the pulse P, the ratio C
Since the same digital signal is applied to OMP as two comparison signals, lines 16 and 1 from the comparator COM circle
Since both of the two signals outputted to 7 are at low level, the signal Si(
or Si), a low level period as shown in FIG. 5 i, i occurs. Comparator COM circle to line 16.17
The comparison output signals Si, Si sent out through the flip-flop FF are given to the flip-flop FF, and the flip-flop FF outputs a signal Sk corresponding to an increase in the amplitude value or a decrease in the amplitude value.
{FIG. 5k} is sent out on line 18.

The signal sent to line 18 is directly connected to the exclusive OR circuit BO.
It is applied to R as one input thereof, and is applied as its other input to the exclusive OR circuit EOR via the delay circuit DL. Therefore, every time the state of the output of the flip-flop FF is inverted, an output pulse Po {FIG. 5, FIG. 1} having a pulse period corresponding to the delay time in the delay circuit DL is sent from the exclusive OR circuit EOR to the latch section. A digital signal {Fig. 5 h} indicating the amplitude value held in the latch part LD2 at the time of the output pulse Po output from the exclusive OR circuit EOR is transferred to the latch part LD3. and is output to output terminal b. Figure 6 shows input terminal 1 in the extreme value detection section in Figure 4.
6 is a waveform diagram of the analog signal Sin supplied to the analog signal Sin in FIG. of V in V,,V2
... means that the analog signal Sin is at each sampling time to,L
is the voltage value (amplitude value) sampled at...
Vo. in analog signal Sin. V. ... are quantized in the analog-to-digital converter ADC, and each amplitude value Vo in the analog signal Sin described above is quantized.
,V. A digital signal indicating a numerical value corresponding to ... {5th
Figure f} and is sent to the conductor group 1 as described above. In addition, in Figures f to h of Figure 5 and Figure 5 m, etc., in order to make it clear that the digital signal indicating the amplitude value corresponds to the amplitude value of the analog signal Sin shown in Figure 6. , it is shown as Vo,V,,V21''.

As mentioned above, the extreme value detection section PDD illustrated in FIG. 4 has an analog input to its input terminal a.

For digital signals whose amplitude values are quantized at every predetermined sampling period T in the sampling signal Sin, two signals separated by one sampling period T on the time-ordinary axis are sequentially compared and detected. In the analog signal Sin, the amplitude value when the first-order differential output of the change in amplitude value changes from positive to negative or from negative to positive, that is, the maximum value, is detected, and information on the absolute value of the amplitude and polarity are detected. The output pulse Po is sent to the output terminal b as a digital signal containing the information of
The output signal from the terminal b in the extreme value detection unit PDD is given to the polarity difference detection unit Pm and the amplitude change tendency detection unit MD in the ring recognition unit HRD shown in FIG. The output pulse Po from the terminal C of the section POD is given to the polarity difference detection section PID, the amplitude change mirror direction detection section MD, and the counter CT in the howling recognition section HRD. In the polarity difference detection unit PID, the extreme value detection unit PD
Regarding two consecutive digital signals that are sent out one after another on the time tree from output terminal b of D, the polarity of the two signals is determined at the time when the output pulse Po is sent out from the terminal C of the extreme value detection unit If the difference is detected and the two signals that precede and follow on the time mirror are the same victim, a low level output is applied to the set input terminal S of the flip-flop FFp to set the flip-flop FFp.

When the two preceding and following signals have different polarities, the output of the magnetic difference detection section Pm is set to a high level, and in this case, the flip-flop FFp is not set. In addition, in the amplitude change tendency detection unit Am, the extreme value detection unit PDD
The extreme value detection unit FDD detects two consecutive digital signals that are sent out one after another on the time axis from
At the time when the output pulse Po is sent out from the terminal C of the
If the absolute value of the amplitude of the signal that follows on the time axis is smaller than the absolute value of the amplitude of the signal that precedes on the time axis among the two signals, a low level output is set to the flip-flop FFa. It is applied to the input terminal S to set the flip-flop FFa.

In addition, when the absolute value of the amplitude of two successive signals is the same, or when the absolute value of the amplitude of the subsequent signal on the time axis is larger than that of the other signal, the amplitude change trend detection unit AI
The output of D is made high level, and in this case, flip-flop FFa is not set. The above flip-flop FFp. The high level output that appears on their output side when FFa is set is /A circuit NO.
It is given as one input to the AND circuit AND through R, and as the other input to the AND circuit AND, the output pulse is output from terminal e every time T reaches a predetermined count value in the counter. is given.

The counter CT counts the number of pulses Po sent from the terminal C of the extreme value detection PDD every time the extreme amplitude value is updated, and
When the count value reaches a predetermined value, a high-level output pulse is sent from the terminal e, and then the count value is returned to the initial value (for example, 0), at which time the terminal f
The operation of sending out output pulses from .

The high level output pulse sent from the terminal f of the counter CT is given as a reset pulse to the flip-flops FFp and FFz described above via the inverter INV. As the counter CT described above, for example, a so-called ring counter may be used. 1 in Figure 3
In the example howling recognition unit HRD, for the input signal Sin supplied to the input terminal 1, what is the change pattern on the time axis of the polarity and absolute value of the extreme amplitude values that appear one after another on the time axis? You can easily know whether the input signal supplied to input terminal 1 is It is possible to recognize whether a howling component is occurring in the signal.

That is, the howling recognition unit HRD determines which of the successive extreme amplitude values that appear during the period from the initial value to the predetermined count value of the counter CT (unit counting operation period). For two consecutive extreme amplitude values, if there are two successive ones with the same polarity, or if the absolute value of the amplitude at any two consecutive extreme amplitude values shows a decreasing direction, a flip-flop occurs. FFp, FF.
Since one or both of these are set and one input from the /A circuit NOR to the AND circuit AND is at a low level, the counter CT counts pulses up to a predetermined number. Even if the output pulse output from the terminal e is applied to the AND circuit AND, a low level output appears at the output terminal 2, and
Until the counter CT finishes counting pulses up to a predetermined number, flip-flops FFp, FF .
If none of the above are set,
The howling recognition signal Ph at a high level is obtained from the output terminal 2.

The number of pulses to be repeatedly counted by the counter CT should be determined depending on the detection accuracy of the ring recognition.

/ When the howling recognition unit HRD recognizes the presence of a howling component in the input signal Sin and sends the howling recognition signal Ph to its output terminal 2, the gain control signal to which the howling recognition signal Ph is supplied is Occurrence Hishi Nao C
The SG generates a gain control signal Sg that can change the gain of the variable gain amplifier VA as required from the time when the ring recognition signal Ph is generated, and supplies it to the variable gain amplifier VA.

7 and 8 illustrate and explain how the gain of the variable gain amplifier VA changes from the time when the Howling recognition signal Ph is generated. This is the howling recognition signal Ph, and each figure b in FIGS. 7 and 8 shows how the gain of the variable gain amplifier VA changes.

In each figure b of Fig. 7 and Fig. 8, G,, G2...
The symbols such as "g", "g", "axis", etc. indicate the gain of the variable gain amplifier VA set according to the gain control signal Sg generated by the gain control signal generator CSG, and the symbols "g", "matrix", and "axis" indicate the gain control signal generator CSG. Gain control signal Sg generated by CSG
The figure shows the change in gain that occurs in the variable gain amplifier VA when is applied to the variable gain amplifier VA. First, the manner in which the gain of the variable gain amplifier VA shown in FIGS. The gain of the amplifier VA is set so that it has a standard gain G, but when the ring recognition signal Ph is generated, the gain is set in advance for a predetermined period of time from that point onwards. specified size g
The gain of the variable gain amplifier VA is decreased by the amount of time, and after the above-mentioned period of time has elapsed, the gain increases toward the gain G at a predetermined rate of gain increase.

The manner in which the gain of variable gain amplifier VA as shown in FIG. In the example shown in Figure 7,
The variable gain amplifier VA operates at time t. when the first howling recognition signal Ph occurs. up to the standard gain G,
When the howling recognition signal Ph appears at time t4, G
, the gain is reduced by g by a gain G2, and at time t. Time t when a predetermined period of time ↑ has elapsed since
From b, the gain is increased at a constant rate of increase and returns to the gain G at time tc, and when the howling recognition signal Ph is generated again at time td, the gain is decreased by g at that point, and during the time The gain increases again at a constant rate of increase from time te, which has elapsed by ↑, but when the howling recognition signal Ph occurs at the gain G3 (G,>G3>G2) before the gain reaches G, At that time tr, the gain G4 is lowered by g than the gain power 3,
Next, from time tc, which is a period of 10 minutes after time tr, the gain increases at a constant rate of increase, and returns to the standard gain G when the howling recognition signal Ph does not appear.

When the howling suppression operation by the howling suppression control device HSD is performed as shown in FIGS. 7a and 7b, that is, each time the howling recognition signal Ph is detected, the gain of the variable gain amplifier VA is After decreasing by a constant magnitude g for a constant time 7,
If the gain is returned to the standard gain G at a constant rate of increase, the howling phenomenon can be satisfactorily eliminated by the gain g and time 7 to be decreased as described above. It goes without saying that it is desirable to select a value that does not cause too much unnaturalness in the perception of intelligence, and the same applies to the rate of increase in gain.

As mentioned above, FIGS. 8a and 8b show that when the howling recognition signal Ph is generated, the gain of the variable gain amplifier VA is reduced by a predetermined amount over a predetermined time. Figure 7 a and b were explained/・
This is similar to the suppression mode of the ring, but this Fig. 8 a, b
In the illustrated case, when the howling recognition signal Ph is generated, the gain of the variable gain amplifier VA is greatly reduced (the amount of gain reduction g, is different from the amount of gain reduction g in the case shown in FIG. 7 described above). g,>g), and after the above-mentioned certain period of time has elapsed, the variable gain amplifier V is immediately increased by a predetermined magnitude g2, with the relationship 9>g2.
This figure shows how the gain of the variable gain amplifier VA changes when the gain of A is increased and then the gain is increased at a constant rate of increase toward the standard gain G. .

The variation of the gain of the variable gain amplifier VA as shown in FIG. The howling suppression operation shown in FIGS. 8a and 8b provides the variable gain amplifier VA with a large gain reduction 9 that can be considered to reliably eliminate the howling phenomenon when howling is recognized. ,
After a certain period of time has elapsed, the gain of the variable gain amplifier VA is set to g2.
(However, the gain is increased by &>&), and thereafter the gain is increased at a constant rate of increase until it reaches the standard value G. Compared to the howling suppression operation shown in Figure 7, the overall ship You can make a large profit and quickly/reliably/
・Can eliminate the ringing phenomenon.

Of course, when implementing this, consideration should be given so as not to give an unnatural feeling to the reproduced sound. The howling suppression control device of the present invention recognizes the howling waveform from a signal extracted from an arbitrary point in one loop in the signal voice system, and changes the gain of the signal transmission path based on the howling waveform to suppress howling. In addition, as long as howling does not occur in the sound field, the signal amplification system can be operated with the standard gain maintained regardless of the magnitude of the broadside signal input. Even if the relative relationship with the speaker changes and the overall characteristics of the sound field change, excellent howling suppression characteristics can be exhibited regardless of the change, and the howling suppression control device of the present invention By using this, the signal portability system can be operated without worrying about howling.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a signal loudspeaker system, FIG. 2 is a block diagram of a signal amplification system to which an embodiment of the howling suppression control device of the present invention is applied, and FIG. 3 is a block diagram of an example configuration of a howling recognition section. FIG. 4 is a block diagram of an example configuration of the extreme value detection section, FIG. 5 a to m and FIG. 6, FIG. 7 a, b, and FIG. FIG. SS: Sound source, M, Mm: Microphone, PrA: Front amplifier, VA: Variable gain amplifier, PA: Power amplifier, SP...
... Speaker, CSG ... Gain control signal generator, HRD ... Howling recognition section, HSD ...
...Howling suppression control bag counterfeit, PDD...Extreme value detection unit. Strategy 1 Strategy 2 Figure 3 Chrysanthemum 6 Flame Mu diagram Box ship diagram ■

Claims (1)

[Claims] 1. Determine the change pattern on the time axis of the amplitude value of the input signal when the first-order differential output of the input signal changes from positive to negative or from negative to positive, and a howling recognition section capable of recognizing a howling waveform and outputting a howling recognition signal; and controlling the gain of the signal transmission system so that howling is suppressed based on the howling recognition signal from the howling recognition section. A howling suppression control device comprising: a gain control signal generating device that generates a gain control signal; and an amplifier whose gain is variably controlled by the gain control signal. 2 Determine the change pattern on the time axis of the amplitude value of the input signal when the first-order differential output of the input signal changes from positive to negative or from negative to positive, and recognize the howling waveform contained in the input signal. a howling recognition unit that can output a howling recognition signal based on the howling recognition signal; a gain control signal generator that generates a gain control signal for controlling the gain of a signal transmission system based on the howling recognition signal; a howling suppression control device comprising a controlled amplifier, wherein the gain of the amplifier is reduced by a predetermined amount over a predetermined time span from the time of generation of the howling recognition signal; , a howling suppression control device that gradually restores the gain to the level before the decrease. 3 Determine the change pattern on the time axis of the amplitude value of the input signal when the first-order differential output of the input signal changes from positive to negative or from negative to positive, and recognize the howling waveform contained in the input signal. a howling recognition unit that can output a howling recognition signal based on the howling recognition signal; a gain control signal generator that generates a gain control signal for controlling the gain of a signal transmission system based on the howling recognition signal; and a controlled amplifier, the gain of the amplifier being reduced by a first predetermined amount over a predetermined time span from the time of generation of the howling recognition signal. and at the end of the time period, the gain of the amplifier is increased by a predetermined second amount smaller than the first amount, and then gradually restored to the original gain. Howling suppression control device.