JPS6034196B2 - semiconductor integrated circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement of a semiconductor integrated circuit, and more specifically, it has a function of inputting a plurality of signals to one input terminal, and one of the functions has a function of inputting a plurality of signals to a single input terminal. This invention proposes an input circuit for a semiconductor integrated circuit that can avoid malfunctions due to input of transient voltages and has improved reliability.

Some of the input signals for semiconductor integrated circuits include write signals to nonvolatile memory transistors, logic checks inside semiconductor integrated circuits (hereinafter referred to as ICs), and signals for resetting the logic state of an IC to its initial value in the event of a malfunction. There is a signal that is rarely used. Such signals generally have special functions in many cases, and for this reason, it is necessary to prevent malfunctions due to noise signals and the like more than other signals. On the other hand, in ICs, it is desirable to simplify the manufacturing process and reduce the number of terminals as much as possible in order to reduce the size. It is said that it is wasteful to provide terminals. For this reason, conventional methods have been explored in which a single terminal has multiple functions by using terminals in a time-sharing manner, but such methods are not effective from the perspective of preventing malfunctions. It is hard to say that it is a method. The present invention has been made in view of the above circumstances, and by adding a clamp transistor connected to the signal input terminal, only the signal from the signal source with low output impedance exceeds the clamp voltage is transmitted to the subsequent circuit. By making it possible to add multiple functions to the input terminal, the purpose of the present invention is to provide an IC with improved reliability by allowing the input terminal to have multiple functions, and by avoiding malfunctions caused by noise signals and transient voltages for one of the functions. DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to drawings showing embodiments thereof.

FIG. 1 shows the input circuit portion of an IC according to the present invention, and FIG. 2A and 2B are waveform diagrams for explaining its operation.

In FIG. 1, Q is an n-channel enhancement type MIS transistor, which is a Clasp transistor, and its measurement and value voltage are Vm. Q2 is an input transistor of the logic circuit inside the IC. A terminal P. connected to the drain and gate of the transistor Q. is this IC
A terminal P2, which is a signal input terminal of the IC and connected to the source of the transistor Q, is connected to a power supply terminal of this IC, and a power supply voltage Voo is applied thereto. The gate and drain of the transistor Q connected to the terminal P are connected to the transistor Q2.
It is connected to the gate electrode of the IC, and is connected to a terminal P3, and a nonvolatile memory transistor or a voltage identification circuit constituting this IC is connected to this terminal P3. Two types of signals are input to the terminal P, the first type of input signal has a signal voltage amplitude between the substrate potential of this IC and V blood, and the second type of input signal has a signal voltage amplitude between the substrate potential of this IC and V blood. is a signal with a voltage sufficiently higher than Voo+Vth.

The output impedance of the signal source for the first type input signal may be high impedance, whereas the output impedance of the signal source for the second type input signal is set to be sufficiently lower than the input impedance of the transistor Q when conductive. There is. In other words, the on-resistance of the transistor Q is set to a value sufficiently higher than the output impedance of the signal source of the second type of input signal. These input signals are then connected to terminal P. The operation of the circuit of the present invention when the voltage is applied will be explained. Figure 2 A shows the voltage level of the signal applied to the terminal P, Figure 2 shows the level of the current flowing into the terminal P2 over time, and T shows the level of the current flowing into the terminal P2. T2 is the period when the first type input signal is at terminal P, and T2 is
3 indicates a period during which the second type signal is input.
Now, first, when the first type input signal is applied to the terminal P, (period T2), the transistor Q is not turned on, and this input signal is directly transmitted to the transistor Q2, and the transistor Q2 performs a predetermined operation. conduct.

At this time, the current flowing from the terminal P is the transistor Q,
Also, since the leakage current is only from the gate and junction of Q2 and is small as shown at the beginning of FIG. 2, the signal source of this first type input signal may have a high output impedance as described above. Next, when the second type of input signal is applied to the terminal P, (period T3), the transistor Q is turned on, so that a large Current flows.

However, since the output impedance of the signal source of the second type input signal is sufficiently lower than the on-resistance of the transistor Q, the voltage at the terminal P rises to a voltage sufficiently higher than Voo+Vth, and the second type input signal becomes effective.

When a nonvolatile memory transistor is connected to terminal P3, its write threshold is V. . When it is higher than , writing is performed only when this second type of input signal is applied, and when a voltage identification circuit is connected to terminal P3, its measure and value is V. D, this second type of input signal will be detected. Note that since the second type input signal is also transmitted to the transistor Q2, the input of the second type signal means that the first type signal and the second type signal are input together. On the other hand, when a noise signal or a transient voltage is input to terminal P, since the output impedance of these signal sources is generally high, these inputs turn on transistor Q, and the voltage between terminals P, P2 is turned on. is shortened by its conduction resistance, the noise signal, the transient voltage, is attenuated and the terminal P, becomes VD
The voltage cannot be sufficiently higher than D+Vth, and these noise signals and the like will not cause malfunction in the circuit connected to the terminal 3 as a second type input signal.

As described above, according to the present invention, one terminal P of the IC,
It is now possible to input a plurality of signals to the second type of input signal, and it is possible to avoid malfunctions due to the input of noise signals and transient voltages, and the manufacturing process is simple and can be miniaturized. This makes it possible to provide ICs with high reliability.

In the above description, the transistor Q is an n-channel transistor, but it goes without saying that the present invention can also be applied to the case where a p-channel transistor is used since the polarity is simply reversed. It goes without saying that a time-division signal can also be used as the first type of input signal.

[Brief explanation of the drawing]

The drawings show embodiments of the present invention, and FIG. 1 is a circuit diagram schematically showing an input circuit portion of an IC according to the present invention, and FIG.
Figures A and B are waveform diagrams for explaining the operation of the circuit of the present invention. Q,,Q2・…”Transistor, P,,P2,P3・…
“Terminal. Figure 1 Figure 2

Claims (1)

[Claims] 1. In a semiconductor integrated circuit equipped with a terminal to which at least two types of input signals are input, an enhancement type transistor is added whose gate and drain are connected to the terminal and whose source is set to a predetermined voltage, and the transistor is An on-resistance of the semiconductor integrated circuit is set to a value sufficiently higher than an output impedance of a signal source of an input signal having a sufficiently higher level than a voltage of the source among the input signals.