JPS6034849B2 - Muting circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a muting circuit used in audio equipment such as a tape deck.

In so-called muting circuits that temporarily lower the output level in addition to adjusting the volume when operating audio equipment, etc., it is necessary to ensure that the signal does not become distorted due to its operation. It must be such that it does not generate noise. For this reason, many devices are mainly used that are configured to electronically switch the amount of attenuation. An example of this is a circuit as shown in FIG.

This circuit is integrated circuit. 1 is a switching transistor whose collector and emitter are connected in parallel between the output terminal 6 and the ground, 2 is a parasitic transistor that is inevitably configured when integrated into an IC, and 3 is a muting transistor. The control signal terminal 4 is a resistor connected in series between the signal source 5 and the output terminal 6. When the signal at terminal 3 is a negative voltage, muting is inactive and transistor 1 is in an off state.

At this time, the parasitic transistor 2 is also turned off. Therefore, the impedance of the collector and emitter of transistor 1 in the off state is connected in parallel between output terminal 6 and The signal from source 5 is transmitted to output terminal 6 with little attenuation. When switching to muting operation, the signal at terminal 3 is set to a positive voltage.

This causes the transistor to conduct and its collector to
The emitter is switched to exhibit a fairly low impedance, with the result that the output terminal 6 is coupled to ground with this low impedance. The collector-emitter impedance of transistor 1 in this state is resistor 4
The signal from the signal source 5, which is divided by the resistor 4 and the impedance between the collector and emitter of the transistor, is suppressed to a sufficiently low level and appears at the output terminal 6. , the necessary muting operation can be obtained.

Now, in the circuit shown in Fig. 1, when we examine the waveform of the signal at the output terminal 6 when the muting is disabled, that is, when the transistor 1 is in the off state, we find that the waveform of the signal at the output terminal 6 is negative as shown in Fig. 2. It turned out that it was clipped in the direction of .

The clip level is the forward threshold voltage VF between the base and collector of transistor 1, and the forward threshold voltage VF2 between the base and collector of parasitic transistor 2.
It is determined by

Among these, the level caused by the voltage VF can be lowered by driving the control signal terminal 3 with high impedance or by increasing the negative voltage of the signal that turns off the transistor. However, since the collector of the parasitic transistor 2 formed when integrated into an IC is grounded, the clip level due to the base-collector threshold voltage VF2 cannot be lowered.

Therefore, this circuit generates large distortion for signals larger than the voltage VF2, and therefore has the drawback of a narrow dynamic range. A circuit as shown in FIG. 3 has been proposed as a muting circuit that eliminates this drawback and provides a sufficient dynamic range.

In the circuit shown in FIG. 3, a voltage line 7 is provided in addition to the circuit shown in FIG. It is designed to give.

If the voltage of this voltage source 7 is VE, the signal from the signal source 5 will change with voltage V8 as the average level as shown in FIG. It is now possible to operate without clipping even the signal in which the voltage (VE+VF2) is oscillating upward.

Therefore, according to the circuit shown in FIG. 3, by appropriately selecting the voltage VE of the voltage source 7, it is possible to handle a signal with an amplitude larger than the threshold voltage of the transistor or 2, and a sufficient dynamic range can be obtained. A muting circuit having the following structure can be obtained.

However, in reality, the voltage source 7 cannot be constructed from an ideal voltage source, so its internal resistance cannot be made virtually zero, and it has a considerable resistance value.

FIG. 5 shows a circuit having a more practical configuration in consideration of such circumstances.

In the circuit of FIG. 5, the voltage of the power supply ~cc is divided by resistors 9 and 10 as the voltage source 7 in FIG. 3, and the voltage V^ resulting from the voltage drop of resistor 9 is used.
12 and 13 are coupling capacitors that cut off the DC component and couple only the AC component, and 14 is an input signal terminal. Note that the parasitic transistor 2 is omitted. As explained in the circuit of FIG. 3, when the voltage V8 at the control terminal 3 is lower than the sum of the voltage VE at point b and the threshold voltage VF between the base and emitter of the transistor 1, the transistor 1 is turned off. The signal 1' from the input terminal 14 is transmitted to the output terminal 6 with almost no attenuation and becomes the output signal 1.

Then, the signal that can be handled at that time is 1. The maximum oscillation level of is maintained at a sufficiently large value by voltage V8. However, the voltage VB of the control signal at terminal 3 is set to the voltage VE+VF,
When switching to muting operation with a higher
This voltage VB causes a base current to flow through the transistor 1, which becomes an emitter current and flows through the resistor 9 constituting the voltage source 7 to the ground.

This base current turns on transistor 1,
Since a muting operation is performed, the resistor 9
It is not possible to reduce the current flowing to zero.

Therefore, a voltage due to a voltage drop appears across the resistor 9 due to this current iz. Now, the voltage generated by the current flowing from the power supply Ncc to the resistor 9 is V^
and the emitter current i when the transistor I is turned on is
If the voltage drop due to 2 is △V^, the voltage V8 becomes VE = V^ when transistor 1 is off, and VE = V^ + △V^ when transistor 1 is on, and the voltage VE increases as the muting is switched. This results in a stepwise change of ΔV.

This situation is shown in FIG.

That is, when the signal at terminal 3 is changed from voltage ○3 to VE10VF to switch from muting non-operation to muting operation, the emitter voltage VE of transistor 1 steps from voltage V^ to voltage V^10△V. It can be seen that the shape changes. Since the collector voltage Vc of a transistor changes in almost the same way depending on the emitter voltage, if the voltage VE at the emitter changes stepwise by △V^, the collector voltage Vc also changes stepwise by △V^, and this change is reflected in the output. Since the signal is transmitted directly to the terminal 6, a large shock-like noise is mixed into the signal.

・Thus, the circuits in Figures 3 and 5 are able to handle signals with a wider dynamic range than the circuit in Figure 1, but in reality they are able to handle signals with a wider dynamic range than the circuits in Figure 1, but in reality they are less likely to generate noise when cutting. The disadvantage is that it is quite difficult to do so. An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art, to provide a signal with a sufficiently wide dynamic range, and to be able to almost completely prevent the occurrence of shock noise when switching muting with a simple configuration. To provide a muting circuit.

In order to achieve this object, the present invention is characterized in that the current flowing through the bias source of the switching transistor for muning is always kept constant.

Hereinafter, the present invention will be explained in detail with reference to the drawings. FIG. 7 shows an embodiment of the present invention, in which a PNP transistor 15 whose collector is connected to the base of the transistor 1,
PN whose collector is connected to the emitter of transistor 1
P transistors 16 and these transistors 15
and 16 are connected to a common constant current source 17, a control signal terminal 18 is connected to the base of one transistor 15, and a fixed bias source 19 is connected to the base of the other transistor 16, resulting in differential increase. This circuit differs from the circuit shown in FIG. 5 in that the circuit is configured. The rest of the configuration is the same as that shown in FIG. 5, and a muting operation is performed by turning on the transistor 1, giving a large attenuation to the input signal li from the input terminal 14, and outputting the signal 1 to the output terminal 6. In addition, when the transistor 1 is off, the bias voltage from the resistor 9 ensures that even if the input signal 1 has a sufficiently large amplitude, it is transmitted to the output terminal 6 without being clipped. The fifth point is that
This is the same as the case shown in the figure. Now, transistors 5 and 16
Since their emitters are commonly supported by a constant current source 17, and the base of one transistor 16 is maintained at a constant bias voltage by a bias source 19,
The overall structure constitutes a constant current type intensifier.

Therefore, when the voltage of the signal at the control terminal 18 is higher than the voltage at the bias source 19, the transistor 15 is kept off and the transistor 6 is kept on. i.

and the collector current i2 of transistor 15
is zero, keeping transistor 1 off. Also, the voltage of the control signal applied to the terminal 18 is
9, the transistor 15 is now turned on and the transistor 16 is turned off, the collector current of the transistor 15 is i2 equal to the current io, and the collector current i of the transistor 16 becomes zero.

When the transistor 16 is on, its collector current i becomes a direct current iz and flows through the resistor 9, and when the transistor 15 is on, its collector current j2
flows from the base of the transistor 1 to the emitter, turning on the transistor 1 and performing a muting operation, and at the same time, the sum iz of the current iz and the collector current ic of the transistor flows through the emitter.

However, the current ic is an alternating current signal transmitted through the capacitor 12, and is bypassed by the capacitor 1, so that only the current iz flows through the resistor 9, so that iz=i2. In this way, only one of the currents i and i2 always flows as iz, and its value is always equal and the same as the current io of the constant current source 17. Therefore, the current flowing through the resistor 9 is the sum of the current iR flowing through the resistor 10 from the power supply Ncc and the current iz, of which the current i
Since R is completely unrelated to whether transistor 1 is on or off, it remains constant without being affected by it, and the fact that current iz is a constant current io regardless of whether transistor 1 is on or off is also explained above. As it is, after all,
The current iz+iR flowing through the resistor 9 is always kept at a constant value regardless of whether the transistor is on or off.

Therefore, the voltage drop △V^ across the resistor 9 due to the current iz and the voltage V^ due to the current iR are constant, and the emitter voltage VE of the transistor 1, which is the sum of them, is also always kept constant. There is no possibility that the emitter voltage V of V will fluctuate and shock noise will be mixed into the output signal lo.

As described above, according to this embodiment, a bias voltage is applied to the IC muting circuit to eliminate the occurrence of distortion due to clipping, making it applicable to signals with a wide dynamic range. Therefore, it is possible to obtain a muting circuit that sufficiently suppresses the occurrence of shock noise caused by the noise.

In the embodiment shown in FIG. 7, the voltage drop caused by the resistor 9 is used as a bias power supply, but as shown in FIG. Furthermore, in this case, the bias capacitor 1 can be omitted as shown in FIG. 9 by utilizing the low impedance characteristic of the Jenner diode, and the implementation of FIG. Equivalent to example,
Or even better effects can be obtained.

As explained above, according to the present invention, it is possible to sufficiently widen the dynamic range of the signal of the muting circuit, and also to simplify the configuration by making the bias power supply simple. This allows an excellent muting circuit to be obtained without any blindness that causes shock noise during switching.

[Brief explanation of drawings]

Figure 1 is a wiring diagram showing an example of a muting circuit using an IC, Figure 2 is a waveform diagram showing its characteristics, and Figure 3 is an example of a muting circuit that can maintain a wide dynamic range for signals. A wiring diagram, Fig. 4 is a waveform diagram showing its characteristics, Fig. 5 is a wiring diagram of a muting circuit that is a more specific version of Fig. 3, and Fig. 6 is a waveform diagram showing changes in bias voltage during its operation. FIG. 7 shows - of the present invention.
Connection diagrams of muting circuits according to embodiments, FIGS. 8 and 9 are connection diagrams showing essential parts of muting circuits according to other embodiments of the present invention. 1... Switching transistor for muting, 4
... Resistor, 9 ... Resistor for generating bias voltage, 15, 16 ... Control transistor constituting the differential amplifier, 17 ... Constant current source. Z Zuzu 3 Zuzu 4 Zuzu〆S Zuzai 6 Diagram Oh Zuzu 8 Zuzuzuzu

Claims (1)

[Claims] 1. An impedance element inserted between the input and output,
In a muting circuit consisting of a transistor whose collector or emitter is connected to the output and a bias source provided between the emitter or collector of this transistor and a common potential, a pair of differential amplifiers whose emitters are driven by a constant current source is used. the collector of one transistor is connected to the base of said transistor, the base of one transistor is connected to a control signal input terminal, the base of the other transistor is connected to a fixed source, and A muting circuit characterized in that a collector is connected to the emitter or collector of the transistor.